Commit 838a4a9d authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt

sh: fix sh7723 SDHI support using INTC force_disable

Update the sh7723 INTC tables with force_enable support
to mask out pending unsupported SDHI interrupt sources.

Without this patch the kernel locks up due to a pending
SDHI interrupt that the tmio_mmc driver cannot handle.
Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent e9125ac0
...@@ -602,6 +602,7 @@ void l2_cache_init(void) ...@@ -602,6 +602,7 @@ void l2_cache_init(void)
enum { enum {
UNUSED=0, UNUSED=0,
ENABLED, ENABLED,
DISABLED,
/* interrupt sources */ /* interrupt sources */
IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
...@@ -745,7 +746,7 @@ static struct intc_group groups[] __initdata = { ...@@ -745,7 +746,7 @@ static struct intc_group groups[] __initdata = {
static struct intc_mask_reg mask_registers[] __initdata = { static struct intc_mask_reg mask_registers[] __initdata = {
{ 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
{ 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
0, 0, ENABLED, ENABLED } }, 0, DISABLED, ENABLED, ENABLED } },
{ 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
{ VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } }, { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } },
{ 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
...@@ -762,7 +763,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { ...@@ -762,7 +763,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
{ I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
{ 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
{ 0, 0, ENABLED, ENABLED, { 0, DISABLED, ENABLED, ENABLED,
0, 0, SCIFA_SCIFA2, SIU_SIUI } }, 0, 0, SCIFA_SCIFA2, SIU_SIUI } },
{ 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
{ 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } }, { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } },
...@@ -806,6 +807,7 @@ static struct intc_mask_reg ack_registers[] __initdata = { ...@@ -806,6 +807,7 @@ static struct intc_mask_reg ack_registers[] __initdata = {
static struct intc_desc intc_desc __initdata = { static struct intc_desc intc_desc __initdata = {
.name = "sh7723", .name = "sh7723",
.force_enable = ENABLED, .force_enable = ENABLED,
.force_disable = DISABLED,
.hw = INTC_HW_DESC(vectors, groups, mask_registers, .hw = INTC_HW_DESC(vectors, groups, mask_registers,
prio_registers, sense_registers, ack_registers), prio_registers, sense_registers, ack_registers),
}; };
......
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