Commit 87772fe6 authored by David S. Miller's avatar David S. Miller

Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-queue

Jeff Kirsher says:

====================
Intel Wired LAN Driver Updates 2018-03-05

This series contains fixes to e1000e only.

Benjamin Poirier provides all but one fix in this series, starting with
workaround for a VMWare e1000e emulation issue where ICR reads 0x0 on
the emulated device.  Partially reverted a previous commit dealing with
the "Other" interrupt throttling to avoid unforeseen fallout from these
changes that are not strictly necessary.  Restored the ICS write for
receive and transmit queue interrupts in the case that txq or rxq bits
were set in ICR and the Other interrupt handler read and cleared ICR
before the queue interrupt was raised.  Fixed an bug where interrupts
may be missed if ICR is read while INT_ASSERTED is not set, so avoid the
problem by setting all bits related to events that can trigger the Other
interrupt in IMS.  Fixed the return value for check_for_link() when
auto-negotiation is off.

Pierre-Yves Kerbrat fixes e1000e to use dma_zalloc_coherent() to make
sure the ring is memset to 0 to prevent the area from containing
garbage.

v2: added an additional e1000e fix to the series
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 2695578b aea3fca0
...@@ -400,6 +400,10 @@ ...@@ -400,6 +400,10 @@
#define E1000_ICR_RXDMT0 0x00000010 /* Rx desc min. threshold (0) */ #define E1000_ICR_RXDMT0 0x00000010 /* Rx desc min. threshold (0) */
#define E1000_ICR_RXO 0x00000040 /* Receiver Overrun */ #define E1000_ICR_RXO 0x00000040 /* Receiver Overrun */
#define E1000_ICR_RXT0 0x00000080 /* Rx timer intr (ring 0) */ #define E1000_ICR_RXT0 0x00000080 /* Rx timer intr (ring 0) */
#define E1000_ICR_MDAC 0x00000200 /* MDIO Access Complete */
#define E1000_ICR_SRPD 0x00010000 /* Small Receive Packet Detected */
#define E1000_ICR_ACK 0x00020000 /* Receive ACK Frame Detected */
#define E1000_ICR_MNG 0x00040000 /* Manageability Event Detected */
#define E1000_ICR_ECCER 0x00400000 /* Uncorrectable ECC Error */ #define E1000_ICR_ECCER 0x00400000 /* Uncorrectable ECC Error */
/* If this bit asserted, the driver should claim the interrupt */ /* If this bit asserted, the driver should claim the interrupt */
#define E1000_ICR_INT_ASSERTED 0x80000000 #define E1000_ICR_INT_ASSERTED 0x80000000
...@@ -407,7 +411,7 @@ ...@@ -407,7 +411,7 @@
#define E1000_ICR_RXQ1 0x00200000 /* Rx Queue 1 Interrupt */ #define E1000_ICR_RXQ1 0x00200000 /* Rx Queue 1 Interrupt */
#define E1000_ICR_TXQ0 0x00400000 /* Tx Queue 0 Interrupt */ #define E1000_ICR_TXQ0 0x00400000 /* Tx Queue 0 Interrupt */
#define E1000_ICR_TXQ1 0x00800000 /* Tx Queue 1 Interrupt */ #define E1000_ICR_TXQ1 0x00800000 /* Tx Queue 1 Interrupt */
#define E1000_ICR_OTHER 0x01000000 /* Other Interrupts */ #define E1000_ICR_OTHER 0x01000000 /* Other Interrupt */
/* PBA ECC Register */ /* PBA ECC Register */
#define E1000_PBA_ECC_COUNTER_MASK 0xFFF00000 /* ECC counter mask */ #define E1000_PBA_ECC_COUNTER_MASK 0xFFF00000 /* ECC counter mask */
...@@ -431,12 +435,27 @@ ...@@ -431,12 +435,27 @@
E1000_IMS_RXSEQ | \ E1000_IMS_RXSEQ | \
E1000_IMS_LSC) E1000_IMS_LSC)
/* These are all of the events related to the OTHER interrupt.
*/
#define IMS_OTHER_MASK ( \
E1000_IMS_LSC | \
E1000_IMS_RXO | \
E1000_IMS_MDAC | \
E1000_IMS_SRPD | \
E1000_IMS_ACK | \
E1000_IMS_MNG)
/* Interrupt Mask Set */ /* Interrupt Mask Set */
#define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */ #define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */
#define E1000_IMS_LSC E1000_ICR_LSC /* Link Status Change */ #define E1000_IMS_LSC E1000_ICR_LSC /* Link Status Change */
#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* Rx sequence error */ #define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* Rx sequence error */
#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* Rx desc min. threshold */ #define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* Rx desc min. threshold */
#define E1000_IMS_RXO E1000_ICR_RXO /* Receiver Overrun */
#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* Rx timer intr */ #define E1000_IMS_RXT0 E1000_ICR_RXT0 /* Rx timer intr */
#define E1000_IMS_MDAC E1000_ICR_MDAC /* MDIO Access Complete */
#define E1000_IMS_SRPD E1000_ICR_SRPD /* Small Receive Packet */
#define E1000_IMS_ACK E1000_ICR_ACK /* Receive ACK Frame Detected */
#define E1000_IMS_MNG E1000_ICR_MNG /* Manageability Event */
#define E1000_IMS_ECCER E1000_ICR_ECCER /* Uncorrectable ECC Error */ #define E1000_IMS_ECCER E1000_ICR_ECCER /* Uncorrectable ECC Error */
#define E1000_IMS_RXQ0 E1000_ICR_RXQ0 /* Rx Queue 0 Interrupt */ #define E1000_IMS_RXQ0 E1000_ICR_RXQ0 /* Rx Queue 0 Interrupt */
#define E1000_IMS_RXQ1 E1000_ICR_RXQ1 /* Rx Queue 1 Interrupt */ #define E1000_IMS_RXQ1 E1000_ICR_RXQ1 /* Rx Queue 1 Interrupt */
......
...@@ -1602,7 +1602,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) ...@@ -1602,7 +1602,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
* we have already determined whether we have link or not. * we have already determined whether we have link or not.
*/ */
if (!mac->autoneg) if (!mac->autoneg)
return -E1000_ERR_CONFIG; return 1;
/* Auto-Neg is enabled. Auto Speed Detection takes care /* Auto-Neg is enabled. Auto Speed Detection takes care
* of MAC speed/duplex configuration. So we only need to * of MAC speed/duplex configuration. So we only need to
......
...@@ -450,7 +450,7 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw) ...@@ -450,7 +450,7 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
* we have already determined whether we have link or not. * we have already determined whether we have link or not.
*/ */
if (!mac->autoneg) if (!mac->autoneg)
return -E1000_ERR_CONFIG; return 1;
/* Auto-Neg is enabled. Auto Speed Detection takes care /* Auto-Neg is enabled. Auto Speed Detection takes care
* of MAC speed/duplex configuration. So we only need to * of MAC speed/duplex configuration. So we only need to
......
...@@ -1914,30 +1914,20 @@ static irqreturn_t e1000_msix_other(int __always_unused irq, void *data) ...@@ -1914,30 +1914,20 @@ static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
struct net_device *netdev = data; struct net_device *netdev = data;
struct e1000_adapter *adapter = netdev_priv(netdev); struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw; struct e1000_hw *hw = &adapter->hw;
u32 icr; u32 icr = er32(ICR);
bool enable = true;
if (icr & adapter->eiac_mask)
icr = er32(ICR); ew32(ICS, (icr & adapter->eiac_mask));
if (icr & E1000_ICR_RXO) {
ew32(ICR, E1000_ICR_RXO);
enable = false;
/* napi poll will re-enable Other, make sure it runs */
if (napi_schedule_prep(&adapter->napi)) {
adapter->total_rx_bytes = 0;
adapter->total_rx_packets = 0;
__napi_schedule(&adapter->napi);
}
}
if (icr & E1000_ICR_LSC) { if (icr & E1000_ICR_LSC) {
ew32(ICR, E1000_ICR_LSC);
hw->mac.get_link_status = true; hw->mac.get_link_status = true;
/* guard against interrupt when we're going down */ /* guard against interrupt when we're going down */
if (!test_bit(__E1000_DOWN, &adapter->state)) if (!test_bit(__E1000_DOWN, &adapter->state))
mod_timer(&adapter->watchdog_timer, jiffies + 1); mod_timer(&adapter->watchdog_timer, jiffies + 1);
} }
if (enable && !test_bit(__E1000_DOWN, &adapter->state)) if (!test_bit(__E1000_DOWN, &adapter->state))
ew32(IMS, E1000_IMS_OTHER); ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
return IRQ_HANDLED; return IRQ_HANDLED;
} }
...@@ -2040,7 +2030,6 @@ static void e1000_configure_msix(struct e1000_adapter *adapter) ...@@ -2040,7 +2030,6 @@ static void e1000_configure_msix(struct e1000_adapter *adapter)
hw->hw_addr + E1000_EITR_82574(vector)); hw->hw_addr + E1000_EITR_82574(vector));
else else
writel(1, hw->hw_addr + E1000_EITR_82574(vector)); writel(1, hw->hw_addr + E1000_EITR_82574(vector));
adapter->eiac_mask |= E1000_IMS_OTHER;
/* Cause Tx interrupts on every write back */ /* Cause Tx interrupts on every write back */
ivar |= BIT(31); ivar |= BIT(31);
...@@ -2265,7 +2254,8 @@ static void e1000_irq_enable(struct e1000_adapter *adapter) ...@@ -2265,7 +2254,8 @@ static void e1000_irq_enable(struct e1000_adapter *adapter)
if (adapter->msix_entries) { if (adapter->msix_entries) {
ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
ew32(IMS, adapter->eiac_mask | E1000_IMS_LSC); ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
IMS_OTHER_MASK);
} else if (hw->mac.type >= e1000_pch_lpt) { } else if (hw->mac.type >= e1000_pch_lpt) {
ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER); ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
} else { } else {
...@@ -2333,7 +2323,7 @@ static int e1000_alloc_ring_dma(struct e1000_adapter *adapter, ...@@ -2333,7 +2323,7 @@ static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
{ {
struct pci_dev *pdev = adapter->pdev; struct pci_dev *pdev = adapter->pdev;
ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma, ring->desc = dma_zalloc_coherent(&pdev->dev, ring->size, &ring->dma,
GFP_KERNEL); GFP_KERNEL);
if (!ring->desc) if (!ring->desc)
return -ENOMEM; return -ENOMEM;
...@@ -2707,8 +2697,7 @@ static int e1000e_poll(struct napi_struct *napi, int weight) ...@@ -2707,8 +2697,7 @@ static int e1000e_poll(struct napi_struct *napi, int weight)
napi_complete_done(napi, work_done); napi_complete_done(napi, work_done);
if (!test_bit(__E1000_DOWN, &adapter->state)) { if (!test_bit(__E1000_DOWN, &adapter->state)) {
if (adapter->msix_entries) if (adapter->msix_entries)
ew32(IMS, adapter->rx_ring->ims_val | ew32(IMS, adapter->rx_ring->ims_val);
E1000_IMS_OTHER);
else else
e1000_irq_enable(adapter); e1000_irq_enable(adapter);
} }
......
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