Commit 87b62b6d authored by Eugen Hristev's avatar Eugen Hristev Committed by Mauro Carvalho Chehab

media: atmel: atmel-isc: add SUB422 and SUB420 to register offsets

The SUB submodules are a part of the atmel-isc pipeline, and stand for
Subsampling. They are used to subsample the original YUV 4:4:4 pixel ratio
aspect to either 4:2:2 or 4:2:0.
Add sub420 and sub422 to the reg offsets struct.
This will allow different products to have a different reg offset for these
particular modules.
Signed-off-by: default avatarEugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 4fc9e8a7
...@@ -2326,8 +2326,8 @@ int isc_pipeline_init(struct isc_device *isc) ...@@ -2326,8 +2326,8 @@ int isc_pipeline_init(struct isc_device *isc)
REG_FIELD(ISC_GAM_CTRL, 3, 3), REG_FIELD(ISC_GAM_CTRL, 3, 3),
REG_FIELD(ISC_CSC_CTRL + isc->offsets.csc, 0, 0), REG_FIELD(ISC_CSC_CTRL + isc->offsets.csc, 0, 0),
REG_FIELD(ISC_CBC_CTRL + isc->offsets.cbc, 0, 0), REG_FIELD(ISC_CBC_CTRL + isc->offsets.cbc, 0, 0),
REG_FIELD(ISC_SUB422_CTRL, 0, 0), REG_FIELD(ISC_SUB422_CTRL + isc->offsets.sub422, 0, 0),
REG_FIELD(ISC_SUB420_CTRL, 0, 0), REG_FIELD(ISC_SUB420_CTRL + isc->offsets.sub420, 0, 0),
}; };
for (i = 0; i < ISC_PIPE_LINE_NODE_NUM; i++) { for (i = 0; i < ISC_PIPE_LINE_NODE_NUM; i++) {
......
...@@ -194,9 +194,13 @@ ...@@ -194,9 +194,13 @@
#define ISC_CBC_CONTRAST 0x000003c0 #define ISC_CBC_CONTRAST 0x000003c0
#define ISC_CBC_CONTRAST_MASK GENMASK(11, 0) #define ISC_CBC_CONTRAST_MASK GENMASK(11, 0)
/* Offset for SUB422 register specific to sama5d2 product */
#define ISC_SAMA5D2_SUB422_OFFSET 0
/* Subsampling 4:4:4 to 4:2:2 Control Register */ /* Subsampling 4:4:4 to 4:2:2 Control Register */
#define ISC_SUB422_CTRL 0x000003c4 #define ISC_SUB422_CTRL 0x000003c4
/* Offset for SUB420 register specific to sama5d2 product */
#define ISC_SAMA5D2_SUB420_OFFSET 0
/* Subsampling 4:2:2 to 4:2:0 Control Register */ /* Subsampling 4:2:2 to 4:2:0 Control Register */
#define ISC_SUB420_CTRL 0x000003cc #define ISC_SUB420_CTRL 0x000003cc
......
...@@ -148,10 +148,14 @@ struct isc_ctrls { ...@@ -148,10 +148,14 @@ struct isc_ctrls {
* struct isc_reg_offsets - ISC device register offsets * struct isc_reg_offsets - ISC device register offsets
* @csc: Offset for the CSC register * @csc: Offset for the CSC register
* @cbc: Offset for the CBC register * @cbc: Offset for the CBC register
* @sub422: Offset for the SUB422 register
* @sub420: Offset for the SUB420 register
*/ */
struct isc_reg_offsets { struct isc_reg_offsets {
u32 csc; u32 csc;
u32 cbc; u32 cbc;
u32 sub422;
u32 sub420;
}; };
/* /*
......
...@@ -232,6 +232,8 @@ static int atmel_isc_probe(struct platform_device *pdev) ...@@ -232,6 +232,8 @@ static int atmel_isc_probe(struct platform_device *pdev)
isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET;
isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET; isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET;
isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET;
isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET;
/* sama5d2-isc - 8 bits per beat */ /* sama5d2-isc - 8 bits per beat */
isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8; isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
......
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