Commit 8b72c18d authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab

media: platform: fix several typos

Use codespell to fix lots of typos over frontends.

Manually verified to avoid false-positives.
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: default avatarAndrzej Pietrasiewicz <andrzejtp2010@gmail.com>
Reviewed-by: default avatarBenoit Parrot <bparrot@ti.com>
Reviewed-by: default avatarKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: default avatarLad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: default avatarHoulong Wei <houlong.wei@mediatek.com>
Reviewed-by: default avatarYong Deng <yong.deng@magewell.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+samsung@kernel.org>
parent 16790554
......@@ -668,7 +668,7 @@ menuconfig SDR_PLATFORM_DRIVERS
if SDR_PLATFORM_DRIVERS
config VIDEO_RCAR_DRIF
tristate "Renesas Digitial Radio Interface (DRIF)"
tristate "Renesas Digital Radio Interface (DRIF)"
depends on VIDEO_V4L2
depends on ARCH_RENESAS || COMPILE_TEST
select VIDEOBUF2_VMALLOC
......
......@@ -110,7 +110,7 @@ struct atmel_isi {
bool enable_preview_path;
struct completion complete;
/* ISI peripherial clock */
/* ISI peripheral clock */
struct clk *pclk;
unsigned int irq;
......@@ -1078,7 +1078,7 @@ static void isi_graph_notify_unbind(struct v4l2_async_notifier *notifier,
dev_dbg(isi->dev, "Removing %s\n", video_device_node_name(isi->vdev));
/* Checks internaly if vdev have been init or not */
/* Checks internally if vdev have been init or not */
video_unregister_device(isi->vdev);
}
......
......@@ -103,7 +103,7 @@ static const unsigned char chroma_ac_value[162 + 2] = {
/*
* Quantization tables for luminance and chrominance components in
* zig-zag scan order from the Freescale i.MX VPU libaries
* zig-zag scan order from the Freescale i.MX VPU libraries
*/
static unsigned char luma_q[64] = {
......
......@@ -328,7 +328,7 @@ static void isif_config_bclamp(struct isif_black_clamp *bc)
if (bc->en) {
val = bc->bc_mode_color << ISIF_BC_MODE_COLOR_SHIFT;
/* Enable BC and horizontal clamp caculation paramaters */
/* Enable BC and horizontal clamp calculation parameters */
val = val | 1 | (bc->horz.mode << ISIF_HORZ_BC_MODE_SHIFT);
regw(val, CLAMPCFG);
......@@ -358,7 +358,7 @@ static void isif_config_bclamp(struct isif_black_clamp *bc)
regw(bc->horz.win_start_v_calc, CLHWIN2);
}
/* vertical clamp caculation paramaters */
/* vertical clamp calculation parameters */
/* Reset clamp value sel for previous line */
val |=
......
......@@ -242,7 +242,7 @@ static int vpbe_set_output(struct vpbe_device *vpbe_dev, int index)
goto unlock;
/*
* It is assumed that venc or extenal encoder will set a default
* It is assumed that venc or external encoder will set a default
* mode in the sub device. For external encoder or LCD pannel output,
* we also need to set up the lcd port for the required mode. So setup
* the lcd port for the default mode that is configured in the board
......
/*
* vpif - Video Port Interface driver
* VPIF is a receiver and transmitter for video data. It has two channels(0, 1)
* that receiveing video byte stream and two channels(2, 3) for video output.
* that receiving video byte stream and two channels(2, 3) for video output.
* The hardware supports SDTV, HDTV formats, raw data capture.
* Currently, the driver supports NTSC and PAL standards.
*
......
......@@ -138,7 +138,7 @@ static int vpif_buffer_queue_setup(struct vb2_queue *vq,
* vpif_buffer_queue : Callback function to add buffer to DMA queue
* @vb: ptr to vb2_buffer
*
* This callback fucntion queues the buffer to DMA engine
* This callback function queues the buffer to DMA engine
*/
static void vpif_buffer_queue(struct vb2_buffer *vb)
{
......@@ -635,7 +635,7 @@ static int vpif_try_fmt_vid_out(struct file *file, void *priv,
struct v4l2_pix_format *pixfmt = &fmt->fmt.pix;
/*
* to supress v4l-compliance warnings silently correct
* to suppress v4l-compliance warnings silently correct
* the pixelformat
*/
if (pixfmt->pixelformat != V4L2_PIX_FMT_YUV422P)
......
......@@ -18,7 +18,7 @@
#define FIMC_IS_COMMAND_VER 110 /* FIMC-IS command set version 1.10 */
/* Enumeration of commands beetween the FIMC-IS and the host processor. */
/* Enumeration of commands between the FIMC-IS and the host processor. */
/* HOST to FIMC-IS */
#define HIC_PREVIEW_STILL 0x0001
......
......@@ -298,7 +298,7 @@ enum isp_af_mode {
#define ISP_FLASH_COMMAND_AUTO 2
#define ISP_FLASH_COMMAND_TORCH 3 /* 3 sec */
/* Flash red-eye commads */
/* Flash red-eye commands */
#define ISP_FLASH_REDEYE_DISABLE 0
#define ISP_FLASH_REDEYE_ENABLE 1
......
......@@ -79,7 +79,7 @@ struct fimc_camclk_info {
/**
* struct fimc_sensor_info - image data source subdev information
* @pdata: sensor's atrributes passed as media device's platform data
* @pdata: sensor's attributes passed as media device's platform data
* @asd: asynchronous subdev registration data structure
* @subdev: image sensor v4l2 subdev
* @host: fimc device the sensor is currently linked to
......
......@@ -183,7 +183,7 @@ struct csis_drvdata {
* @index: the hardware instance index
* @pdev: CSIS platform device
* @phy: pointer to the CSIS generic PHY
* @regs: mmaped I/O registers memory
* @regs: mmapped I/O registers memory
* @supplies: CSIS regulator supplies
* @clock: CSIS clocks
* @irq: requested s5p-mipi-csis irq number
......@@ -745,7 +745,7 @@ static int s5pcsis_parse_dt(struct platform_device *pdev,
goto err;
}
/* Get MIPI CSI-2 bus configration from the endpoint node. */
/* Get MIPI CSI-2 bus configuration from the endpoint node. */
of_property_read_u32(node, "samsung,csis-hs-settle",
&state->hs_settle);
state->wclk_ext = of_property_read_bool(node,
......
......@@ -240,8 +240,8 @@ static void mmpcam_calc_dphy(struct mcam_camera *mcam)
* bit 8 ~ bit 15: HS_SETTLE
* Time interval during which the HS
* receiver shall ignore any Data Lane
* HS transistions.
* The vaule has been calibrated on
* HS transitions.
* The value has been calibrated on
* different boards. It seems to work well.
*
* More detail please refer
......
......@@ -41,7 +41,7 @@
#define MTK_MDP_CTX_ERROR BIT(5)
/**
* struct mtk_mdp_pix_align - alignement of image
* struct mtk_mdp_pix_align - alignment of image
* @org_w: source alignment of width
* @org_h: source alignment of height
* @target_w: dst alignment of width
......@@ -122,8 +122,8 @@ struct mtk_mdp_frame {
/**
* struct mtk_mdp_variant - image processor variant information
* @pix_max: maximum limit of image size
* @pix_min: minimun limit of image size
* @pix_align: alignement of image
* @pix_min: minimum limit of image size
* @pix_align: alignment of image
* @h_scale_up_max: maximum scale-up in horizontal
* @v_scale_up_max: maximum scale-up in vertical
* @h_scale_down_max: maximum scale-down in horizontal
......
......@@ -1165,7 +1165,7 @@ static void vb2ops_vdec_buf_queue(struct vb2_buffer *vb)
ret = vdec_if_decode(ctx, &src_mem, NULL, &res_chg);
if (ret || !res_chg) {
/*
* fb == NULL menas to parse SPS/PPS header or
* fb == NULL means to parse SPS/PPS header or
* resolution info in src_mem. Decode can fail
* if there is no SPS header or picture info
* in bs
......
......@@ -151,9 +151,9 @@ struct mtk_q_data {
* @intra_period: I frame period
* @gop_size: group of picture size, it's used as the intra frame period
* @framerate_num: frame rate numerator. ex: framerate_num=30 and
* framerate_denom=1 menas FPS is 30
* framerate_denom=1 means FPS is 30
* @framerate_denom: frame rate denominator. ex: framerate_num=30 and
* framerate_denom=1 menas FPS is 30
* framerate_denom=1 means FPS is 30
* @h264_max_qp: Max value for H.264 quantization parameter
* @h264_profile: V4L2 defined H.264 profile
* @h264_level: V4L2 defined H.264 level
......
......@@ -393,7 +393,7 @@ static void mtk_venc_set_param(struct mtk_vcodec_ctx *ctx,
param->input_yuv_fmt = VENC_YUV_FORMAT_NV21;
break;
default:
mtk_v4l2_err("Unsupport fourcc =%d", q_data_src->fmt->fourcc);
mtk_v4l2_err("Unsupported fourcc =%d", q_data_src->fmt->fourcc);
break;
}
param->h264_profile = enc_params->h264_profile;
......
......@@ -55,7 +55,7 @@ struct h264_fb {
/**
* struct h264_ring_fb_list - ring frame buffer list
* @fb_list : frame buffer arrary
* @fb_list : frame buffer array
* @read_idx : read index
* @write_idx : write index
* @count : buffer count in list
......@@ -72,7 +72,7 @@ struct h264_ring_fb_list {
/**
* struct vdec_h264_dec_info - decode information
* @dpb_sz : decoding picture buffer size
* @resolution_changed : resoltion change happen
* @resolution_changed : resolution change happen
* @realloc_mv_buf : flag to notify driver to re-allocate mv buffer
* @reserved : for 8 bytes alignment
* @bs_dma : Input bit-stream buffer dma address
......
......@@ -120,7 +120,7 @@ struct vdec_vp8_hw_reg_base {
/**
* struct vdec_vp8_vpu_inst - VPU instance for VP8 decode
* @wq_hd : Wait queue to wait VPU message ack
* @signaled : 1 - Host has received ack message from VPU, 0 - not recevie
* @signaled : 1 - Host has received ack message from VPU, 0 - not receive
* @failure : VPU execution result status 0 - success, others - fail
* @inst_addr : VPU decoder instance address
*/
......
......@@ -80,7 +80,7 @@ void vdec_if_deinit(struct mtk_vcodec_ctx *ctx);
* vdec_if_decode() - trigger decode
* @ctx : [in] v4l2 context
* @bs : [in] input bitstream
* @fb : [in] frame buffer to store decoded frame, when null menas parse
* @fb : [in] frame buffer to store decoded frame, when null means parse
* header only
* @res_chg : [out] resolution change happens if current bs have different
* picture width/height
......
......@@ -62,7 +62,7 @@ int vpu_dec_start(struct vdec_vpu_inst *vpu, uint32_t *data, unsigned int len);
/**
* vpu_dec_end - end decoding, basically the function will be invoked once
* when HW decoding done interrupt received successfully. The
* decoder in VPU will continute to do referene frame management
* decoder in VPU will continue to do reference frame management
* and check if there is a new decoded frame available to display.
*
* @vpu : instance for vdec_vpu_inst
......
......@@ -1129,7 +1129,7 @@ static int vidioc_s_fmt_vid_out(struct file *file, void *fh,
}
timing = &dssdev->panel.timings;
/* We dont support RGB24-packed mode if vrfb rotation
/* We don't support RGB24-packed mode if vrfb rotation
* is enabled*/
if ((is_rotation_enabled(vout)) &&
f->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) {
......@@ -1147,7 +1147,7 @@ static int vidioc_s_fmt_vid_out(struct file *file, void *fh,
vout->fbuf.fmt.width = timing->x_res;
}
/* change to samller size is OK */
/* change to smaller size is OK */
bpp = omap_vout_try_format(&f->fmt.pix);
f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height * bpp;
......
......@@ -37,7 +37,7 @@
#define VID_MAX_WIDTH 1280 /* Largest width */
#define VID_MAX_HEIGHT 720 /* Largest height */
/* Mimimum requirement is 2x2 for DSS */
/* Minimum requirement is 2x2 for DSS */
#define VID_MIN_WIDTH 2
#define VID_MIN_HEIGHT 2
......@@ -135,7 +135,7 @@ struct omap_vout_device {
enum omap_color_mode dss_mode;
/* we don't allow to request new buffer when old buffers are
* still mmaped
* still mmapped
*/
int mmap_count;
......
......@@ -1517,7 +1517,7 @@ void omap3isp_print_status(struct isp_device *isp)
*
* To solve this problem power management support is split into prepare/complete
* and suspend/resume operations. The pipelines are stopped in prepare() and the
* ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
* ISP clocks get disabled in suspend(). Similarly, the clocks are re-enabled in
* resume(), and the the pipelines are restarted in complete().
*
* TODO: PM dependencies between the ISP and sensors are not modelled explicitly
......
......@@ -1594,7 +1594,7 @@ static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
return 0;
/* We're in continuous mode, and memory writes were disabled due to a
* buffer underrun. Reenable them now that we have a buffer. The buffer
* buffer underrun. Re-enable them now that we have a buffer. The buffer
* address has been set in ccdc_video_queue.
*/
if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
......@@ -1712,7 +1712,7 @@ static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
* data to memory the CCDC and LSC are stopped immediately but
* without change the CCDC stopping state machine. The CCDC
* stopping state machine should be used only when user request
* for stopping is received (SINGLESHOT is an exeption).
* for stopping is received (SINGLESHOT is an exception).
*/
switch (ccdc->state) {
case ISP_PIPELINE_STREAM_SINGLESHOT:
......
......@@ -710,7 +710,7 @@ static void csi2_isr_ctx(struct isp_csi2_device *csi2,
/* Skip interrupts until we reach the frame skip count. The CSI2 will be
* automatically disabled, as the frame skip count has been programmed
* in the CSI2_CTx_CTRL1::COUNT field, so reenable it.
* in the CSI2_CTx_CTRL1::COUNT field, so re-enable it.
*
* It would have been nice to rely on the FRAME_NUMBER interrupt instead
* but it turned out that the interrupt is only generated when the CSI2
......
......@@ -1631,7 +1631,7 @@ static int pxa_camera_set_bus_param(struct pxa_camera_dev *pcdev)
pcdev->channels = 1;
/* Make choises, based on platform preferences */
/* Make choices, based on platform preferences */
if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
(common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
if (pcdev->platform_flags & PXA_CAMERA_HSP)
......
......@@ -219,7 +219,7 @@ struct venus_buffer {
#define to_venus_buffer(ptr) container_of(ptr, struct venus_buffer, vb)
/**
* struct venus_inst - holds per instance paramerters
* struct venus_inst - holds per instance parameters
*
* @list: used for attach an instance to the core
* @lock: instance lock
......
......@@ -681,7 +681,7 @@ static int rvin_setup(struct rvin_dev *vin)
break;
}
/* Enable VSYNC Field Toogle mode after one VSYNC input */
/* Enable VSYNC Field Toggle mode after one VSYNC input */
if (vin->info->model == RCAR_GEN3)
dmr2 = VNDMR2_FTEV;
else
......
......@@ -665,7 +665,7 @@ static void rvin_mc_try_format(struct rvin_dev *vin,
* The V4L2 specification clearly documents the colorspace fields
* as being set by drivers for capture devices. Using the values
* supplied by userspace thus wouldn't comply with the API. Until
* the API is updated force fixed vaules.
* the API is updated force fixed values.
*/
pix->colorspace = RVIN_DEFAULT_COLORSPACE;
pix->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(pix->colorspace);
......@@ -964,7 +964,7 @@ void rvin_v4l2_unregister(struct rvin_dev *vin)
v4l2_info(&vin->v4l2_dev, "Removing %s\n",
video_device_node_name(&vin->vdev));
/* Checks internaly if vdev have been init or not */
/* Checks internally if vdev have been init or not */
video_unregister_device(&vin->vdev);
}
......
......@@ -256,7 +256,7 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx)
}
/*
* Cacluate the up/down scaling mode/factor.
* Calculate the up/down scaling mode/factor.
*
* RGA used to scale the picture first, and then rotate second,
* so we need to swap the w/h when rotate degree is 90/270.
......@@ -304,7 +304,7 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx)
}
/*
* Cacluate the framebuffer virtual strides and active size,
* Calculate the framebuffer virtual strides and active size,
* note that the step of vir_stride / vir_width is 4 byte words
*/
src_vir_info.data.vir_stride = ctx->in.stride >> 2;
......@@ -318,7 +318,7 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx)
dst_act_info.data.act_width = dst_w - 1;
/*
* Cacluate the source framebuffer base address with offset pixel.
* Calculate the source framebuffer base address with offset pixel.
*/
src_offsets = rga_get_addr_offset(&ctx->in, src_x, src_y,
src_w, src_h);
......
......@@ -260,7 +260,7 @@ struct camif_vp {
* @clock: clocks required for the CAMIF operation
* @lock: mutex protecting this data structure
* @slock: spinlock protecting CAMIF registers
* @io_base: start address of the mmaped CAMIF registers
* @io_base: start address of the mmapped CAMIF registers
*/
struct camif_dev {
struct media_device media_dev;
......
......@@ -153,7 +153,7 @@ struct s5p_jpeg_variant {
/**
* struct jpeg_fmt - driver's internal color format data
* @name: format descritpion
* @name: format description
* @fourcc: the fourcc code, 0 if not applicable
* @depth: number of bits per pixel
* @colplanes: number of color planes (1 for packed formats)
......@@ -193,7 +193,7 @@ struct s5p_jpeg_marker {
* @sos: SOS marker's position relative to the buffer beginning
* @dht: DHT markers' positions relative to the buffer beginning
* @dqt: DQT markers' positions relative to the buffer beginning
* @sof: SOF0 marker's postition relative to the buffer beginning
* @sof: SOF0 marker's position relative to the buffer beginning
* @sof_len: SOF0 marker's payload length (without length field itself)
* @components: number of image components
* @size: image buffer size in bytes
......
......@@ -268,7 +268,7 @@ struct s5p_mfc_priv_buf {
* @enc_ctrl_handler: control framework handler for encoding
* @pm: power management control
* @variant: MFC hardware variant information
* @num_inst: couter of active MFC instances
* @num_inst: counter of active MFC instances
* @irqlock: lock for operations on videobuf2 queues
* @condlock: lock for changing/checking if a context is ready to be
* processed
......
......@@ -51,7 +51,7 @@ int s5p_mfc_load_firmware(struct s5p_mfc_dev *dev)
struct firmware *fw_blob;
int i, err = -EINVAL;
/* Firmare has to be present as a separate file or compiled
/* Firmware has to be present as a separate file or compiled
* into kernel. */
mfc_debug_enter();
......
......@@ -602,7 +602,7 @@ static int vidioc_querybuf(struct file *file, void *priv,
int i;
if (buf->memory != V4L2_MEMORY_MMAP) {
mfc_err("Only mmaped buffers can be used\n");
mfc_err("Only mmapped buffers can be used\n");
return -EINVAL;
}
mfc_debug(2, "State: %d, buf->type: %d\n", ctx->state, buf->type);
......
......@@ -1293,7 +1293,7 @@ static int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx)
* First set the output frame buffers
*/
if (ctx->capture_state != QUEUE_BUFS_MMAPED) {
mfc_err("It seems that not all destination buffers were mmaped\nMFC requires that all destination are mmaped before starting processing\n");
mfc_err("It seems that not all destination buffers were mmapped\nMFC requires that all destination are mmapped before starting processing\n");
return -EAGAIN;
}
if (list_empty(&ctx->src_queue)) {
......
......@@ -53,7 +53,7 @@ static int s5p_mfc_alloc_dec_temp_buffers_v6(struct s5p_mfc_ctx *ctx)
return 0;
}
/* Release temproary buffers for decoding */
/* Release temporary buffers for decoding */
static void s5p_mfc_release_dec_desc_buffer_v6(struct s5p_mfc_ctx *ctx)
{
/* NOP */
......@@ -1928,7 +1928,7 @@ static inline int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx)
if (ctx->capture_state != QUEUE_BUFS_MMAPED) {
mfc_err("It seems that not all destination buffers were\n"
"mmaped.MFC requires that all destination are mmaped\n"
"mmapped.MFC requires that all destination are mmapped\n"
"before starting processing.\n");
return -EAGAIN;
}
......
......@@ -193,7 +193,7 @@ struct c8sectpfei {
#define C8SECTPFE_SYS_ENABLE BIT(0)
/*
* Ponter record data structure required for each input block
* Pointer record data structure required for each input block
* see Table 82 on page 167 of functional specification.
*/
......
......@@ -286,7 +286,7 @@ struct delta_dec {
* Header parsing must be done using decode(), giving
* explicitly header access unit or first access unit of bitstream.
* If no valid header is found, get_streaminfo will return -ENODATA,
* in this case the next bistream access unit must be decoded till
* in this case the next bitstream access unit must be decoded till
* get_streaminfo becomes successful.
*/
int (*get_streaminfo)(struct delta_ctx *ctx,
......
......@@ -626,7 +626,7 @@ static int hva_h264_prepare_task(struct hva_ctx *pctx,
td->frame_width = frame_width;
td->frame_height = frame_height;
/* set frame alignement */
/* set frame alignment */
td->window_width = frame_width;
td->window_height = frame_height;
td->window_horizontal_offset = 0;
......
......@@ -1544,7 +1544,7 @@ static void dcmi_graph_notify_unbind(struct v4l2_async_notifier *notifier,
dev_dbg(dcmi->dev, "Removing %s\n", video_device_node_name(dcmi->vdev));
/* Checks internaly if vdev has been init or not */
/* Checks internally if vdev has been init or not */
video_unregister_device(dcmi->vdev);
}
......
......@@ -65,7 +65,7 @@ bool sun6i_csi_is_format_supported(struct sun6i_csi *csi, u32 pixformat,
int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable);
/**
* sun6i_csi_update_config() - update the csi register setttings
* sun6i_csi_update_config() - update the csi register settings
* @csi: pointer to the csi
* @config: see struct sun6i_csi_config
*/
......
......@@ -404,7 +404,7 @@ EXPORT_SYMBOL(vpdma_map_desc_buf);
/*
* unmap descriptor/payload DMA buffer, disabling DMA access and
* allowing the main processor to acces the data
* allowing the main processor to access the data
*/
void vpdma_unmap_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf)
{
......@@ -501,7 +501,7 @@ void vpdma_reset_desc_list(struct vpdma_desc_list *list)
EXPORT_SYMBOL(vpdma_reset_desc_list);
/*
* free the buffer allocated fot the VPDMA descriptor list, this should be
* free the buffer allocated for the VPDMA descriptor list, this should be
* called when the user doesn't want to use VPDMA any more.
*/
void vpdma_free_desc_list(struct vpdma_desc_list *list)
......@@ -790,7 +790,7 @@ static void dump_dtd(struct vpdma_dtd *dtd)
* append an outbound data transfer descriptor to the given descriptor list,
* this sets up a 'client to memory' VPDMA transfer for the given VPDMA channel
*
* @list: vpdma desc list to which we add this decriptor
* @list: vpdma desc list to which we add this descriptor
* @width: width of the image in pixels in memory
* @c_rect: compose params of output image
* @fmt: vpdma data format of the buffer
......@@ -798,7 +798,7 @@ static void dump_dtd(struct vpdma_dtd *dtd)
* max_width: enum for maximum width of data transfer
* max_height: enum for maximum height of data transfer
* chan: VPDMA channel
* flags: VPDMA flags to configure some descriptor fileds
* flags: VPDMA flags to configure some descriptor fields
*/
void vpdma_add_out_dtd(struct vpdma_desc_list *list, int width,
int stride, const struct v4l2_rect *c_rect,
......@@ -863,14 +863,14 @@ EXPORT_SYMBOL(vpdma_rawchan_add_out_dtd);
* append an inbound data transfer descriptor to the given descriptor list,
* this sets up a 'memory to client' VPDMA transfer for the given VPDMA channel
*
* @list: vpdma desc list to which we add this decriptor
* @list: vpdma desc list to which we add this descriptor
* @width: width of the image in pixels in memory(not the cropped width)
* @c_rect: crop params of input image
* @fmt: vpdma data format of the buffer
* dma_addr: dma address as seen by VPDMA
* chan: VPDMA channel
* field: top or bottom field info of the input image
* flags: VPDMA flags to configure some descriptor fileds
* flags: VPDMA flags to configure some descriptor fields
* frame_width/height: the complete width/height of the image presented to the
* client (this makes sense when multiple channels are
* connected to the same client, forming a larger frame)
......@@ -1008,7 +1008,7 @@ unsigned int vpdma_get_list_mask(struct vpdma_data *vpdma, int irq_num)
}
EXPORT_SYMBOL(vpdma_get_list_mask);
/* clear previosuly occured list intterupts in the LIST_STAT register */
/* clear previously occurred list interupts in the LIST_STAT register */
void vpdma_clear_list_stat(struct vpdma_data *vpdma, int irq_num,
int list_num)
{
......
......@@ -876,7 +876,7 @@ static int set_srcdst_params(struct vpe_ctx *ctx)
/*
* we make sure that the source image has a 16 byte aligned
* stride, we need to do the same for the motion vector buffer
* by aligning it's stride to the next 16 byte boundry. this
* by aligning it's stride to the next 16 byte boundary. this
* extra space will not be used by the de-interlacer, but will
* ensure that vpdma operates correctly
*/
......
......@@ -296,7 +296,7 @@ static void brx_configure_stream(struct vsp1_entity *entity,
/*
* The hardware is extremely flexible but we have no userspace API to
* expose all the parameters, nor is it clear whether we would have use
* cases for all the supported modes. Let's just harcode the parameters
* cases for all the supported modes. Let's just hardcode the parameters
* to sane default values for now.
*/
......@@ -373,7 +373,7 @@ static void brx_configure_stream(struct vsp1_entity *entity,
vsp1_brx_write(brx, dlb, VI6_BRU_CTRL(i), ctrl);
/*
* Harcode the blending formula to
* Hardcode the blending formula to
*
* DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
* DSTa = DSTa * (1 - SRCa) + SRCa
......
......@@ -166,7 +166,7 @@ EXPORT_SYMBOL_GPL(xvip_set_format_size);
* the register, otherwise the bitmask is cleared from the register
* when the flag @set is false.
*
* Fox eample, this function can be used to set a control with a boolean value
* Fox example, this function can be used to set a control with a boolean value
* requested by users. If the caller knows whether to set or clear in the first
* place, the caller should call xvip_clr() or xvip_set() directly instead of
* using this function.
......
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