Commit 90e59c8b authored by Andrew Morton's avatar Andrew Morton Committed by James Bottomley

[PATCH] Fix double reset in aic7xxx driver

From: Joe Korty <joe.korty@ccur.com>

Fix occasional PCI bus parity errors on the Dell PowerEdge 4600 during
boot.

Symptoms: The LCD display would turn orange and display "PCI SYSTEM E13F5",
and the following message would appear in /var/log/dmesg: "Uhhuh.  NMI
received.  Dazed and confused, but trying to continue".

By inserting a PCI card with a PDC20268 IDE controller and attaching to
that a Sony DRU-510A DVD RW burner with an unloaded tray, the failure can
be made to happen on every boot.

Cause: The aic7xxx driver was resetting the onboard AIC7891 SCSI controller
while waiting for a previous reset to complete.  This second reset confuses
the controller causing it to put bad data onto the PCI bus.

This is a backport of a RedHat 2.4.21-15.ELsmp fix.  A letter discussing
this problem, or one very close to it, may be found at:

   http://lists.us.dell.com/pipermail/linux-poweredge/2003-May/025010.htmlSigned-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarJames Bottomley <James.Bottomley@SteelEye.com>
parent 1e7e0f35
...@@ -452,8 +452,10 @@ ahd_pci_test_register_access(struct ahd_softc *ahd) ...@@ -452,8 +452,10 @@ ahd_pci_test_register_access(struct ahd_softc *ahd)
* or read prefetching could be initiated by the * or read prefetching could be initiated by the
* CPU or host bridge. Our device does not support * CPU or host bridge. Our device does not support
* either, so look for data corruption and/or flaged * either, so look for data corruption and/or flaged
* PCI errors. * PCI errors. First pause without causing another
* chip reset.
*/ */
hcntrl &= ~CHIPRST;
ahd_outb(ahd, HCNTRL, hcntrl|PAUSE); ahd_outb(ahd, HCNTRL, hcntrl|PAUSE);
while (ahd_is_paused(ahd) == 0) while (ahd_is_paused(ahd) == 0)
; ;
......
...@@ -1284,8 +1284,10 @@ ahc_pci_test_register_access(struct ahc_softc *ahc) ...@@ -1284,8 +1284,10 @@ ahc_pci_test_register_access(struct ahc_softc *ahc)
* or read prefetching could be initiated by the * or read prefetching could be initiated by the
* CPU or host bridge. Our device does not support * CPU or host bridge. Our device does not support
* either, so look for data corruption and/or flagged * either, so look for data corruption and/or flagged
* PCI errors. * PCI errors. First pause without causing another
* chip reset.
*/ */
hcntrl &= ~CHIPRST;
ahc_outb(ahc, HCNTRL, hcntrl|PAUSE); ahc_outb(ahc, HCNTRL, hcntrl|PAUSE);
while (ahc_is_paused(ahc) == 0) while (ahc_is_paused(ahc) == 0)
; ;
......
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