Commit 90ec257c authored by Bjorn Andersson's avatar Bjorn Andersson

remoteproc: qcom: pil-info: Fix shift overflow

On platforms with 32-bit phys_addr_t the shift to get the upper word of
the base address of the memory region is invalid. Cast the base to 64
bit to resolv this.

Fixes: 549b67da ("remoteproc: qcom: Introduce helper to store pil info in IMEM")
Tested-by: Nathan Chancellor <natechancellor@gmail.com> # build
Reported-by: default avatarLee Jones <lee.jones@linaro.org>
Reported-by: default avatarNathan Chancellor <natechancellor@gmail.com>
Link: https://lore.kernel.org/r/20200716054817.157608-1-bjorn.andersson@linaro.orgSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 5b435ca3
...@@ -108,7 +108,7 @@ int qcom_pil_info_store(const char *image, phys_addr_t base, size_t size) ...@@ -108,7 +108,7 @@ int qcom_pil_info_store(const char *image, phys_addr_t base, size_t size)
found_existing: found_existing:
/* Use two writel() as base is only aligned to 4 bytes on odd entries */ /* Use two writel() as base is only aligned to 4 bytes on odd entries */
writel(base, entry + PIL_RELOC_NAME_LEN); writel(base, entry + PIL_RELOC_NAME_LEN);
writel(base >> 32, entry + PIL_RELOC_NAME_LEN + 4); writel((u64)base >> 32, entry + PIL_RELOC_NAME_LEN + 4);
writel(size, entry + PIL_RELOC_NAME_LEN + sizeof(__le64)); writel(size, entry + PIL_RELOC_NAME_LEN + sizeof(__le64));
mutex_unlock(&pil_reloc_lock); mutex_unlock(&pil_reloc_lock);
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment