Commit 925fbca4 authored by William Zhang's avatar William Zhang Committed by Florian Fainelli

ARM: dts: bcmbca: bcm6878: fix timer node cpu mask flag

The cpu mask flag value should match the number of cpu cores in the
chip. Correct the value to two cpus for BCM6878 dual core SoC.

Fixes: 6bcad714 ("ARM: dts: Add DTS files for bcmbca SoC BCM6878")
Signed-off-by: default avatarWilliam Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20220801194754.29492-1-william.zhang@broadcom.comSigned-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 12bbc223
...@@ -39,10 +39,10 @@ L2_0: l2-cache0 { ...@@ -39,10 +39,10 @@ L2_0: l2-cache0 {
timer { timer {
compatible = "arm,armv7-timer"; compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
arm,cpu-registers-not-fw-configured; arm,cpu-registers-not-fw-configured;
}; };
......
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