Commit 94f45bcd authored by Ville Syrjala's avatar Ville Syrjala Committed by Linus Torvalds

atyfb: increase SPLL delay

Wait 5 ms instead of 500 us for the SPLL to lock.  This matches the
recommendation in mach64 programmer's guide.
Signed-off-by: default avatarAntonino Daplas <adaplas@gmail.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 2620c6e3
...@@ -608,12 +608,10 @@ static void aty_resume_pll_ct(const struct fb_info *info, ...@@ -608,12 +608,10 @@ static void aty_resume_pll_ct(const struct fb_info *info,
aty_st_pll_ct(SCLK_FB_DIV, pll->ct.sclk_fb_div, par); aty_st_pll_ct(SCLK_FB_DIV, pll->ct.sclk_fb_div, par);
aty_st_pll_ct(SPLL_CNTL2, pll->ct.spll_cntl2, par); aty_st_pll_ct(SPLL_CNTL2, pll->ct.spll_cntl2, par);
/* /*
* The sclk has been started. However, I believe the first clock * SCLK has been started. Wait for the PLL to lock. 5 ms
* ticks it generates are not very stable. Hope this primitive loop * should be enough according to mach64 programmer's guide.
* helps for Rage Mobilities that sometimes crash when
* we switch to sclk. (Daniel Mantione, 13-05-2003)
*/ */
udelay(500); mdelay(5);
} }
aty_st_pll_ct(PLL_REF_DIV, pll->ct.pll_ref_div, par); aty_st_pll_ct(PLL_REF_DIV, pll->ct.pll_ref_div, par);
......
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