Commit 95135e8c authored by Felix Fietkau's avatar Felix Fietkau Committed by Kalle Valo

mt76: check for pending reset before attempting to schedule tx

The check within mt76_txq_send_burst is not enough, as it happens after
a first frame has already been queued up
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
parent 1d868b70
......@@ -385,6 +385,10 @@ mt76_txq_schedule_list(struct mt76_dev *dev, struct mt76_queue *hwq)
bool empty = false;
int cur;
if (test_bit(MT76_SCANNING, &dev->state) ||
test_bit(MT76_RESET, &dev->state))
return -EBUSY;
mtxq = list_first_entry(&hwq->swq, struct mt76_txq, list);
if (mtxq->send_bar && mtxq->aggr) {
struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
......
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