[ARM] Fix wrong cache flush call for ARM1020 CPUs

993618b8 · Russell King · d0d4b058 · 993618b8
Commit 993618b8 authored Sep 05, 2003 by Russell King
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arch/arm/mm/proc-arm1020.S arch/arm/mm/proc-arm1020.S +1 -1

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--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -79,7 +79,7 @@ ENTRY(cpu_arm1020_proc_fin)
 	stmfd	sp!, {lr}
 	mov	ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
 	msr	cpsr_c, ip
-	bl	cpu_arm1020_cache_clean_invalidate_all
+	bl	arm1020_flush_kern_cache_all
 	mrc	p15, 0, r0, c1, c0, 0		@ ctrl register
 	bic	r0, r0, #0x1000 		@ ...i............
 	bic	r0, r0, #0x000e 		@ ............wca.