Commit 9ca5b8a1 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher

drm/amdgpu: add judgement for suspend/resume sequence

S0ix only makes sense on APUs since they are part of the platform, so
only when the ASIC is APU should set amdgpu_acpi_is_s0ix_supported flag
to deal with the related situation.
Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a9c210c1
...@@ -1311,11 +1311,11 @@ int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev); ...@@ -1311,11 +1311,11 @@ int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
void amdgpu_acpi_get_backlight_caps(struct amdgpu_device *adev, void amdgpu_acpi_get_backlight_caps(struct amdgpu_device *adev,
struct amdgpu_dm_backlight_caps *caps); struct amdgpu_dm_backlight_caps *caps);
bool amdgpu_acpi_is_s0ix_supported(void); bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev);
#else #else
static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; } static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { } static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
static inline bool amdgpu_acpi_is_s0ix_supported(void) { return false; } static inline bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev) { return false; }
#endif #endif
int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser, int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser,
......
...@@ -901,10 +901,12 @@ void amdgpu_acpi_fini(struct amdgpu_device *adev) ...@@ -901,10 +901,12 @@ void amdgpu_acpi_fini(struct amdgpu_device *adev)
* *
* returns true if supported, false if not. * returns true if supported, false if not.
*/ */
bool amdgpu_acpi_is_s0ix_supported(void) bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev)
{ {
if (acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0) if (acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0) {
if (adev->flags & AMD_IS_APU)
return true; return true;
}
return false; return false;
} }
...@@ -2650,7 +2650,7 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev) ...@@ -2650,7 +2650,7 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
{ {
int i, r; int i, r;
if (!amdgpu_acpi_is_s0ix_supported() || amdgpu_in_reset(adev)) { if (!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev)) {
amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE); amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE); amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
} }
...@@ -3710,7 +3710,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon) ...@@ -3710,7 +3710,7 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
amdgpu_fence_driver_suspend(adev); amdgpu_fence_driver_suspend(adev);
if (!amdgpu_acpi_is_s0ix_supported() || amdgpu_in_reset(adev)) if (!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev))
r = amdgpu_device_ip_suspend_phase2(adev); r = amdgpu_device_ip_suspend_phase2(adev);
else else
amdgpu_gfx_state_change_set(adev, sGpuChangeState_D3Entry); amdgpu_gfx_state_change_set(adev, sGpuChangeState_D3Entry);
...@@ -3744,7 +3744,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon) ...@@ -3744,7 +3744,7 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon)
if (dev->switch_power_state == DRM_SWITCH_POWER_OFF) if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
return 0; return 0;
if (amdgpu_acpi_is_s0ix_supported()) if (amdgpu_acpi_is_s0ix_supported(adev))
amdgpu_gfx_state_change_set(adev, sGpuChangeState_D0Entry); amdgpu_gfx_state_change_set(adev, sGpuChangeState_D0Entry);
/* post card */ /* post card */
......
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