Commit 9e3489e0 authored by Yong Wu's avatar Yong Wu Committed by Will Deacon

iommu/mediatek: Add mt8192 support

Add mt8192 iommu support.
Signed-off-by: default avatarYong Wu <yong.wu@mediatek.com>
Reviewed-by: default avatarTomasz Figa <tfiga@chromium.org>
Link: https://lore.kernel.org/r/20210111111914.22211-33-yong.wu@mediatek.comSigned-off-by: default avatarWill Deacon <will@kernel.org>
parent 23357572
...@@ -177,6 +177,16 @@ static const struct mtk_iommu_iova_region single_domain[] = { ...@@ -177,6 +177,16 @@ static const struct mtk_iommu_iova_region single_domain[] = {
{.iova_base = 0, .size = SZ_4G}, {.iova_base = 0, .size = SZ_4G},
}; };
static const struct mtk_iommu_iova_region mt8192_multi_dom[] = {
{ .iova_base = 0x0, .size = SZ_4G}, /* disp: 0 ~ 4G */
#if IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT)
{ .iova_base = SZ_4G, .size = SZ_4G}, /* vdec: 4G ~ 8G */
{ .iova_base = SZ_4G * 2, .size = SZ_4G}, /* CAM/MDP: 8G ~ 12G */
{ .iova_base = 0x240000000ULL, .size = 0x4000000}, /* CCU0 */
{ .iova_base = 0x244000000ULL, .size = 0x4000000}, /* CCU1 */
#endif
};
/* /*
* There may be 1 or 2 M4U HWs, But we always expect they are in the same domain * There may be 1 or 2 M4U HWs, But we always expect they are in the same domain
* for the performance. * for the performance.
...@@ -1038,12 +1048,24 @@ static const struct mtk_iommu_plat_data mt8183_data = { ...@@ -1038,12 +1048,24 @@ static const struct mtk_iommu_plat_data mt8183_data = {
.larbid_remap = {{0}, {4}, {5}, {6}, {7}, {2}, {3}, {1}}, .larbid_remap = {{0}, {4}, {5}, {6}, {7}, {2}, {3}, {1}},
}; };
static const struct mtk_iommu_plat_data mt8192_data = {
.m4u_plat = M4U_MT8192,
.flags = HAS_BCLK | HAS_SUB_COMM | OUT_ORDER_WR_EN |
WR_THROT_EN | IOVA_34_EN,
.inv_sel_reg = REG_MMU_INV_SEL_GEN2,
.iova_region = mt8192_multi_dom,
.iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
.larbid_remap = {{0}, {1}, {4, 5}, {7}, {2}, {9, 11, 19, 20},
{0, 14, 16}, {0, 13, 18, 17}},
};
static const struct of_device_id mtk_iommu_of_ids[] = { static const struct of_device_id mtk_iommu_of_ids[] = {
{ .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data}, { .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
{ .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data}, { .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
{ .compatible = "mediatek,mt8167-m4u", .data = &mt8167_data}, { .compatible = "mediatek,mt8167-m4u", .data = &mt8167_data},
{ .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data}, { .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
{ .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data}, { .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
{ .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
{} {}
}; };
......
...@@ -45,6 +45,7 @@ enum mtk_iommu_plat { ...@@ -45,6 +45,7 @@ enum mtk_iommu_plat {
M4U_MT8167, M4U_MT8167,
M4U_MT8173, M4U_MT8173,
M4U_MT8183, M4U_MT8183,
M4U_MT8192,
}; };
struct mtk_iommu_iova_region; struct mtk_iommu_iova_region;
......
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