Commit a013dd15 authored by Judy Cai's avatar Judy Cai Committed by Alex Deucher

drm/amd/display: Change to IMMEDIATE mode from FRAME mode

[Why]
Change in DCN10 to use IMMEDIATE_UPDATE mode for AFMT is not
reflected in DCN30 as it uses VPG.

[How]
Use IMMEDIATE_UPDATE mode for DCN30 in VPG.
Signed-off-by: default avatarJudy Cai <HuiYi.Cai@amd.com>
Reviewed-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Acked-by: default avatarEryk Brol <eryk.brol@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 25331a18
...@@ -103,69 +103,69 @@ static void vpg3_update_generic_info_packet( ...@@ -103,69 +103,69 @@ static void vpg3_update_generic_info_packet(
} }
} }
/* atomically update double-buffered GENERIC0 registers in frame mode /* atomically update double-buffered GENERIC0 registers in immediate mode
* (update at next block_update when block_update_lock == 0). * (update at next block_update when block_update_lock == 0).
*/ */
switch (packet_index) { switch (packet_index) {
case 0: case 0:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC0_FRAME_UPDATE, 1); VPG_GENERIC0_IMMEDIATE_UPDATE, 1);
break; break;
case 1: case 1:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC1_FRAME_UPDATE, 1); VPG_GENERIC1_IMMEDIATE_UPDATE, 1);
break; break;
case 2: case 2:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC2_FRAME_UPDATE, 1); VPG_GENERIC2_IMMEDIATE_UPDATE, 1);
break; break;
case 3: case 3:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC3_FRAME_UPDATE, 1); VPG_GENERIC3_IMMEDIATE_UPDATE, 1);
break; break;
case 4: case 4:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC4_FRAME_UPDATE, 1); VPG_GENERIC4_IMMEDIATE_UPDATE, 1);
break; break;
case 5: case 5:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC5_FRAME_UPDATE, 1); VPG_GENERIC5_IMMEDIATE_UPDATE, 1);
break; break;
case 6: case 6:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC6_FRAME_UPDATE, 1); VPG_GENERIC6_IMMEDIATE_UPDATE, 1);
break; break;
case 7: case 7:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC7_FRAME_UPDATE, 1); VPG_GENERIC7_IMMEDIATE_UPDATE, 1);
break; break;
case 8: case 8:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC8_FRAME_UPDATE, 1); VPG_GENERIC8_IMMEDIATE_UPDATE, 1);
break; break;
case 9: case 9:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC9_FRAME_UPDATE, 1); VPG_GENERIC9_IMMEDIATE_UPDATE, 1);
break; break;
case 10: case 10:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC10_FRAME_UPDATE, 1); VPG_GENERIC10_IMMEDIATE_UPDATE, 1);
break; break;
case 11: case 11:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC11_FRAME_UPDATE, 1); VPG_GENERIC11_IMMEDIATE_UPDATE, 1);
break; break;
case 12: case 12:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC12_FRAME_UPDATE, 1); VPG_GENERIC12_IMMEDIATE_UPDATE, 1);
break; break;
case 13: case 13:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC13_FRAME_UPDATE, 1); VPG_GENERIC13_IMMEDIATE_UPDATE, 1);
break; break;
case 14: case 14:
REG_UPDATE(VPG_GSP_FRAME_UPDATE_CTRL, REG_UPDATE(VPG_GSP_IMMEDIATE_UPDATE_CTRL,
VPG_GENERIC14_FRAME_UPDATE, 1); VPG_GENERIC14_IMMEDIATE_UPDATE, 1);
break; break;
default: default:
break; break;
......
...@@ -34,13 +34,15 @@ ...@@ -34,13 +34,15 @@
SRI(VPG_GENERIC_STATUS, VPG, id), \ SRI(VPG_GENERIC_STATUS, VPG, id), \
SRI(VPG_GENERIC_PACKET_ACCESS_CTRL, VPG, id), \ SRI(VPG_GENERIC_PACKET_ACCESS_CTRL, VPG, id), \
SRI(VPG_GENERIC_PACKET_DATA, VPG, id), \ SRI(VPG_GENERIC_PACKET_DATA, VPG, id), \
SRI(VPG_GSP_FRAME_UPDATE_CTRL, VPG, id) SRI(VPG_GSP_FRAME_UPDATE_CTRL, VPG, id), \
SRI(VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG, id)
struct dcn30_vpg_registers { struct dcn30_vpg_registers {
uint32_t VPG_GENERIC_STATUS; uint32_t VPG_GENERIC_STATUS;
uint32_t VPG_GENERIC_PACKET_ACCESS_CTRL; uint32_t VPG_GENERIC_PACKET_ACCESS_CTRL;
uint32_t VPG_GENERIC_PACKET_DATA; uint32_t VPG_GENERIC_PACKET_DATA;
uint32_t VPG_GSP_FRAME_UPDATE_CTRL; uint32_t VPG_GSP_FRAME_UPDATE_CTRL;
uint32_t VPG_GSP_IMMEDIATE_UPDATE_CTRL;
}; };
#define DCN3_VPG_MASK_SH_LIST(mask_sh)\ #define DCN3_VPG_MASK_SH_LIST(mask_sh)\
...@@ -65,7 +67,22 @@ struct dcn30_vpg_registers { ...@@ -65,7 +67,22 @@ struct dcn30_vpg_registers {
SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC11_FRAME_UPDATE, mask_sh),\ SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC11_FRAME_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC12_FRAME_UPDATE, mask_sh),\ SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC12_FRAME_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC13_FRAME_UPDATE, mask_sh),\ SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC13_FRAME_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC14_FRAME_UPDATE, mask_sh) SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC14_FRAME_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC0_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC1_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC2_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC3_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC4_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC5_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC6_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC7_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC8_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC9_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC10_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC11_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC12_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC13_IMMEDIATE_UPDATE, mask_sh),\
SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC14_IMMEDIATE_UPDATE, mask_sh)
#define VPG_DCN3_REG_FIELD_LIST(type) \ #define VPG_DCN3_REG_FIELD_LIST(type) \
type VPG_GENERIC_CONFLICT_OCCURED;\ type VPG_GENERIC_CONFLICT_OCCURED;\
...@@ -89,7 +106,22 @@ struct dcn30_vpg_registers { ...@@ -89,7 +106,22 @@ struct dcn30_vpg_registers {
type VPG_GENERIC11_FRAME_UPDATE;\ type VPG_GENERIC11_FRAME_UPDATE;\
type VPG_GENERIC12_FRAME_UPDATE;\ type VPG_GENERIC12_FRAME_UPDATE;\
type VPG_GENERIC13_FRAME_UPDATE;\ type VPG_GENERIC13_FRAME_UPDATE;\
type VPG_GENERIC14_FRAME_UPDATE type VPG_GENERIC14_FRAME_UPDATE;\
type VPG_GENERIC0_IMMEDIATE_UPDATE;\
type VPG_GENERIC1_IMMEDIATE_UPDATE;\
type VPG_GENERIC2_IMMEDIATE_UPDATE;\
type VPG_GENERIC3_IMMEDIATE_UPDATE;\
type VPG_GENERIC4_IMMEDIATE_UPDATE;\
type VPG_GENERIC5_IMMEDIATE_UPDATE;\
type VPG_GENERIC6_IMMEDIATE_UPDATE;\
type VPG_GENERIC7_IMMEDIATE_UPDATE;\
type VPG_GENERIC8_IMMEDIATE_UPDATE;\
type VPG_GENERIC9_IMMEDIATE_UPDATE;\
type VPG_GENERIC10_IMMEDIATE_UPDATE;\
type VPG_GENERIC11_IMMEDIATE_UPDATE;\
type VPG_GENERIC12_IMMEDIATE_UPDATE;\
type VPG_GENERIC13_IMMEDIATE_UPDATE;\
type VPG_GENERIC14_IMMEDIATE_UPDATE
struct dcn30_vpg_shift { struct dcn30_vpg_shift {
......
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