Commit a0729eb4 authored by Andrew Morton's avatar Andrew Morton Committed by Linus Torvalds

[PATCH] move consistent_dma_mask to the generic device

From: James Bottomley <James.Bottomley@SteelEye.com>

pci_dev.consistent_dma_mask was introduced to get around problems in the
IA64 Altix machine.

Now, we have a use for it in x86: the aacraid needs coherent memory in a
31 bit address range (2GB).  Unfortunately, x86 is converted to the dma
model, so it can't see the pci_dev by the time coherent memory is
allocated.

The solution to all of this is to move pci_dev.consistent_dma_mask to
dev.coherent_dma_mask and make x86 use it in the dma_alloc_coherent()
calls.

This should allow me to make the aacraid set the coherent mask instead
of using it's current dma_mask juggling.
parent fa9fcf5f
......@@ -20,8 +20,9 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
/* ignore region specifiers */
gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
if (dev == NULL || (*dev->dma_mask < 0xffffffff))
if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
gfp |= GFP_DMA;
ret = (void *)__get_free_pages(gfp, get_order(size));
if (ret != NULL) {
......
......@@ -152,7 +152,7 @@ sn_pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_hand
* pcibr_dmatrans_addr ignores a missing PCIIO_DMA_A64 flag on
* PCI-X buses.
*/
if (hwdev->consistent_dma_mask == ~0UL)
if (hwdev->dev.coherent_dma_mask == ~0UL)
*dma_handle = pcibr_dmatrans_addr(vhdl, NULL, phys_addr, size,
PCIIO_DMA_CMD | PCIIO_DMA_A64);
else {
......@@ -169,7 +169,7 @@ sn_pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_hand
}
}
if (!*dma_handle || *dma_handle > hwdev->consistent_dma_mask) {
if (!*dma_handle || *dma_handle > hwdev->dev.coherent_dma_mask) {
if (dma_map) {
pcibr_dmamap_done(dma_map);
pcibr_dmamap_free(dma_map);
......
......@@ -618,6 +618,7 @@ static void parisc_generic_device_register_recursive( struct parisc_device *dev
tmp1);
/* make the generic dma mask a pointer to the parisc one */
dev->dev.dma_mask = &dev->dma_mask;
dev->dev.coherent_dma_mask = dev->dma_mask;
pr_debug("device_register(%s)\n", dev->dev.bus_id);
device_register(&dev->dev);
}
......
......@@ -372,7 +372,7 @@ static void * pa11_dma_alloc_consistent (struct device *dev, size_t size, dma_ad
** ISA cards will certainly only support 24-bit DMA addressing.
** Not clear if we can, want, or need to support ISA.
*/
if (!dev || *dev->dma_mask != 0xffffffff)
if (!dev || *dev->coherent_dma_mask < 0xffffffff)
gfp |= GFP_DMA;
#endif
return (void *)vaddr;
......
......@@ -183,7 +183,7 @@ void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
gfp |= GFP_DMA;
dma_mask = 0xffffffff;
} else {
dma_mask = hwdev->consistent_dma_mask;
dma_mask = hwdev->dev.coherent_dma_mask;
}
if (dma_mask == 0)
......
......@@ -187,6 +187,7 @@ static int __init eisa_init_device (struct eisa_root_device *root,
edev->dev.parent = root->dev;
edev->dev.bus = &eisa_bus_type;
edev->dev.dma_mask = &edev->dma_mask;
edev->dev.coherent_dma_mask = edev->dma_mask;
sprintf (edev->dev.bus_id, "%02X:%02X", root->bus_nr, slot);
for (i = 0; i < EISA_MAX_RESOURCES; i++) {
......
......@@ -106,6 +106,7 @@ int __init mca_register_device(int bus, struct mca_device *mca_dev)
sprintf (mca_dev->dev.bus_id, "%02d:%02X", bus, mca_dev->slot);
mca_dev->dma_mask = mca_bus->default_dma_mask;
mca_dev->dev.dma_mask = &mca_dev->dma_mask;
mca_dev->dev.coherent_dma_mask = mca_dev->dma_mask;
if (device_register(&mca_dev->dev))
return 0;
......
......@@ -686,7 +686,7 @@ pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
if (!pci_dma_supported(dev, mask))
return -EIO;
dev->consistent_dma_mask = mask;
dev->dev.coherent_dma_mask = mask;
return 0;
}
......
......@@ -570,7 +570,6 @@ pci_scan_device(struct pci_bus *bus, int devfn)
/* Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer)
set this higher, assuming the system even supports it. */
dev->dma_mask = 0xffffffff;
dev->consistent_dma_mask = 0xffffffff;
if (pci_setup_device(dev) < 0) {
kfree(dev);
return NULL;
......@@ -582,6 +581,7 @@ pci_scan_device(struct pci_bus *bus, int devfn)
pci_name_device(dev);
dev->dev.dma_mask = &dev->dma_mask;
dev->dev.coherent_dma_mask = 0xffffffffull;
return dev;
}
......
......@@ -285,6 +285,12 @@ struct device {
detached from its driver. */
u64 *dma_mask; /* dma mask (if dma'able device) */
u64 coherent_dma_mask;/* Like dma_mask, but for
alloc_coherent mappings as
not all hardware supports
64 bit addresses for consistent
allocations such descriptors. */
struct list_head dma_pools; /* dma pools (if dma'ble) */
void (*release)(struct device * dev);
......
......@@ -393,11 +393,6 @@ struct pci_dev {
this if your device has broken DMA
or supports 64-bit transfers. */
u64 consistent_dma_mask;/* Like dma_mask, but for
pci_alloc_consistent mappings as
not all hardware supports
64 bit addresses for consistent
allocations such descriptors. */
u32 current_state; /* Current operating state. In ACPI-speak,
this is D0-D3, D0 being fully functional,
and D3 being off. */
......
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