Skip to content

L
linux
Commit a1c85860 authored by Hiroshi Doyu's avatar Hiroshi Doyu Committed by Stephen Warren
Browse files
Options

ARM: tegra114: convert device tree files to use CLK defines 

Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic
numbers in the device tree. For example,

-               clocks = <&tegra_car 28>;
+               clocks = <&tegra_car CLK_HOST1X>;
Signed-off-by: default avatarHiroshi Doyu <hdoyu@nvidia.com>
[swarren, updated since tegra20-car.h moved for consistency]
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 05849c93
Show whitespace changes
Inline Side-by-side
Showing with 26 additions and 25 deletions
arch/arm/boot/dts/tegra114.dtsi
View file @ a1c85860
#include <dt-bindings/clock/tegra114-car.h>
#include <dt-bindings/gpio/tegra-gpio.h> #include <dt-bindings/gpio/tegra-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
...@@ -35,7 +36,7 @@ timer@60005000 { ...@@ -35,7 +36,7 @@ timer@60005000 {
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 5>; clocks = <&tegra_car TEGRA114_CLK_TIMER>;
}; };
tegra_car: clock { tegra_car: clock {
...@@ -79,7 +80,7 @@ apbdma: dma { ...@@ -79,7 +80,7 @@ apbdma: dma {
<GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 34>; clocks = <&tegra_car TEGRA114_CLK_APBDMA>;
}; };
ahb: ahb { ahb: ahb {
...@@ -125,7 +126,7 @@ uarta: serial@70006000 { ...@@ -125,7 +126,7 @@ uarta: serial@70006000 {
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 8>; nvidia,dma-request-selector = <&apbdma 8>;
status = "disabled"; status = "disabled";
clocks = <&tegra_car 6>; clocks = <&tegra_car TEGRA114_CLK_UARTA>;
}; };
uartb: serial@70006040 { uartb: serial@70006040 {
...@@ -135,7 +136,7 @@ uartb: serial@70006040 { ...@@ -135,7 +136,7 @@ uartb: serial@70006040 {
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 9>; nvidia,dma-request-selector = <&apbdma 9>;
status = "disabled"; status = "disabled";
clocks = <&tegra_car 192>; clocks = <&tegra_car TEGRA114_CLK_UARTB>;
}; };
uartc: serial@70006200 { uartc: serial@70006200 {
...@@ -145,7 +146,7 @@ uartc: serial@70006200 { ...@@ -145,7 +146,7 @@ uartc: serial@70006200 {
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 10>; nvidia,dma-request-selector = <&apbdma 10>;
status = "disabled"; status = "disabled";
clocks = <&tegra_car 55>; clocks = <&tegra_car TEGRA114_CLK_UARTC>;
}; };
uartd: serial@70006300 { uartd: serial@70006300 {
...@@ -155,14 +156,14 @@ uartd: serial@70006300 { ...@@ -155,14 +156,14 @@ uartd: serial@70006300 {
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 19>; nvidia,dma-request-selector = <&apbdma 19>;
status = "disabled"; status = "disabled";
clocks = <&tegra_car 65>; clocks = <&tegra_car TEGRA114_CLK_UARTD>;
}; };
pwm: pwm { pwm: pwm {
compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm"; compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm";
reg = <0x7000a000 0x100>; reg = <0x7000a000 0x100>;
#pwm-cells = <2>; #pwm-cells = <2>;
clocks = <&tegra_car 17>; clocks = <&tegra_car TEGRA114_CLK_PWM>;
status = "disabled"; status = "disabled";
}; };
...@@ -172,7 +173,7 @@ i2c@7000c000 { ...@@ -172,7 +173,7 @@ i2c@7000c000 {
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&tegra_car 12>; clocks = <&tegra_car TEGRA114_CLK_I2C1>;
clock-names = "div-clk"; clock-names = "div-clk";
status = "disabled"; status = "disabled";
}; };
...@@ -183,7 +184,7 @@ i2c@7000c400 { ...@@ -183,7 +184,7 @@ i2c@7000c400 {
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&tegra_car 54>; clocks = <&tegra_car TEGRA114_CLK_I2C2>;
clock-names = "div-clk"; clock-names = "div-clk";
status = "disabled"; status = "disabled";
}; };
...@@ -194,7 +195,7 @@ i2c@7000c500 { ...@@ -194,7 +195,7 @@ i2c@7000c500 {
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&tegra_car 67>; clocks = <&tegra_car TEGRA114_CLK_I2C3>;
clock-names = "div-clk"; clock-names = "div-clk";
status = "disabled"; status = "disabled";
}; };
...@@ -205,7 +206,7 @@ i2c@7000c700 { ...@@ -205,7 +206,7 @@ i2c@7000c700 {
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&tegra_car 103>; clocks = <&tegra_car TEGRA114_CLK_I2C4>;
clock-names = "div-clk"; clock-names = "div-clk";
status = "disabled"; status = "disabled";
}; };
...@@ -216,7 +217,7 @@ i2c@7000d000 { ...@@ -216,7 +217,7 @@ i2c@7000d000 {
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&tegra_car 47>; clocks = <&tegra_car TEGRA114_CLK_I2C5>;
clock-names = "div-clk"; clock-names = "div-clk";
status = "disabled"; status = "disabled";
}; };
...@@ -228,7 +229,7 @@ spi@7000d400 { ...@@ -228,7 +229,7 @@ spi@7000d400 {
nvidia,dma-request-selector = <&apbdma 15>; nvidia,dma-request-selector = <&apbdma 15>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&tegra_car 41>; clocks = <&tegra_car TEGRA114_CLK_SBC1>;
clock-names = "spi"; clock-names = "spi";
status = "disabled"; status = "disabled";
}; };
...@@ -240,7 +241,7 @@ spi@7000d600 { ...@@ -240,7 +241,7 @@ spi@7000d600 {
nvidia,dma-request-selector = <&apbdma 16>; nvidia,dma-request-selector = <&apbdma 16>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&tegra_car 44>; clocks = <&tegra_car TEGRA114_CLK_SBC2>;
clock-names = "spi"; clock-names = "spi";
status = "disabled"; status = "disabled";
}; };
...@@ -252,7 +253,7 @@ spi@7000d800 { ...@@ -252,7 +253,7 @@ spi@7000d800 {
nvidia,dma-request-selector = <&apbdma 17>; nvidia,dma-request-selector = <&apbdma 17>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&tegra_car 46>; clocks = <&tegra_car TEGRA114_CLK_SBC3>;
clock-names = "spi"; clock-names = "spi";
status = "disabled"; status = "disabled";
}; };
...@@ -264,7 +265,7 @@ spi@7000da00 { ...@@ -264,7 +265,7 @@ spi@7000da00 {
nvidia,dma-request-selector = <&apbdma 18>; nvidia,dma-request-selector = <&apbdma 18>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&tegra_car 68>; clocks = <&tegra_car TEGRA114_CLK_SBC4>;
clock-names = "spi"; clock-names = "spi";
status = "disabled"; status = "disabled";
}; };
...@@ -276,7 +277,7 @@ spi@7000dc00 { ...@@ -276,7 +277,7 @@ spi@7000dc00 {
nvidia,dma-request-selector = <&apbdma 27>; nvidia,dma-request-selector = <&apbdma 27>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&tegra_car 104>; clocks = <&tegra_car TEGRA114_CLK_SBC5>;
clock-names = "spi"; clock-names = "spi";
status = "disabled"; status = "disabled";
}; };
...@@ -288,7 +289,7 @@ spi@7000de00 { ...@@ -288,7 +289,7 @@ spi@7000de00 {
nvidia,dma-request-selector = <&apbdma 28>; nvidia,dma-request-selector = <&apbdma 28>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&tegra_car 105>; clocks = <&tegra_car TEGRA114_CLK_SBC6>;
clock-names = "spi"; clock-names = "spi";
status = "disabled"; status = "disabled";
}; };
...@@ -297,21 +298,21 @@ rtc { ...@@ -297,21 +298,21 @@ rtc {
compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc"; compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
reg = <0x7000e000 0x100>; reg = <0x7000e000 0x100>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 4>; clocks = <&tegra_car TEGRA114_CLK_RTC>;
}; };
kbc { kbc {
compatible = "nvidia,tegra114-kbc"; compatible = "nvidia,tegra114-kbc";
reg = <0x7000e200 0x100>; reg = <0x7000e200 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 36>; clocks = <&tegra_car TEGRA114_CLK_KBC>;
status = "disabled"; status = "disabled";
}; };
pmc { pmc {
compatible = "nvidia,tegra114-pmc"; compatible = "nvidia,tegra114-pmc";
reg = <0x7000e400 0x400>; reg = <0x7000e400 0x400>;
clocks = <&tegra_car 261>, <&clk32k_in>; clocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>;
clock-names = "pclk", "clk32k_in"; clock-names = "pclk", "clk32k_in";
}; };
...@@ -330,7 +331,7 @@ sdhci@78000000 { ...@@ -330,7 +331,7 @@ sdhci@78000000 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000000 0x200>; reg = <0x78000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 14>; clocks = <&tegra_car TEGRA114_CLK_SDMMC1>;
status = "disable"; status = "disable";
}; };
...@@ -338,7 +339,7 @@ sdhci@78000200 { ...@@ -338,7 +339,7 @@ sdhci@78000200 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000200 0x200>; reg = <0x78000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 9>; clocks = <&tegra_car TEGRA114_CLK_SDMMC2>;
status = "disable"; status = "disable";
}; };
...@@ -346,7 +347,7 @@ sdhci@78000400 { ...@@ -346,7 +347,7 @@ sdhci@78000400 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000400 0x200>; reg = <0x78000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 69>; clocks = <&tegra_car TEGRA114_CLK_SDMMC3>;
status = "disable"; status = "disable";
}; };
...@@ -354,7 +355,7 @@ sdhci@78000600 { ...@@ -354,7 +355,7 @@ sdhci@78000600 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci"; compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000600 0x200>; reg = <0x78000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 15>; clocks = <&tegra_car TEGRA114_CLK_SDMMC4>;
status = "disable"; status = "disable";
}; };
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7