Commit a4a20fd9 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "Nothing very controversial in here.  Most of the fixes are for OMAP
  this time around, with some orion/kirkwood and a tegra patch mixed in."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: Orion: Fix Virtual/Physical mixup with watchdog
  ARM: Kirkwood: clk_register_gate_fn: add fn assignment
  ARM: Orion5x - Restore parts of io.h, with rework
  ARM: OMAP4: hwmod data: Force HDMI in no-idle while enabled
  ARM: OMAP2+: mux: fix sparse warning
  ARM: OMAP2+: CM: increase the module disable timeout
  ARM: OMAP4: clock data: add clockdomains for clocks used as main clocks
  ARM: OMAP4: hwmod data: fix 32k sync timer idle modes
  ARM: OMAP4+: hwmod: fix issue causing IPs not going back to Smart-Standby
  ARM: OMAP: Fix Beagleboard DVI reset gpio
  arm/dts: OMAP2: Fix interrupt controller binding
  ARM: OMAP2: Fix tusb6010 GPIO interrupt for n8x0
  ARM: OMAP2+: Fix MUSB ifdefs for platform init code
  ARM: tegra: make tegra_cpu_reset_handler_enable() __init
  ARM: OMAP: PM: Lock clocks list while generating summary
  ARM: iconnect: Remove include of removed linux/spi/orion_spi.h
parents 2ecedc47 0fa1f060
...@@ -589,6 +589,7 @@ config ARCH_ORION5X ...@@ -589,6 +589,7 @@ config ARCH_ORION5X
select PCI select PCI
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select NEED_MACH_IO_H
select PLAT_ORION select PLAT_ORION
help help
Support for the following Marvell Orion 5x series SoCs: Support for the following Marvell Orion 5x series SoCs:
......
...@@ -44,6 +44,8 @@ intc: interrupt-controller@1 { ...@@ -44,6 +44,8 @@ intc: interrupt-controller@1 {
compatible = "ti,omap2-intc"; compatible = "ti,omap2-intc";
interrupt-controller; interrupt-controller;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ti,intc-size = <96>;
reg = <0x480FE000 0x1000>;
}; };
uart1: serial@4806a000 { uart1: serial@4806a000 {
......
...@@ -20,9 +20,6 @@ ...@@ -20,9 +20,6 @@
#include <linux/mv643xx_eth.h> #include <linux/mv643xx_eth.h>
#include <linux/gpio.h> #include <linux/gpio.h>
#include <linux/leds.h> #include <linux/leds.h>
#include <linux/spi/flash.h>
#include <linux/spi/spi.h>
#include <linux/spi/orion_spi.h>
#include <linux/i2c.h> #include <linux/i2c.h>
#include <linux/input.h> #include <linux/input.h>
#include <linux/gpio_keys.h> #include <linux/gpio_keys.h>
......
...@@ -159,6 +159,7 @@ static struct clk __init *clk_register_gate_fn(struct device *dev, ...@@ -159,6 +159,7 @@ static struct clk __init *clk_register_gate_fn(struct device *dev,
gate_fn->gate.flags = clk_gate_flags; gate_fn->gate.flags = clk_gate_flags;
gate_fn->gate.lock = lock; gate_fn->gate.lock = lock;
gate_fn->gate.hw.init = &init; gate_fn->gate.hw.init = &init;
gate_fn->fn = fn;
/* ops is the gate ops, but with our disable function */ /* ops is the gate ops, but with our disable function */
if (clk_gate_fn_ops.disable != clk_gate_fn_disable) { if (clk_gate_fn_ops.disable != clk_gate_fn_disable) {
......
...@@ -38,6 +38,7 @@ ...@@ -38,6 +38,7 @@
#define IRQ_MASK_HIGH_OFF 0x0014 #define IRQ_MASK_HIGH_OFF 0x0014
#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) #define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) #define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
#define L2_WRITETHROUGH 0x00000010 #define L2_WRITETHROUGH 0x00000010
......
...@@ -80,6 +80,7 @@ ...@@ -80,6 +80,7 @@
#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) #define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100)
#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) #define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
#define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x20000)
#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x30000) #define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x30000)
......
...@@ -83,11 +83,9 @@ static struct musb_hdrc_config musb_config = { ...@@ -83,11 +83,9 @@ static struct musb_hdrc_config musb_config = {
}; };
static struct musb_hdrc_platform_data tusb_data = { static struct musb_hdrc_platform_data tusb_data = {
#if defined(CONFIG_USB_MUSB_OTG) #ifdef CONFIG_USB_GADGET_MUSB_HDRC
.mode = MUSB_OTG, .mode = MUSB_OTG,
#elif defined(CONFIG_USB_MUSB_PERIPHERAL) #else
.mode = MUSB_PERIPHERAL,
#else /* defined(CONFIG_USB_MUSB_HOST) */
.mode = MUSB_HOST, .mode = MUSB_HOST,
#endif #endif
.set_power = tusb_set_power, .set_power = tusb_set_power,
......
...@@ -81,13 +81,13 @@ static u8 omap3_beagle_version; ...@@ -81,13 +81,13 @@ static u8 omap3_beagle_version;
static struct { static struct {
int mmc1_gpio_wp; int mmc1_gpio_wp;
int usb_pwr_level; int usb_pwr_level;
int reset_gpio; int dvi_pd_gpio;
int usr_button_gpio; int usr_button_gpio;
int mmc_caps; int mmc_caps;
} beagle_config = { } beagle_config = {
.mmc1_gpio_wp = -EINVAL, .mmc1_gpio_wp = -EINVAL,
.usb_pwr_level = GPIOF_OUT_INIT_LOW, .usb_pwr_level = GPIOF_OUT_INIT_LOW,
.reset_gpio = 129, .dvi_pd_gpio = -EINVAL,
.usr_button_gpio = 4, .usr_button_gpio = 4,
.mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, .mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
}; };
...@@ -126,21 +126,21 @@ static void __init omap3_beagle_init_rev(void) ...@@ -126,21 +126,21 @@ static void __init omap3_beagle_init_rev(void)
printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n"); printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n");
omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX; omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX;
beagle_config.mmc1_gpio_wp = 29; beagle_config.mmc1_gpio_wp = 29;
beagle_config.reset_gpio = 170; beagle_config.dvi_pd_gpio = 170;
beagle_config.usr_button_gpio = 7; beagle_config.usr_button_gpio = 7;
break; break;
case 6: case 6:
printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n"); printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n");
omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3; omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3;
beagle_config.mmc1_gpio_wp = 23; beagle_config.mmc1_gpio_wp = 23;
beagle_config.reset_gpio = 170; beagle_config.dvi_pd_gpio = 170;
beagle_config.usr_button_gpio = 7; beagle_config.usr_button_gpio = 7;
break; break;
case 5: case 5:
printk(KERN_INFO "OMAP3 Beagle Rev: C4\n"); printk(KERN_INFO "OMAP3 Beagle Rev: C4\n");
omap3_beagle_version = OMAP3BEAGLE_BOARD_C4; omap3_beagle_version = OMAP3BEAGLE_BOARD_C4;
beagle_config.mmc1_gpio_wp = 23; beagle_config.mmc1_gpio_wp = 23;
beagle_config.reset_gpio = 170; beagle_config.dvi_pd_gpio = 170;
beagle_config.usr_button_gpio = 7; beagle_config.usr_button_gpio = 7;
break; break;
case 0: case 0:
...@@ -274,11 +274,9 @@ static int beagle_twl_gpio_setup(struct device *dev, ...@@ -274,11 +274,9 @@ static int beagle_twl_gpio_setup(struct device *dev,
if (r) if (r)
pr_err("%s: unable to configure nDVI_PWR_EN\n", pr_err("%s: unable to configure nDVI_PWR_EN\n",
__func__); __func__);
r = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH,
"DVI_LDO_EN"); beagle_config.dvi_pd_gpio = gpio + 2;
if (r)
pr_err("%s: unable to configure DVI_LDO_EN\n",
__func__);
} else { } else {
/* /*
* REVISIT: need ehci-omap hooks for external VBUS * REVISIT: need ehci-omap hooks for external VBUS
...@@ -287,7 +285,7 @@ static int beagle_twl_gpio_setup(struct device *dev, ...@@ -287,7 +285,7 @@ static int beagle_twl_gpio_setup(struct device *dev,
if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC")) if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC"))
pr_err("%s: unable to configure EHCI_nOC\n", __func__); pr_err("%s: unable to configure EHCI_nOC\n", __func__);
} }
dvi_panel.power_down_gpio = beagle_config.reset_gpio; dvi_panel.power_down_gpio = beagle_config.dvi_pd_gpio;
gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level, gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level,
"nEN_USB_PWR"); "nEN_USB_PWR");
...@@ -499,7 +497,7 @@ static void __init omap3_beagle_init(void) ...@@ -499,7 +497,7 @@ static void __init omap3_beagle_init(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap3_beagle_init_rev(); omap3_beagle_init_rev();
if (beagle_config.mmc1_gpio_wp != -EINVAL) if (gpio_is_valid(beagle_config.mmc1_gpio_wp))
omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);
mmc[0].caps = beagle_config.mmc_caps; mmc[0].caps = beagle_config.mmc_caps;
omap_hsmmc_init(mmc); omap_hsmmc_init(mmc);
...@@ -510,15 +508,13 @@ static void __init omap3_beagle_init(void) ...@@ -510,15 +508,13 @@ static void __init omap3_beagle_init(void)
platform_add_devices(omap3_beagle_devices, platform_add_devices(omap3_beagle_devices,
ARRAY_SIZE(omap3_beagle_devices)); ARRAY_SIZE(omap3_beagle_devices));
if (gpio_is_valid(beagle_config.dvi_pd_gpio))
omap_mux_init_gpio(beagle_config.dvi_pd_gpio, OMAP_PIN_OUTPUT);
omap_display_init(&beagle_dss_data); omap_display_init(&beagle_dss_data);
omap_serial_init(); omap_serial_init();
omap_sdrc_init(mt46h32m32lf6_sdrc_params, omap_sdrc_init(mt46h32m32lf6_sdrc_params,
mt46h32m32lf6_sdrc_params); mt46h32m32lf6_sdrc_params);
omap_mux_init_gpio(170, OMAP_PIN_INPUT);
/* REVISIT leave DVI powered down until it's needed ... */
gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD");
usb_musb_init(NULL); usb_musb_init(NULL);
usbhs_init(&usbhs_bdata); usbhs_init(&usbhs_bdata);
omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions,
......
...@@ -84,6 +84,7 @@ static struct clk slimbus_clk = { ...@@ -84,6 +84,7 @@ static struct clk slimbus_clk = {
static struct clk sys_32k_ck = { static struct clk sys_32k_ck = {
.name = "sys_32k_ck", .name = "sys_32k_ck",
.clkdm_name = "prm_clkdm",
.rate = 32768, .rate = 32768,
.ops = &clkops_null, .ops = &clkops_null,
}; };
...@@ -512,6 +513,7 @@ static struct clk ddrphy_ck = { ...@@ -512,6 +513,7 @@ static struct clk ddrphy_ck = {
.name = "ddrphy_ck", .name = "ddrphy_ck",
.parent = &dpll_core_m2_ck, .parent = &dpll_core_m2_ck,
.ops = &clkops_null, .ops = &clkops_null,
.clkdm_name = "l3_emif_clkdm",
.fixed_div = 2, .fixed_div = 2,
.recalc = &omap_fixed_divisor_recalc, .recalc = &omap_fixed_divisor_recalc,
}; };
...@@ -769,6 +771,7 @@ static const struct clksel dpll_mpu_m2_div[] = { ...@@ -769,6 +771,7 @@ static const struct clksel dpll_mpu_m2_div[] = {
static struct clk dpll_mpu_m2_ck = { static struct clk dpll_mpu_m2_ck = {
.name = "dpll_mpu_m2_ck", .name = "dpll_mpu_m2_ck",
.parent = &dpll_mpu_ck, .parent = &dpll_mpu_ck,
.clkdm_name = "cm_clkdm",
.clksel = dpll_mpu_m2_div, .clksel = dpll_mpu_m2_div,
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU, .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
...@@ -1149,6 +1152,7 @@ static const struct clksel l3_div_div[] = { ...@@ -1149,6 +1152,7 @@ static const struct clksel l3_div_div[] = {
static struct clk l3_div_ck = { static struct clk l3_div_ck = {
.name = "l3_div_ck", .name = "l3_div_ck",
.parent = &div_core_ck, .parent = &div_core_ck,
.clkdm_name = "cm_clkdm",
.clksel = l3_div_div, .clksel = l3_div_div,
.clksel_reg = OMAP4430_CM_CLKSEL_CORE, .clksel_reg = OMAP4430_CM_CLKSEL_CORE,
.clksel_mask = OMAP4430_CLKSEL_L3_MASK, .clksel_mask = OMAP4430_CLKSEL_L3_MASK,
...@@ -2824,6 +2828,7 @@ static const struct clksel trace_clk_div_div[] = { ...@@ -2824,6 +2828,7 @@ static const struct clksel trace_clk_div_div[] = {
static struct clk trace_clk_div_ck = { static struct clk trace_clk_div_ck = {
.name = "trace_clk_div_ck", .name = "trace_clk_div_ck",
.parent = &pmd_trace_clk_mux_ck, .parent = &pmd_trace_clk_mux_ck,
.clkdm_name = "emu_sys_clkdm",
.clksel = trace_clk_div_div, .clksel = trace_clk_div_div,
.clksel_reg = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL, .clksel_reg = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL,
.clksel_mask = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK, .clksel_mask = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK,
......
...@@ -22,4 +22,15 @@ ...@@ -22,4 +22,15 @@
*/ */
#define MAX_MODULE_READY_TIME 2000 #define MAX_MODULE_READY_TIME 2000
/*
* MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
* the PRCM to request that a module enter the inactive state in the
* case of OMAP2 & 3. In the case of OMAP4 this is the max duration
* in microseconds for the module to reach the inactive state from
* a functional state.
* XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during
* kernel init.
*/
#define MAX_MODULE_DISABLE_TIME 5000
#endif #endif
...@@ -313,9 +313,9 @@ int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_off ...@@ -313,9 +313,9 @@ int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_off
omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) == omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) ==
CLKCTRL_IDLEST_DISABLED), CLKCTRL_IDLEST_DISABLED),
MAX_MODULE_READY_TIME, i); MAX_MODULE_DISABLE_TIME, i);
return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; return (i < MAX_MODULE_DISABLE_TIME) ? 0 : -EBUSY;
} }
/** /**
......
...@@ -41,6 +41,7 @@ ...@@ -41,6 +41,7 @@
#include "control.h" #include "control.h"
#include "mux.h" #include "mux.h"
#include "prm.h" #include "prm.h"
#include "common.h"
#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
#define OMAP_MUX_BASE_SZ 0x5ca #define OMAP_MUX_BASE_SZ 0x5ca
......
...@@ -530,7 +530,7 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) ...@@ -530,7 +530,7 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
_set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
/* XXX test pwrdm_get_wken for this hwmod's subsystem */ /* XXX test pwrdm_get_wken for this hwmod's subsystem */
......
...@@ -393,8 +393,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = { ...@@ -393,8 +393,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
.rev_offs = 0x0000, .rev_offs = 0x0000,
.sysc_offs = 0x0004, .sysc_offs = 0x0004,
.sysc_flags = SYSC_HAS_SIDLEMODE, .sysc_flags = SYSC_HAS_SIDLEMODE,
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | .idlemodes = (SIDLE_FORCE | SIDLE_NO),
SIDLE_SMART_WKUP),
.sysc_fields = &omap_hwmod_sysc_type1, .sysc_fields = &omap_hwmod_sysc_type1,
}; };
...@@ -854,6 +853,11 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { ...@@ -854,6 +853,11 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
.name = "dss_hdmi", .name = "dss_hdmi",
.class = &omap44xx_hdmi_hwmod_class, .class = &omap44xx_hdmi_hwmod_class,
.clkdm_name = "l3_dss_clkdm", .clkdm_name = "l3_dss_clkdm",
/*
* HDMI audio requires to use no-idle mode. Hence,
* set idle mode by software.
*/
.flags = HWMOD_SWSUP_SIDLE,
.mpu_irqs = omap44xx_dss_hdmi_irqs, .mpu_irqs = omap44xx_dss_hdmi_irqs,
.sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
.main_clk = "dss_48mhz_clk", .main_clk = "dss_48mhz_clk",
......
...@@ -239,21 +239,15 @@ void am35x_set_mode(u8 musb_mode) ...@@ -239,21 +239,15 @@ void am35x_set_mode(u8 musb_mode)
devconf2 &= ~CONF2_OTGMODE; devconf2 &= ~CONF2_OTGMODE;
switch (musb_mode) { switch (musb_mode) {
#ifdef CONFIG_USB_MUSB_HDRC_HCD
case MUSB_HOST: /* Force VBUS valid, ID = 0 */ case MUSB_HOST: /* Force VBUS valid, ID = 0 */
devconf2 |= CONF2_FORCE_HOST; devconf2 |= CONF2_FORCE_HOST;
break; break;
#endif
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */ case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
devconf2 |= CONF2_FORCE_DEVICE; devconf2 |= CONF2_FORCE_DEVICE;
break; break;
#endif
#ifdef CONFIG_USB_MUSB_OTG
case MUSB_OTG: /* Don't override the VBUS/ID comparators */ case MUSB_OTG: /* Don't override the VBUS/ID comparators */
devconf2 |= CONF2_NO_OVERRIDE; devconf2 |= CONF2_NO_OVERRIDE;
break; break;
#endif
default: default:
pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode); pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
} }
......
...@@ -41,12 +41,10 @@ static struct musb_hdrc_config musb_config = { ...@@ -41,12 +41,10 @@ static struct musb_hdrc_config musb_config = {
}; };
static struct musb_hdrc_platform_data musb_plat = { static struct musb_hdrc_platform_data musb_plat = {
#ifdef CONFIG_USB_MUSB_OTG #ifdef CONFIG_USB_GADGET_MUSB_HDRC
.mode = MUSB_OTG, .mode = MUSB_OTG,
#elif defined(CONFIG_USB_MUSB_HDRC_HCD) #else
.mode = MUSB_HOST, .mode = MUSB_HOST,
#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
.mode = MUSB_PERIPHERAL,
#endif #endif
/* .clock is set dynamically */ /* .clock is set dynamically */
.config = &musb_config, .config = &musb_config,
......
...@@ -300,7 +300,7 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data, ...@@ -300,7 +300,7 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
printk(error, 3, status); printk(error, 3, status);
return status; return status;
} }
tusb_resources[2].start = irq + IH_GPIO_BASE; tusb_resources[2].start = gpio_to_irq(irq);
/* set up memory timings ... can speed them up later */ /* set up memory timings ... can speed them up later */
if (!ps_refclk) { if (!ps_refclk) {
......
...@@ -35,5 +35,5 @@ ...@@ -35,5 +35,5 @@
#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204) #define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204)
#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300) #define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300)
#define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE | 0x300)
#endif #endif
/*
* arch/arm/mach-orion5x/include/mach/io.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
#include <mach/orion5x.h>
#include <asm/sizes.h>
#define IO_SPACE_LIMIT SZ_2M
static inline void __iomem *__io(unsigned long addr)
{
return (void __iomem *)(addr + ORION5X_PCIE_IO_VIRT_BASE);
}
#define __io(a) __io(a)
#endif
...@@ -82,6 +82,7 @@ ...@@ -82,6 +82,7 @@
#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100) #define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100)
#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000) #define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000)
#define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x20000)
#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000) #define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000)
......
...@@ -33,7 +33,7 @@ ...@@ -33,7 +33,7 @@
static bool is_enabled; static bool is_enabled;
static void tegra_cpu_reset_handler_enable(void) static void __init tegra_cpu_reset_handler_enable(void)
{ {
void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE); void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE);
void __iomem *evp_cpu_reset = void __iomem *evp_cpu_reset =
......
...@@ -461,6 +461,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused) ...@@ -461,6 +461,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused)
struct clk *c; struct clk *c;
struct clk *pa; struct clk *pa;
mutex_lock(&clocks_mutex);
seq_printf(s, "%-30s %-30s %-10s %s\n", seq_printf(s, "%-30s %-30s %-10s %s\n",
"clock-name", "parent-name", "rate", "use-count"); "clock-name", "parent-name", "rate", "use-count");
...@@ -469,6 +470,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused) ...@@ -469,6 +470,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused)
seq_printf(s, "%-30s %-30s %-10lu %d\n", seq_printf(s, "%-30s %-30s %-10lu %d\n",
c->name, pa ? pa->name : "none", c->rate, c->usecount); c->name, pa ? pa->name : "none", c->rate, c->usecount);
} }
mutex_unlock(&clocks_mutex);
return 0; return 0;
} }
......
...@@ -582,7 +582,7 @@ void __init orion_spi_1_init(unsigned long mapbase) ...@@ -582,7 +582,7 @@ void __init orion_spi_1_init(unsigned long mapbase)
* Watchdog * Watchdog
****************************************************************************/ ****************************************************************************/
static struct resource orion_wdt_resource = static struct resource orion_wdt_resource =
DEFINE_RES_MEM(TIMER_VIRT_BASE, 0x28); DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28);
static struct platform_device orion_wdt_device = { static struct platform_device orion_wdt_device = {
.name = "orion_wdt", .name = "orion_wdt",
......
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