Commit a4a5a430 authored by Ryder Lee's avatar Ryder Lee Committed by Felix Fietkau

mt76: mt7615: fix TSF configuration

The index of TSF counters should follow HWBSSID.

Fixes: d8d59f66 ("mt76: mt7615: support 16 interfaces")
Signed-off-by: default avatarRyder Lee <ryder.lee@mediatek.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent f76e9019
...@@ -1005,6 +1005,7 @@ void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta, ...@@ -1005,6 +1005,7 @@ void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
struct mt7615_dev *dev = phy->dev; struct mt7615_dev *dev = phy->dev;
struct mt7615_rate_desc rd; struct mt7615_rate_desc rd;
u32 w5, w27, addr; u32 w5, w27, addr;
u16 idx = sta->vif->mt76.omac_idx;
if (!mt76_is_mmio(&dev->mt76)) { if (!mt76_is_mmio(&dev->mt76)) {
mt7615_mac_queue_rate_update(phy, sta, probe_rate, rates); mt7615_mac_queue_rate_update(phy, sta, probe_rate, rates);
...@@ -1056,7 +1057,10 @@ void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta, ...@@ -1056,7 +1057,10 @@ void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
mt76_wr(dev, addr + 27 * 4, w27); mt76_wr(dev, addr + 27 * 4, w27);
mt76_set(dev, MT_LPON_T0CR, MT_LPON_T0CR_MODE); /* TSF read */ idx = idx > HW_BSSID_MAX ? HW_BSSID_0 : idx;
addr = idx > 1 ? MT_LPON_TCR2(idx): MT_LPON_TCR0(idx);
mt76_set(dev, addr, MT_LPON_TCR_MODE); /* TSF read */
sta->rate_set_tsf = mt76_rr(dev, MT_LPON_UTTR0) & ~BIT(0); sta->rate_set_tsf = mt76_rr(dev, MT_LPON_UTTR0) & ~BIT(0);
sta->rate_set_tsf |= rd.rateset; sta->rate_set_tsf |= rd.rateset;
......
...@@ -818,15 +818,21 @@ mt7615_get_stats(struct ieee80211_hw *hw, ...@@ -818,15 +818,21 @@ mt7615_get_stats(struct ieee80211_hw *hw,
static u64 static u64
mt7615_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) mt7615_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
{ {
struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
struct mt7615_dev *dev = mt7615_hw_dev(hw); struct mt7615_dev *dev = mt7615_hw_dev(hw);
union { union {
u64 t64; u64 t64;
u32 t32[2]; u32 t32[2];
} tsf; } tsf;
u16 idx = mvif->mt76.omac_idx;
u32 reg;
idx = idx > HW_BSSID_MAX ? HW_BSSID_0 : idx;
reg = idx > 1 ? MT_LPON_TCR2(idx): MT_LPON_TCR0(idx);
mt7615_mutex_acquire(dev); mt7615_mutex_acquire(dev);
mt76_set(dev, MT_LPON_T0CR, MT_LPON_T0CR_MODE); /* TSF read */ mt76_set(dev, reg, MT_LPON_TCR_MODE); /* TSF read */
tsf.t32[0] = mt76_rr(dev, MT_LPON_UTTR0); tsf.t32[0] = mt76_rr(dev, MT_LPON_UTTR0);
tsf.t32[1] = mt76_rr(dev, MT_LPON_UTTR1); tsf.t32[1] = mt76_rr(dev, MT_LPON_UTTR1);
...@@ -839,18 +845,24 @@ static void ...@@ -839,18 +845,24 @@ static void
mt7615_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, mt7615_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
u64 timestamp) u64 timestamp)
{ {
struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
struct mt7615_dev *dev = mt7615_hw_dev(hw); struct mt7615_dev *dev = mt7615_hw_dev(hw);
union { union {
u64 t64; u64 t64;
u32 t32[2]; u32 t32[2];
} tsf = { .t64 = timestamp, }; } tsf = { .t64 = timestamp, };
u16 idx = mvif->mt76.omac_idx;
u32 reg;
idx = idx > HW_BSSID_MAX ? HW_BSSID_0 : idx;
reg = idx > 1 ? MT_LPON_TCR2(idx): MT_LPON_TCR0(idx);
mt7615_mutex_acquire(dev); mt7615_mutex_acquire(dev);
mt76_wr(dev, MT_LPON_UTTR0, tsf.t32[0]); mt76_wr(dev, MT_LPON_UTTR0, tsf.t32[0]);
mt76_wr(dev, MT_LPON_UTTR1, tsf.t32[1]); mt76_wr(dev, MT_LPON_UTTR1, tsf.t32[1]);
/* TSF software overwrite */ /* TSF software overwrite */
mt76_set(dev, MT_LPON_T0CR, MT_LPON_T0CR_WRITE); mt76_set(dev, reg, MT_LPON_TCR_WRITE);
mt7615_mutex_release(dev); mt7615_mutex_release(dev);
} }
......
...@@ -449,9 +449,10 @@ enum mt7615_reg_base { ...@@ -449,9 +449,10 @@ enum mt7615_reg_base {
#define MT_LPON(_n) ((dev)->reg_map[MT_LPON_BASE] + (_n)) #define MT_LPON(_n) ((dev)->reg_map[MT_LPON_BASE] + (_n))
#define MT_LPON_T0CR MT_LPON(0x010) #define MT_LPON_TCR0(_n) MT_LPON(0x010 + ((_n) * 4))
#define MT_LPON_T0CR_MODE GENMASK(1, 0) #define MT_LPON_TCR2(_n) MT_LPON(0x0f8 + ((_n) - 2) * 4)
#define MT_LPON_T0CR_WRITE BIT(0) #define MT_LPON_TCR_MODE GENMASK(1, 0)
#define MT_LPON_TCR_WRITE BIT(0)
#define MT_LPON_UTTR0 MT_LPON(0x018) #define MT_LPON_UTTR0 MT_LPON(0x018)
#define MT_LPON_UTTR1 MT_LPON(0x01c) #define MT_LPON_UTTR1 MT_LPON(0x01c)
......
...@@ -67,6 +67,7 @@ static int mt7663_usb_sdio_set_rates(struct mt7615_dev *dev, ...@@ -67,6 +67,7 @@ static int mt7663_usb_sdio_set_rates(struct mt7615_dev *dev,
struct mt7615_rate_desc *rate = &wrd->rate; struct mt7615_rate_desc *rate = &wrd->rate;
struct mt7615_sta *sta = wrd->sta; struct mt7615_sta *sta = wrd->sta;
u32 w5, w27, addr, val; u32 w5, w27, addr, val;
u16 idx = sta->vif->mt76.omac_idx;
lockdep_assert_held(&dev->mt76.mutex); lockdep_assert_held(&dev->mt76.mutex);
...@@ -118,7 +119,10 @@ static int mt7663_usb_sdio_set_rates(struct mt7615_dev *dev, ...@@ -118,7 +119,10 @@ static int mt7663_usb_sdio_set_rates(struct mt7615_dev *dev,
sta->rate_probe = sta->rateset[rate->rateset].probe_rate.idx != -1; sta->rate_probe = sta->rateset[rate->rateset].probe_rate.idx != -1;
mt76_set(dev, MT_LPON_T0CR, MT_LPON_T0CR_MODE); /* TSF read */ idx = idx > HW_BSSID_MAX ? HW_BSSID_0 : idx;
addr = idx > 1 ? MT_LPON_TCR2(idx): MT_LPON_TCR0(idx);
mt76_set(dev, addr, MT_LPON_TCR_MODE); /* TSF read */
val = mt76_rr(dev, MT_LPON_UTTR0); val = mt76_rr(dev, MT_LPON_UTTR0);
sta->rate_set_tsf = (val & ~BIT(0)) | rate->rateset; sta->rate_set_tsf = (val & ~BIT(0)) | rate->rateset;
......
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