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Commit a4ec1eff authored by Ingo Molnar's avatar Ingo Molnar
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x86: mach-voyager, lindent 

lindent the mach-voyager files to get rid of more than 300 style errors:

                                       errors   lines of code   errors/KLOC
 arch/x86/mach-voyager/   [old]           409            3729         109.6
 arch/x86/mach-voyager/   [new]            71            3678          19.3
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 31183ba8
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Showing with 718 additions and 771 deletions
arch/x86/mach-voyager/setup.c
View file @ a4ec1eff
......@@ -44,7 +44,7 @@ void __init trap_init_hook(void)
{
}
static struct irqaction irq0 = {
static struct irqaction irq0 = {
.handler = timer_interrupt,
.flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
.mask = CPU_MASK_NONE,
......@@ -59,44 +59,47 @@ void __init time_init_hook(void)
/* Hook for machine specific memory setup. */
char * __init machine_specific_memory_setup(void)
char *__init machine_specific_memory_setup(void)
{
char *who;
who = "NOT VOYAGER";
if(voyager_level == 5) {
if (voyager_level == 5) {
__u32 addr, length;
int i;
who = "Voyager-SUS";
e820.nr_map = 0;
for(i=0; voyager_memory_detect(i, &addr, &length); i++) {
for (i = 0; voyager_memory_detect(i, &addr, &length); i++) {
add_memory_region(addr, length, E820_RAM);
}
return who;
} else if(voyager_level == 4) {
} else if (voyager_level == 4) {
__u32 tom;
__u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT)<<8;
__u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT) << 8;
/* select the DINO config space */
outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT);
/* Read DINO top of memory register */
tom = ((inb(catbase + 0x4) & 0xf0) << 16)
+ ((inb(catbase + 0x5) & 0x7f) << 24);
+ ((inb(catbase + 0x5) & 0x7f) << 24);
if(inb(catbase) != VOYAGER_DINO) {
printk(KERN_ERR "Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n");
tom = (boot_params.screen_info.ext_mem_k)<<10;
if (inb(catbase) != VOYAGER_DINO) {
printk(KERN_ERR
"Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n");
tom = (boot_params.screen_info.ext_mem_k) << 10;
}
who = "Voyager-TOM";
add_memory_region(0, 0x9f000, E820_RAM);
/* map from 1M to top of memory */
add_memory_region(1*1024*1024, tom - 1*1024*1024, E820_RAM);
add_memory_region(1 * 1024 * 1024, tom - 1 * 1024 * 1024,
E820_RAM);
/* FIXME: Should check the ASICs to see if I need to
* take out the 8M window. Just do it at the moment
* */
add_memory_region(8*1024*1024, 8*1024*1024, E820_RESERVED);
add_memory_region(8 * 1024 * 1024, 8 * 1024 * 1024,
E820_RESERVED);
return who;
}
......@@ -114,8 +117,7 @@ char * __init machine_specific_memory_setup(void)
unsigned long mem_size;
/* compare results from other methods and take the greater */
if (boot_params.alt_mem_k
< boot_params.screen_info.ext_mem_k) {
if (boot_params.alt_mem_k < boot_params.screen_info.ext_mem_k) {
mem_size = boot_params.screen_info.ext_mem_k;
who = "BIOS-88";
} else {
......@@ -126,6 +128,6 @@ char * __init machine_specific_memory_setup(void)
e820.nr_map = 0;
add_memory_region(0, LOWMEMSIZE(), E820_RAM);
add_memory_region(HIGH_MEMORY, mem_size << 10, E820_RAM);
}
}
return who;
}
arch/x86/mach-voyager/voyager_basic.c
View file @ a4ec1eff
......@@ -35,7 +35,7 @@
/*
* Power off function, if any
*/
void (*pm_power_off)(void);
void (*pm_power_off) (void);
EXPORT_SYMBOL(pm_power_off);
int voyager_level = 0;
......@@ -43,39 +43,38 @@ int voyager_level = 0;
struct voyager_SUS *voyager_SUS = NULL;
#ifdef CONFIG_SMP
static void
voyager_dump(int dummy1, struct tty_struct *dummy3)
static void voyager_dump(int dummy1, struct tty_struct *dummy3)
{
/* get here via a sysrq */
voyager_smp_dump();
}
static struct sysrq_key_op sysrq_voyager_dump_op = {
.handler = voyager_dump,
.help_msg = "Voyager",
.action_msg = "Dump Voyager Status",
.handler = voyager_dump,
.help_msg = "Voyager",
.action_msg = "Dump Voyager Status",
};
#endif
void
voyager_detect(struct voyager_bios_info *bios)
void voyager_detect(struct voyager_bios_info *bios)
{
if(bios->len != 0xff) {
int class = (bios->class_1 << 8)
| (bios->class_2 & 0xff);
if (bios->len != 0xff) {
int class = (bios->class_1 << 8)
| (bios->class_2 & 0xff);
printk("Voyager System detected.\n"
" Class %x, Revision %d.%d\n",
class, bios->major, bios->minor);
if(class == VOYAGER_LEVEL4)
if (class == VOYAGER_LEVEL4)
voyager_level = 4;
else if(class < VOYAGER_LEVEL5_AND_ABOVE)
else if (class < VOYAGER_LEVEL5_AND_ABOVE)
voyager_level = 3;
else
voyager_level = 5;
printk(" Architecture Level %d\n", voyager_level);
if(voyager_level < 4)
printk("\n**WARNING**: Voyager HAL only supports Levels 4 and 5 Architectures at the moment\n\n");
if (voyager_level < 4)
printk
("\n**WARNING**: Voyager HAL only supports Levels 4 and 5 Architectures at the moment\n\n");
/* install the power off handler */
pm_power_off = voyager_power_off;
#ifdef CONFIG_SMP
......@@ -86,15 +85,13 @@ voyager_detect(struct voyager_bios_info *bios)
}
}
void
voyager_system_interrupt(int cpl, void *dev_id)
void voyager_system_interrupt(int cpl, void *dev_id)
{
printk("Voyager: detected system interrupt\n");
}
/* Routine to read information from the extended CMOS area */
__u8
voyager_extended_cmos_read(__u16 addr)
__u8 voyager_extended_cmos_read(__u16 addr)
{
outb(addr & 0xff, 0x74);
outb((addr >> 8) & 0xff, 0x75);
......@@ -108,12 +105,11 @@ voyager_extended_cmos_read(__u16 addr)
typedef struct ClickMap {
struct Entry {
__u32 Address;
__u32 Length;
__u32 Address;
__u32 Length;
} Entry[CLICK_ENTRIES];
} ClickMap_t;
/* This routine is pretty much an awful hack to read the bios clickmap by
* mapping it into page 0. There are usually three regions in the map:
* Base Memory
......@@ -122,8 +118,7 @@ typedef struct ClickMap {
*
* Returns are 0 for failure and 1 for success on extracting region.
*/
int __init
voyager_memory_detect(int region, __u32 *start, __u32 *length)
int __init voyager_memory_detect(int region, __u32 * start, __u32 * length)
{
int i;
int retval = 0;
......@@ -132,13 +127,14 @@ voyager_memory_detect(int region, __u32 *start, __u32 *length)
unsigned long map_addr;
unsigned long old;
if(region >= CLICK_ENTRIES) {
if (region >= CLICK_ENTRIES) {
printk("Voyager: Illegal ClickMap region %d\n", region);
return 0;
}
for(i = 0; i < sizeof(cmos); i++)
cmos[i] = voyager_extended_cmos_read(VOYAGER_MEMORY_CLICKMAP + i);
for (i = 0; i < sizeof(cmos); i++)
cmos[i] =
voyager_extended_cmos_read(VOYAGER_MEMORY_CLICKMAP + i);
map_addr = *(unsigned long *)cmos;
......@@ -147,10 +143,10 @@ voyager_memory_detect(int region, __u32 *start, __u32 *length)
pg0[0] = ((map_addr & PAGE_MASK) | _PAGE_RW | _PAGE_PRESENT);
local_flush_tlb();
/* now clear everything out but page 0 */
map = (ClickMap_t *)(map_addr & (~PAGE_MASK));
map = (ClickMap_t *) (map_addr & (~PAGE_MASK));
/* zero length is the end of the clickmap */
if(map->Entry[region].Length != 0) {
if (map->Entry[region].Length != 0) {
*length = map->Entry[region].Length * CLICK_SIZE;
*start = map->Entry[region].Address;
retval = 1;
......@@ -165,10 +161,9 @@ voyager_memory_detect(int region, __u32 *start, __u32 *length)
/* voyager specific handling code for timer interrupts. Used to hand
* off the timer tick to the SMP code, since the VIC doesn't have an
* internal timer (The QIC does, but that's another story). */
void
voyager_timer_interrupt(void)
void voyager_timer_interrupt(void)
{
if((jiffies & 0x3ff) == 0) {
if ((jiffies & 0x3ff) == 0) {
/* There seems to be something flaky in either
* hardware or software that is resetting the timer 0
......@@ -186,18 +181,20 @@ voyager_timer_interrupt(void)
__u16 val;
spin_lock(&i8253_lock);
outb_p(0x00, 0x43);
val = inb_p(0x40);
val |= inb(0x40) << 8;
spin_unlock(&i8253_lock);
if(val > LATCH) {
printk("\nVOYAGER: countdown timer value too high (%d), resetting\n\n", val);
if (val > LATCH) {
printk
("\nVOYAGER: countdown timer value too high (%d), resetting\n\n",
val);
spin_lock(&i8253_lock);
outb(0x34,0x43);
outb_p(LATCH & 0xff , 0x40); /* LSB */
outb(LATCH >> 8 , 0x40); /* MSB */
outb(0x34, 0x43);
outb_p(LATCH & 0xff, 0x40); /* LSB */
outb(LATCH >> 8, 0x40); /* MSB */
spin_unlock(&i8253_lock);
}
}
......@@ -206,14 +203,13 @@ voyager_timer_interrupt(void)
#endif
}
void
voyager_power_off(void)
void voyager_power_off(void)
{
printk("VOYAGER Power Off\n");
if(voyager_level == 5) {
if (voyager_level == 5) {
voyager_cat_power_off();
} else if(voyager_level == 4) {
} else if (voyager_level == 4) {
/* This doesn't apparently work on most L4 machines,
* but the specs say to do this to get automatic power
* off. Unfortunately, if it doesn't power off the
......@@ -222,10 +218,8 @@ voyager_power_off(void)
#if 0
int port;
/* enable the voyager Configuration Space */
outb((inb(VOYAGER_MC_SETUP) & 0xf0) | 0x8,
VOYAGER_MC_SETUP);
outb((inb(VOYAGER_MC_SETUP) & 0xf0) | 0x8, VOYAGER_MC_SETUP);
/* the port for the power off flag is an offset from the
floating base */
port = (inb(VOYAGER_SSPB_RELOCATION_PORT) << 8) + 0x21;
......@@ -235,62 +229,57 @@ voyager_power_off(void)
}
/* and wait for it to happen */
local_irq_disable();
for(;;)
for (;;)
halt();
}
/* copied from process.c */
static inline void
kb_wait(void)
static inline void kb_wait(void)
{
int i;
for (i=0; i<0x10000; i++)
for (i = 0; i < 0x10000; i++)
if ((inb_p(0x64) & 0x02) == 0)
break;
}
void
machine_shutdown(void)
void machine_shutdown(void)
{
/* Architecture specific shutdown needed before a kexec */
}
void
machine_restart(char *cmd)
void machine_restart(char *cmd)
{
printk("Voyager Warm Restart\n");
kb_wait();
if(voyager_level == 5) {
if (voyager_level == 5) {
/* write magic values to the RTC to inform system that
* shutdown is beginning */
outb(0x8f, 0x70);
outb(0x5 , 0x71);
outb(0x5, 0x71);
udelay(50);
outb(0xfe,0x64); /* pull reset low */
} else if(voyager_level == 4) {
__u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT)<<8;
outb(0xfe, 0x64); /* pull reset low */
} else if (voyager_level == 4) {
__u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT) << 8;
__u8 basebd = inb(VOYAGER_MC_SETUP);
outb(basebd | 0x08, VOYAGER_MC_SETUP);
outb(0x02, catbase + 0x21);
}
local_irq_disable();
for(;;)
for (;;)
halt();
}
void
machine_emergency_restart(void)
void machine_emergency_restart(void)
{
/*for now, just hook this to a warm restart */
machine_restart(NULL);
}
void
mca_nmi_hook(void)
void mca_nmi_hook(void)
{
__u8 dumpval __maybe_unused = inb(0xf823);
__u8 swnmi __maybe_unused = inb(0xf813);
......@@ -301,8 +290,8 @@ mca_nmi_hook(void)
/* clear swnmi */
outb(0xff, 0xf813);
/* tell SUS to ignore dump */
if(voyager_level == 5 && voyager_SUS != NULL) {
if(voyager_SUS->SUS_mbox == VOYAGER_DUMP_BUTTON_NMI) {
if (voyager_level == 5 && voyager_SUS != NULL) {
if (voyager_SUS->SUS_mbox == VOYAGER_DUMP_BUTTON_NMI) {
voyager_SUS->kernel_mbox = VOYAGER_NO_COMMAND;
voyager_SUS->kernel_flags |= VOYAGER_OS_IN_PROGRESS;
udelay(1000);
......@@ -310,15 +299,14 @@ mca_nmi_hook(void)
voyager_SUS->kernel_flags &= ~VOYAGER_OS_IN_PROGRESS;
}
}
printk(KERN_ERR "VOYAGER: Dump switch pressed, printing CPU%d tracebacks\n", smp_processor_id());
printk(KERN_ERR
"VOYAGER: Dump switch pressed, printing CPU%d tracebacks\n",
smp_processor_id());
show_stack(NULL, NULL);
show_state();
}
void
machine_halt(void)
void machine_halt(void)
{
/* treat a halt like a power off */
machine_power_off();
......
arch/x86/mach-voyager/voyager_cat.c
View file @ a4ec1eff
......@@ -39,34 +39,32 @@
#define CAT_DATA (sspb + 0xd)
/* the internal cat functions */
static void cat_pack(__u8 *msg, __u16 start_bit, __u8 *data,
__u16 num_bits);
static void cat_unpack(__u8 *msg, __u16 start_bit, __u8 *data,
static void cat_pack(__u8 * msg, __u16 start_bit, __u8 * data, __u16 num_bits);
static void cat_unpack(__u8 * msg, __u16 start_bit, __u8 * data,
__u16 num_bits);
static void cat_build_header(__u8 *header, const __u16 len,
static void cat_build_header(__u8 * header, const __u16 len,
const __u16 smallest_reg_bits,
const __u16 longest_reg_bits);
static int cat_sendinst(voyager_module_t *modp, voyager_asic_t *asicp,
static int cat_sendinst(voyager_module_t * modp, voyager_asic_t * asicp,
__u8 reg, __u8 op);
static int cat_getdata(voyager_module_t *modp, voyager_asic_t *asicp,
__u8 reg, __u8 *value);
static int cat_shiftout(__u8 *data, __u16 data_bytes, __u16 header_bytes,
static int cat_getdata(voyager_module_t * modp, voyager_asic_t * asicp,
__u8 reg, __u8 * value);
static int cat_shiftout(__u8 * data, __u16 data_bytes, __u16 header_bytes,
__u8 pad_bits);
static int cat_write(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg,
static int cat_write(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
__u8 value);
static int cat_read(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg,
__u8 *value);
static int cat_subread(voyager_module_t *modp, voyager_asic_t *asicp,
static int cat_read(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
__u8 * value);
static int cat_subread(voyager_module_t * modp, voyager_asic_t * asicp,
__u16 offset, __u16 len, void *buf);
static int cat_senddata(voyager_module_t *modp, voyager_asic_t *asicp,
static int cat_senddata(voyager_module_t * modp, voyager_asic_t * asicp,
__u8 reg, __u8 value);
static int cat_disconnect(voyager_module_t *modp, voyager_asic_t *asicp);
static int cat_connect(voyager_module_t *modp, voyager_asic_t *asicp);
static int cat_disconnect(voyager_module_t * modp, voyager_asic_t * asicp);
static int cat_connect(voyager_module_t * modp, voyager_asic_t * asicp);
static inline const char *
cat_module_name(int module_id)
static inline const char *cat_module_name(int module_id)
{
switch(module_id) {
switch (module_id) {
case 0x10:
return "Processor Slot 0";
case 0x11:
......@@ -105,14 +103,14 @@ voyager_module_t *voyager_cat_list;
/* the I/O port assignments for the VIC and QIC */
static struct resource vic_res = {
.name = "Voyager Interrupt Controller",
.start = 0xFC00,
.end = 0xFC6F
.name = "Voyager Interrupt Controller",
.start = 0xFC00,
.end = 0xFC6F
};
static struct resource qic_res = {
.name = "Quad Interrupt Controller",
.start = 0xFC70,
.end = 0xFCFF
.name = "Quad Interrupt Controller",
.start = 0xFC70,
.end = 0xFCFF
};
/* This function is used to pack a data bit stream inside a message.
......@@ -120,7 +118,7 @@ static struct resource qic_res = {
* Note: This function assumes that any unused bit in the data stream
* is set to zero so that the ors will work correctly */
static void
cat_pack(__u8 *msg, const __u16 start_bit, __u8 *data, const __u16 num_bits)
cat_pack(__u8 * msg, const __u16 start_bit, __u8 * data, const __u16 num_bits)
{
/* compute initial shift needed */
const __u16 offset = start_bit % BITS_PER_BYTE;
......@@ -130,7 +128,7 @@ cat_pack(__u8 *msg, const __u16 start_bit, __u8 *data, const __u16 num_bits)
int i;
/* adjust if we have more than a byte of residue */
if(residue >= BITS_PER_BYTE) {
if (residue >= BITS_PER_BYTE) {
residue -= BITS_PER_BYTE;
len++;
}
......@@ -138,24 +136,25 @@ cat_pack(__u8 *msg, const __u16 start_bit, __u8 *data, const __u16 num_bits)
/* clear out the bits. We assume here that if len==0 then
* residue >= offset. This is always true for the catbus
* operations */
msg[byte] &= 0xff << (BITS_PER_BYTE - offset);
msg[byte] &= 0xff << (BITS_PER_BYTE - offset);
msg[byte++] |= data[0] >> offset;
if(len == 0)
if (len == 0)
return;
for(i = 1; i < len; i++)
msg[byte++] = (data[i-1] << (BITS_PER_BYTE - offset))
| (data[i] >> offset);
if(residue != 0) {
for (i = 1; i < len; i++)
msg[byte++] = (data[i - 1] << (BITS_PER_BYTE - offset))
| (data[i] >> offset);
if (residue != 0) {
__u8 mask = 0xff >> residue;
__u8 last_byte = data[i-1] << (BITS_PER_BYTE - offset)
| (data[i] >> offset);
__u8 last_byte = data[i - 1] << (BITS_PER_BYTE - offset)
| (data[i] >> offset);
last_byte &= ~mask;
msg[byte] &= mask;
msg[byte] |= last_byte;
}
return;
}
/* unpack the data again (same arguments as cat_pack()). data buffer
* must be zero populated.
*
......@@ -163,7 +162,7 @@ cat_pack(__u8 *msg, const __u16 start_bit, __u8 *data, const __u16 num_bits)
* data (starting at bit 0 in data).
*/
static void
cat_unpack(__u8 *msg, const __u16 start_bit, __u8 *data, const __u16 num_bits)
cat_unpack(__u8 * msg, const __u16 start_bit, __u8 * data, const __u16 num_bits)
{
/* compute initial shift needed */
const __u16 offset = start_bit % BITS_PER_BYTE;
......@@ -172,97 +171,97 @@ cat_unpack(__u8 *msg, const __u16 start_bit, __u8 *data, const __u16 num_bits)
__u16 byte = start_bit / BITS_PER_BYTE;
int i;
if(last_bits != 0)
if (last_bits != 0)
len++;
/* special case: want < 8 bits from msg and we can get it from
* a single byte of the msg */
if(len == 0 && BITS_PER_BYTE - offset >= num_bits) {
if (len == 0 && BITS_PER_BYTE - offset >= num_bits) {
data[0] = msg[byte] << offset;
data[0] &= 0xff >> (BITS_PER_BYTE - num_bits);
return;
}
for(i = 0; i < len; i++) {
for (i = 0; i < len; i++) {
/* this annoying if has to be done just in case a read of
* msg one beyond the array causes a panic */
if(offset != 0) {
if (offset != 0) {
data[i] = msg[byte++] << offset;
data[i] |= msg[byte] >> (BITS_PER_BYTE - offset);
}
else {
} else {
data[i] = msg[byte++];
}
}
/* do we need to truncate the final byte */
if(last_bits != 0) {
data[i-1] &= 0xff << (BITS_PER_BYTE - last_bits);
if (last_bits != 0) {
data[i - 1] &= 0xff << (BITS_PER_BYTE - last_bits);
}
return;
}
static void
cat_build_header(__u8 *header, const __u16 len, const __u16 smallest_reg_bits,
cat_build_header(__u8 * header, const __u16 len, const __u16 smallest_reg_bits,
const __u16 longest_reg_bits)
{
int i;
__u16 start_bit = (smallest_reg_bits - 1) % BITS_PER_BYTE;
__u8 *last_byte = &header[len - 1];
if(start_bit == 0)
if (start_bit == 0)
start_bit = 1; /* must have at least one bit in the hdr */
for(i=0; i < len; i++)
for (i = 0; i < len; i++)
header[i] = 0;
for(i = start_bit; i > 0; i--)
for (i = start_bit; i > 0; i--)
*last_byte = ((*last_byte) << 1) + 1;
}
static int
cat_sendinst(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg, __u8 op)
cat_sendinst(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, __u8 op)
{
__u8 parity, inst, inst_buf[4] = { 0 };
__u8 iseq[VOYAGER_MAX_SCAN_PATH], hseq[VOYAGER_MAX_REG_SIZE];
__u16 ibytes, hbytes, padbits;
int i;
/*
* Parity is the parity of the register number + 1 (READ_REGISTER
* and WRITE_REGISTER always add '1' to the number of bits == 1)
*/
parity = (__u8)(1 + (reg & 0x01) +
((__u8)(reg & 0x02) >> 1) +
((__u8)(reg & 0x04) >> 2) +
((__u8)(reg & 0x08) >> 3)) % 2;
parity = (__u8) (1 + (reg & 0x01) +
((__u8) (reg & 0x02) >> 1) +
((__u8) (reg & 0x04) >> 2) +
((__u8) (reg & 0x08) >> 3)) % 2;
inst = ((parity << 7) | (reg << 2) | op);
outb(VOYAGER_CAT_IRCYC, CAT_CMD);
if(!modp->scan_path_connected) {
if(asicp->asic_id != VOYAGER_CAT_ID) {
printk("**WARNING***: cat_sendinst has disconnected scan path not to CAT asic\n");
if (!modp->scan_path_connected) {
if (asicp->asic_id != VOYAGER_CAT_ID) {
printk
("**WARNING***: cat_sendinst has disconnected scan path not to CAT asic\n");
return 1;
}
outb(VOYAGER_CAT_HEADER, CAT_DATA);
outb(inst, CAT_DATA);
if(inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
CDEBUG(("VOYAGER CAT: cat_sendinst failed to get CAT_HEADER\n"));
return 1;
}
return 0;
}
ibytes = modp->inst_bits / BITS_PER_BYTE;
if((padbits = modp->inst_bits % BITS_PER_BYTE) != 0) {
if ((padbits = modp->inst_bits % BITS_PER_BYTE) != 0) {
padbits = BITS_PER_BYTE - padbits;
ibytes++;
}
hbytes = modp->largest_reg / BITS_PER_BYTE;
if(modp->largest_reg % BITS_PER_BYTE)
if (modp->largest_reg % BITS_PER_BYTE)
hbytes++;
CDEBUG(("cat_sendinst: ibytes=%d, hbytes=%d\n", ibytes, hbytes));
/* initialise the instruction sequence to 0xff */
for(i=0; i < ibytes + hbytes; i++)
for (i = 0; i < ibytes + hbytes; i++)
iseq[i] = 0xff;
cat_build_header(hseq, hbytes, modp->smallest_reg, modp->largest_reg);
cat_pack(iseq, modp->inst_bits, hseq, hbytes * BITS_PER_BYTE);
......@@ -271,11 +270,11 @@ cat_sendinst(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg, __u8 op)
cat_pack(iseq, asicp->bit_location, inst_buf, asicp->ireg_length);
#ifdef VOYAGER_CAT_DEBUG
printk("ins = 0x%x, iseq: ", inst);
for(i=0; i< ibytes + hbytes; i++)
for (i = 0; i < ibytes + hbytes; i++)
printk("0x%x ", iseq[i]);
printk("\n");
#endif
if(cat_shiftout(iseq, ibytes, hbytes, padbits)) {
if (cat_shiftout(iseq, ibytes, hbytes, padbits)) {
CDEBUG(("VOYAGER CAT: cat_sendinst: cat_shiftout failed\n"));
return 1;
}
......@@ -284,72 +283,74 @@ cat_sendinst(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg, __u8 op)
}
static int
cat_getdata(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg,
__u8 *value)
cat_getdata(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
__u8 * value)
{
if(!modp->scan_path_connected) {
if(asicp->asic_id != VOYAGER_CAT_ID) {
if (!modp->scan_path_connected) {
if (asicp->asic_id != VOYAGER_CAT_ID) {
CDEBUG(("VOYAGER CAT: ERROR: cat_getdata to CAT asic with scan path connected\n"));
return 1;
}
if(reg > VOYAGER_SUBADDRHI)
if (reg > VOYAGER_SUBADDRHI)
outb(VOYAGER_CAT_RUN, CAT_CMD);
outb(VOYAGER_CAT_DRCYC, CAT_CMD);
outb(VOYAGER_CAT_HEADER, CAT_DATA);
*value = inb(CAT_DATA);
outb(0xAA, CAT_DATA);
if(inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
CDEBUG(("cat_getdata: failed to get VOYAGER_CAT_HEADER\n"));
return 1;
}
return 0;
}
else {
__u16 sbits = modp->num_asics -1 + asicp->ireg_length;
} else {
__u16 sbits = modp->num_asics - 1 + asicp->ireg_length;
__u16 sbytes = sbits / BITS_PER_BYTE;
__u16 tbytes;
__u8 string[VOYAGER_MAX_SCAN_PATH], trailer[VOYAGER_MAX_REG_SIZE];
__u8 string[VOYAGER_MAX_SCAN_PATH],
trailer[VOYAGER_MAX_REG_SIZE];
__u8 padbits;
int i;
outb(VOYAGER_CAT_DRCYC, CAT_CMD);
if((padbits = sbits % BITS_PER_BYTE) != 0) {
if ((padbits = sbits % BITS_PER_BYTE) != 0) {
padbits = BITS_PER_BYTE - padbits;
sbytes++;
}
tbytes = asicp->ireg_length / BITS_PER_BYTE;
if(asicp->ireg_length % BITS_PER_BYTE)
if (asicp->ireg_length % BITS_PER_BYTE)
tbytes++;
CDEBUG(("cat_getdata: tbytes = %d, sbytes = %d, padbits = %d\n",
tbytes, sbytes, padbits));
tbytes, sbytes, padbits));
cat_build_header(trailer, tbytes, 1, asicp->ireg_length);
for(i = tbytes - 1; i >= 0; i--) {
for (i = tbytes - 1; i >= 0; i--) {
outb(trailer[i], CAT_DATA);
string[sbytes + i] = inb(CAT_DATA);
}
for(i = sbytes - 1; i >= 0; i--) {
for (i = sbytes - 1; i >= 0; i--) {
outb(0xaa, CAT_DATA);
string[i] = inb(CAT_DATA);
}
*value = 0;
cat_unpack(string, padbits + (tbytes * BITS_PER_BYTE) + asicp->asic_location, value, asicp->ireg_length);
cat_unpack(string,
padbits + (tbytes * BITS_PER_BYTE) +
asicp->asic_location, value, asicp->ireg_length);
#ifdef VOYAGER_CAT_DEBUG
printk("value=0x%x, string: ", *value);
for(i=0; i< tbytes+sbytes; i++)
for (i = 0; i < tbytes + sbytes; i++)
printk("0x%x ", string[i]);
printk("\n");
#endif
/* sanity check the rest of the return */
for(i=0; i < tbytes; i++) {
for (i = 0; i < tbytes; i++) {
__u8 input = 0;
cat_unpack(string, padbits + (i * BITS_PER_BYTE), &input, BITS_PER_BYTE);
if(trailer[i] != input) {
cat_unpack(string, padbits + (i * BITS_PER_BYTE),
&input, BITS_PER_BYTE);
if (trailer[i] != input) {
CDEBUG(("cat_getdata: failed to sanity check rest of ret(%d) 0x%x != 0x%x\n", i, input, trailer[i]));
return 1;
}
......@@ -360,14 +361,14 @@ cat_getdata(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg,
}
static int
cat_shiftout(__u8 *data, __u16 data_bytes, __u16 header_bytes, __u8 pad_bits)
cat_shiftout(__u8 * data, __u16 data_bytes, __u16 header_bytes, __u8 pad_bits)
{
int i;
for(i = data_bytes + header_bytes - 1; i >= header_bytes; i--)
for (i = data_bytes + header_bytes - 1; i >= header_bytes; i--)
outb(data[i], CAT_DATA);
for(i = header_bytes - 1; i >= 0; i--) {
for (i = header_bytes - 1; i >= 0; i--) {
__u8 header = 0;
__u8 input;
......@@ -376,7 +377,7 @@ cat_shiftout(__u8 *data, __u16 data_bytes, __u16 header_bytes, __u8 pad_bits)
CDEBUG(("cat_shiftout: returned 0x%x\n", input));
cat_unpack(data, ((data_bytes + i) * BITS_PER_BYTE) - pad_bits,
&header, BITS_PER_BYTE);
if(input != header) {
if (input != header) {
CDEBUG(("VOYAGER CAT: cat_shiftout failed to return header 0x%x != 0x%x\n", input, header));
return 1;
}
......@@ -385,57 +386,57 @@ cat_shiftout(__u8 *data, __u16 data_bytes, __u16 header_bytes, __u8 pad_bits)
}
static int
cat_senddata(voyager_module_t *modp, voyager_asic_t *asicp,
cat_senddata(voyager_module_t * modp, voyager_asic_t * asicp,
__u8 reg, __u8 value)
{
outb(VOYAGER_CAT_DRCYC, CAT_CMD);
if(!modp->scan_path_connected) {
if(asicp->asic_id != VOYAGER_CAT_ID) {
if (!modp->scan_path_connected) {
if (asicp->asic_id != VOYAGER_CAT_ID) {
CDEBUG(("VOYAGER CAT: ERROR: scan path disconnected when asic != CAT\n"));
return 1;
}
outb(VOYAGER_CAT_HEADER, CAT_DATA);
outb(value, CAT_DATA);
if(inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
CDEBUG(("cat_senddata: failed to get correct header response to sent data\n"));
return 1;
}
if(reg > VOYAGER_SUBADDRHI) {
if (reg > VOYAGER_SUBADDRHI) {
outb(VOYAGER_CAT_RUN, CAT_CMD);
outb(VOYAGER_CAT_END, CAT_CMD);
outb(VOYAGER_CAT_RUN, CAT_CMD);
}
return 0;
}
else {
} else {
__u16 hbytes = asicp->ireg_length / BITS_PER_BYTE;
__u16 dbytes = (modp->num_asics - 1 + asicp->ireg_length)/BITS_PER_BYTE;
__u8 padbits, dseq[VOYAGER_MAX_SCAN_PATH],
hseq[VOYAGER_MAX_REG_SIZE];
__u16 dbytes =
(modp->num_asics - 1 + asicp->ireg_length) / BITS_PER_BYTE;
__u8 padbits, dseq[VOYAGER_MAX_SCAN_PATH],
hseq[VOYAGER_MAX_REG_SIZE];
int i;
if((padbits = (modp->num_asics - 1
+ asicp->ireg_length) % BITS_PER_BYTE) != 0) {
if ((padbits = (modp->num_asics - 1
+ asicp->ireg_length) % BITS_PER_BYTE) != 0) {
padbits = BITS_PER_BYTE - padbits;
dbytes++;
}
if(asicp->ireg_length % BITS_PER_BYTE)
if (asicp->ireg_length % BITS_PER_BYTE)
hbytes++;
cat_build_header(hseq, hbytes, 1, asicp->ireg_length);
for(i = 0; i < dbytes + hbytes; i++)
for (i = 0; i < dbytes + hbytes; i++)
dseq[i] = 0xff;
CDEBUG(("cat_senddata: dbytes=%d, hbytes=%d, padbits=%d\n",
dbytes, hbytes, padbits));
cat_pack(dseq, modp->num_asics - 1 + asicp->ireg_length,
hseq, hbytes * BITS_PER_BYTE);
cat_pack(dseq, asicp->asic_location, &value,
cat_pack(dseq, asicp->asic_location, &value,
asicp->ireg_length);
#ifdef VOYAGER_CAT_DEBUG
printk("dseq ");
for(i=0; i<hbytes+dbytes; i++) {
for (i = 0; i < hbytes + dbytes; i++) {
printk("0x%x ", dseq[i]);
}
printk("\n");
......@@ -445,121 +446,125 @@ cat_senddata(voyager_module_t *modp, voyager_asic_t *asicp,
}
static int
cat_write(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg,
__u8 value)
cat_write(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, __u8 value)
{
if(cat_sendinst(modp, asicp, reg, VOYAGER_WRITE_CONFIG))
if (cat_sendinst(modp, asicp, reg, VOYAGER_WRITE_CONFIG))
return 1;
return cat_senddata(modp, asicp, reg, value);
}
static int
cat_read(voyager_module_t *modp, voyager_asic_t *asicp, __u8 reg,
__u8 *value)
cat_read(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
__u8 * value)
{
if(cat_sendinst(modp, asicp, reg, VOYAGER_READ_CONFIG))
if (cat_sendinst(modp, asicp, reg, VOYAGER_READ_CONFIG))
return 1;
return cat_getdata(modp, asicp, reg, value);
}
static int
cat_subaddrsetup(voyager_module_t *modp, voyager_asic_t *asicp, __u16 offset,
cat_subaddrsetup(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset,
__u16 len)
{
__u8 val;
if(len > 1) {
if (len > 1) {
/* set auto increment */
__u8 newval;
if(cat_read(modp, asicp, VOYAGER_AUTO_INC_REG, &val)) {
if (cat_read(modp, asicp, VOYAGER_AUTO_INC_REG, &val)) {
CDEBUG(("cat_subaddrsetup: read of VOYAGER_AUTO_INC_REG failed\n"));
return 1;
}
CDEBUG(("cat_subaddrsetup: VOYAGER_AUTO_INC_REG = 0x%x\n", val));
CDEBUG(("cat_subaddrsetup: VOYAGER_AUTO_INC_REG = 0x%x\n",
val));
newval = val | VOYAGER_AUTO_INC;
if(newval != val) {
if(cat_write(modp, asicp, VOYAGER_AUTO_INC_REG, val)) {
if (newval != val) {
if (cat_write(modp, asicp, VOYAGER_AUTO_INC_REG, val)) {
CDEBUG(("cat_subaddrsetup: write to VOYAGER_AUTO_INC_REG failed\n"));
return 1;
}
}
}
if(cat_write(modp, asicp, VOYAGER_SUBADDRLO, (__u8)(offset &0xff))) {
if (cat_write(modp, asicp, VOYAGER_SUBADDRLO, (__u8) (offset & 0xff))) {
CDEBUG(("cat_subaddrsetup: write to SUBADDRLO failed\n"));
return 1;
}
if(asicp->subaddr > VOYAGER_SUBADDR_LO) {
if(cat_write(modp, asicp, VOYAGER_SUBADDRHI, (__u8)(offset >> 8))) {
if (asicp->subaddr > VOYAGER_SUBADDR_LO) {
if (cat_write
(modp, asicp, VOYAGER_SUBADDRHI, (__u8) (offset >> 8))) {
CDEBUG(("cat_subaddrsetup: write to SUBADDRHI failed\n"));
return 1;
}
cat_read(modp, asicp, VOYAGER_SUBADDRHI, &val);
CDEBUG(("cat_subaddrsetup: offset = %d, hi = %d\n", offset, val));
CDEBUG(("cat_subaddrsetup: offset = %d, hi = %d\n", offset,
val));
}
cat_read(modp, asicp, VOYAGER_SUBADDRLO, &val);
CDEBUG(("cat_subaddrsetup: offset = %d, lo = %d\n", offset, val));
return 0;
}
static int
cat_subwrite(voyager_module_t *modp, voyager_asic_t *asicp, __u16 offset,
__u16 len, void *buf)
cat_subwrite(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset,
__u16 len, void *buf)
{
int i, retval;
/* FIXME: need special actions for VOYAGER_CAT_ID here */
if(asicp->asic_id == VOYAGER_CAT_ID) {
if (asicp->asic_id == VOYAGER_CAT_ID) {
CDEBUG(("cat_subwrite: ATTEMPT TO WRITE TO CAT ASIC\n"));
/* FIXME -- This is supposed to be handled better
* There is a problem writing to the cat asic in the
* PSI. The 30us delay seems to work, though */
udelay(30);
}
if((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) {
if ((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) {
printk("cat_subwrite: cat_subaddrsetup FAILED\n");
return retval;
}
if(cat_sendinst(modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_WRITE_CONFIG)) {
if (cat_sendinst
(modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_WRITE_CONFIG)) {
printk("cat_subwrite: cat_sendinst FAILED\n");
return 1;
}
for(i = 0; i < len; i++) {
if(cat_senddata(modp, asicp, 0xFF, ((__u8 *)buf)[i])) {
printk("cat_subwrite: cat_sendata element at %d FAILED\n", i);
for (i = 0; i < len; i++) {
if (cat_senddata(modp, asicp, 0xFF, ((__u8 *) buf)[i])) {
printk
("cat_subwrite: cat_sendata element at %d FAILED\n",
i);
return 1;
}
}
return 0;
}
static int
cat_subread(voyager_module_t *modp, voyager_asic_t *asicp, __u16 offset,
cat_subread(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset,
__u16 len, void *buf)
{
int i, retval;
if((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) {
if ((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) {
CDEBUG(("cat_subread: cat_subaddrsetup FAILED\n"));
return retval;
}
if(cat_sendinst(modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_READ_CONFIG)) {
if (cat_sendinst(modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_READ_CONFIG)) {
CDEBUG(("cat_subread: cat_sendinst failed\n"));
return 1;
}
for(i = 0; i < len; i++) {
if(cat_getdata(modp, asicp, 0xFF,
&((__u8 *)buf)[i])) {
CDEBUG(("cat_subread: cat_getdata element %d failed\n", i));
for (i = 0; i < len; i++) {
if (cat_getdata(modp, asicp, 0xFF, &((__u8 *) buf)[i])) {
CDEBUG(("cat_subread: cat_getdata element %d failed\n",
i));
return 1;
}
}
return 0;
}
/* buffer for storing EPROM data read in during initialisation */
static __initdata __u8 eprom_buf[0xFFFF];
static voyager_module_t *voyager_initial_module;
......@@ -568,8 +573,7 @@ static voyager_module_t *voyager_initial_module;
* boot cpu *after* all memory initialisation has been done (so we can
* use kmalloc) but before smp initialisation, so we can probe the SMP
* configuration and pick up necessary information. */
void __init
voyager_cat_init(void)
void __init voyager_cat_init(void)
{
voyager_module_t **modpp = &voyager_initial_module;
voyager_asic_t **asicpp;
......@@ -578,27 +582,29 @@ voyager_cat_init(void)
unsigned long qic_addr = 0;
__u8 qabc_data[0x20];
__u8 num_submodules, val;
voyager_eprom_hdr_t *eprom_hdr = (voyager_eprom_hdr_t *)&eprom_buf[0];
voyager_eprom_hdr_t *eprom_hdr = (voyager_eprom_hdr_t *) & eprom_buf[0];
__u8 cmos[4];
unsigned long addr;
/* initiallise the SUS mailbox */
for(i=0; i<sizeof(cmos); i++)
for (i = 0; i < sizeof(cmos); i++)
cmos[i] = voyager_extended_cmos_read(VOYAGER_DUMP_LOCATION + i);
addr = *(unsigned long *)cmos;
if((addr & 0xff000000) != 0xff000000) {
printk(KERN_ERR "Voyager failed to get SUS mailbox (addr = 0x%lx\n", addr);
if ((addr & 0xff000000) != 0xff000000) {
printk(KERN_ERR
"Voyager failed to get SUS mailbox (addr = 0x%lx\n",
addr);
} else {
static struct resource res;
res.name = "voyager SUS";
res.start = addr;
res.end = addr+0x3ff;
res.end = addr + 0x3ff;
request_resource(&iomem_resource, &res);
voyager_SUS = (struct voyager_SUS *)
ioremap(addr, 0x400);
ioremap(addr, 0x400);
printk(KERN_NOTICE "Voyager SUS mailbox version 0x%x\n",
voyager_SUS->SUS_version);
voyager_SUS->kernel_version = VOYAGER_MAILBOX_VERSION;
......@@ -609,8 +615,6 @@ voyager_cat_init(void)
voyager_extended_vic_processors = 0;
voyager_quad_processors = 0;
printk("VOYAGER: beginning CAT bus probe\n");
/* set up the SuperSet Port Block which tells us where the
* CAT communication port is */
......@@ -618,14 +622,14 @@ voyager_cat_init(void)
VDEBUG(("VOYAGER DEBUG: sspb = 0x%x\n", sspb));
/* now find out if were 8 slot or normal */
if((inb(VIC_PROC_WHO_AM_I) & EIGHT_SLOT_IDENTIFIER)
== EIGHT_SLOT_IDENTIFIER) {
if ((inb(VIC_PROC_WHO_AM_I) & EIGHT_SLOT_IDENTIFIER)
== EIGHT_SLOT_IDENTIFIER) {
voyager_8slot = 1;
printk(KERN_NOTICE "Voyager: Eight slot 51xx configuration detected\n");
printk(KERN_NOTICE
"Voyager: Eight slot 51xx configuration detected\n");
}
for(i = VOYAGER_MIN_MODULE;
i <= VOYAGER_MAX_MODULE; i++) {
for (i = VOYAGER_MIN_MODULE; i <= VOYAGER_MAX_MODULE; i++) {
__u8 input;
int asic;
__u16 eprom_size;
......@@ -643,21 +647,21 @@ voyager_cat_init(void)
outb(0xAA, CAT_DATA);
input = inb(CAT_DATA);
outb(VOYAGER_CAT_END, CAT_CMD);
if(input != VOYAGER_CAT_HEADER) {
if (input != VOYAGER_CAT_HEADER) {
continue;
}
CDEBUG(("VOYAGER DEBUG: found module id 0x%x, %s\n", i,
cat_module_name(i)));
*modpp = kmalloc(sizeof(voyager_module_t), GFP_KERNEL); /*&voyager_module_storage[cat_count++];*/
if(*modpp == NULL) {
*modpp = kmalloc(sizeof(voyager_module_t), GFP_KERNEL); /*&voyager_module_storage[cat_count++]; */
if (*modpp == NULL) {
printk("**WARNING** kmalloc failure in cat_init\n");
continue;
}
memset(*modpp, 0, sizeof(voyager_module_t));
/* need temporary asic for cat_subread. It will be
* filled in correctly later */
(*modpp)->asic = kmalloc(sizeof(voyager_asic_t), GFP_KERNEL); /*&voyager_asic_storage[asic_count];*/
if((*modpp)->asic == NULL) {
(*modpp)->asic = kmalloc(sizeof(voyager_asic_t), GFP_KERNEL); /*&voyager_asic_storage[asic_count]; */
if ((*modpp)->asic == NULL) {
printk("**WARNING** kmalloc failure in cat_init\n");
continue;
}
......@@ -666,47 +670,52 @@ voyager_cat_init(void)
(*modpp)->asic->subaddr = VOYAGER_SUBADDR_HI;
(*modpp)->module_addr = i;
(*modpp)->scan_path_connected = 0;
if(i == VOYAGER_PSI) {
if (i == VOYAGER_PSI) {
/* Exception leg for modules with no EEPROM */
printk("Module \"%s\"\n", cat_module_name(i));
continue;
}
CDEBUG(("cat_init: Reading eeprom for module 0x%x at offset %d\n", i, VOYAGER_XSUM_END_OFFSET));
outb(VOYAGER_CAT_RUN, CAT_CMD);
cat_disconnect(*modpp, (*modpp)->asic);
if(cat_subread(*modpp, (*modpp)->asic,
VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size),
&eprom_size)) {
printk("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n", i);
if (cat_subread(*modpp, (*modpp)->asic,
VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size),
&eprom_size)) {
printk
("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n",
i);
outb(VOYAGER_CAT_END, CAT_CMD);
continue;
}
if(eprom_size > sizeof(eprom_buf)) {
printk("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x. Need %d\n", i, eprom_size);
if (eprom_size > sizeof(eprom_buf)) {
printk
("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x. Need %d\n",
i, eprom_size);
outb(VOYAGER_CAT_END, CAT_CMD);
continue;
}
outb(VOYAGER_CAT_END, CAT_CMD);
outb(VOYAGER_CAT_RUN, CAT_CMD);
CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i, eprom_size));
if(cat_subread(*modpp, (*modpp)->asic, 0,
eprom_size, eprom_buf)) {
CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i,
eprom_size));
if (cat_subread
(*modpp, (*modpp)->asic, 0, eprom_size, eprom_buf)) {
outb(VOYAGER_CAT_END, CAT_CMD);
continue;
}
outb(VOYAGER_CAT_END, CAT_CMD);
printk("Module \"%s\", version 0x%x, tracer 0x%x, asics %d\n",
cat_module_name(i), eprom_hdr->version_id,
*((__u32 *)eprom_hdr->tracer), eprom_hdr->num_asics);
*((__u32 *) eprom_hdr->tracer), eprom_hdr->num_asics);
(*modpp)->ee_size = eprom_hdr->ee_size;
(*modpp)->num_asics = eprom_hdr->num_asics;
asicpp = &((*modpp)->asic);
sp_offset = eprom_hdr->scan_path_offset;
/* All we really care about are the Quad cards. We
* identify them because they are in a processor slot
* and have only four asics */
if((i < 0x10 || (i>=0x14 && i < 0x1c) || i>0x1f)) {
* identify them because they are in a processor slot
* and have only four asics */
if ((i < 0x10 || (i >= 0x14 && i < 0x1c) || i > 0x1f)) {
modpp = &((*modpp)->next);
continue;
}
......@@ -717,16 +726,17 @@ voyager_cat_init(void)
&num_submodules);
/* lowest two bits, active low */
num_submodules = ~(0xfc | num_submodules);
CDEBUG(("VOYAGER CAT: %d submodules present\n", num_submodules));
if(num_submodules == 0) {
CDEBUG(("VOYAGER CAT: %d submodules present\n",
num_submodules));
if (num_submodules == 0) {
/* fill in the dyadic extended processors */
__u8 cpu = i & 0x07;
printk("Module \"%s\": Dyadic Processor Card\n",
cat_module_name(i));
voyager_extended_vic_processors |= (1<<cpu);
voyager_extended_vic_processors |= (1 << cpu);
cpu += 4;
voyager_extended_vic_processors |= (1<<cpu);
voyager_extended_vic_processors |= (1 << cpu);
outb(VOYAGER_CAT_END, CAT_CMD);
continue;
}
......@@ -740,28 +750,32 @@ voyager_cat_init(void)
cat_write(*modpp, (*modpp)->asic, VOYAGER_SUBMODSELECT, val);
outb(VOYAGER_CAT_END, CAT_CMD);
CDEBUG(("cat_init: Reading eeprom for module 0x%x at offset %d\n", i, VOYAGER_XSUM_END_OFFSET));
outb(VOYAGER_CAT_RUN, CAT_CMD);
cat_disconnect(*modpp, (*modpp)->asic);
if(cat_subread(*modpp, (*modpp)->asic,
VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size),
&eprom_size)) {
printk("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n", i);
if (cat_subread(*modpp, (*modpp)->asic,
VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size),
&eprom_size)) {
printk
("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n",
i);
outb(VOYAGER_CAT_END, CAT_CMD);
continue;
}
if(eprom_size > sizeof(eprom_buf)) {
printk("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x. Need %d\n", i, eprom_size);
if (eprom_size > sizeof(eprom_buf)) {
printk
("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x. Need %d\n",
i, eprom_size);
outb(VOYAGER_CAT_END, CAT_CMD);
continue;
}
outb(VOYAGER_CAT_END, CAT_CMD);
outb(VOYAGER_CAT_RUN, CAT_CMD);
CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i, eprom_size));
if(cat_subread(*modpp, (*modpp)->asic, 0,
eprom_size, eprom_buf)) {
CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i,
eprom_size));
if (cat_subread
(*modpp, (*modpp)->asic, 0, eprom_size, eprom_buf)) {
outb(VOYAGER_CAT_END, CAT_CMD);
continue;
}
......@@ -773,30 +787,35 @@ voyager_cat_init(void)
sp_offset = eprom_hdr->scan_path_offset;
/* get rid of the dummy CAT asic and read the real one */
kfree((*modpp)->asic);
for(asic=0; asic < (*modpp)->num_asics; asic++) {
for (asic = 0; asic < (*modpp)->num_asics; asic++) {
int j;
voyager_asic_t *asicp = *asicpp
= kzalloc(sizeof(voyager_asic_t), GFP_KERNEL); /*&voyager_asic_storage[asic_count++];*/
voyager_asic_t *asicp = *asicpp = kzalloc(sizeof(voyager_asic_t), GFP_KERNEL); /*&voyager_asic_storage[asic_count++]; */
voyager_sp_table_t *sp_table;
voyager_at_t *asic_table;
voyager_jtt_t *jtag_table;
if(asicp == NULL) {
printk("**WARNING** kmalloc failure in cat_init\n");
if (asicp == NULL) {
printk
("**WARNING** kmalloc failure in cat_init\n");
continue;
}
asicpp = &(asicp->next);
asicp->asic_location = asic;
sp_table = (voyager_sp_table_t *)(eprom_buf + sp_offset);
sp_table =
(voyager_sp_table_t *) (eprom_buf + sp_offset);
asicp->asic_id = sp_table->asic_id;
asic_table = (voyager_at_t *)(eprom_buf + sp_table->asic_data_offset);
for(j=0; j<4; j++)
asic_table =
(voyager_at_t *) (eprom_buf +
sp_table->asic_data_offset);
for (j = 0; j < 4; j++)
asicp->jtag_id[j] = asic_table->jtag_id[j];
jtag_table = (voyager_jtt_t *)(eprom_buf + asic_table->jtag_offset);
jtag_table =
(voyager_jtt_t *) (eprom_buf +
asic_table->jtag_offset);
asicp->ireg_length = jtag_table->ireg_len;
asicp->bit_location = (*modpp)->inst_bits;
(*modpp)->inst_bits += asicp->ireg_length;
if(asicp->ireg_length > (*modpp)->largest_reg)
if (asicp->ireg_length > (*modpp)->largest_reg)
(*modpp)->largest_reg = asicp->ireg_length;
if (asicp->ireg_length < (*modpp)->smallest_reg ||
(*modpp)->smallest_reg == 0)
......@@ -804,15 +823,13 @@ voyager_cat_init(void)
CDEBUG(("asic 0x%x, ireg_length=%d, bit_location=%d\n",
asicp->asic_id, asicp->ireg_length,
asicp->bit_location));
if(asicp->asic_id == VOYAGER_QUAD_QABC) {
if (asicp->asic_id == VOYAGER_QUAD_QABC) {
CDEBUG(("VOYAGER CAT: QABC ASIC found\n"));
qabc_asic = asicp;
}
sp_offset += sizeof(voyager_sp_table_t);
}
CDEBUG(("Module inst_bits = %d, largest_reg = %d, smallest_reg=%d\n",
(*modpp)->inst_bits, (*modpp)->largest_reg,
(*modpp)->smallest_reg));
CDEBUG(("Module inst_bits = %d, largest_reg = %d, smallest_reg=%d\n", (*modpp)->inst_bits, (*modpp)->largest_reg, (*modpp)->smallest_reg));
/* OK, now we have the QUAD ASICs set up, use them.
* we need to:
*
......@@ -828,10 +845,11 @@ voyager_cat_init(void)
qic_addr = qabc_data[5] << 8;
qic_addr = (qic_addr | qabc_data[6]) << 8;
qic_addr = (qic_addr | qabc_data[7]) << 8;
printk("Module \"%s\": Quad Processor Card; CPI 0x%lx, SET=0x%x\n",
cat_module_name(i), qic_addr, qabc_data[8]);
printk
("Module \"%s\": Quad Processor Card; CPI 0x%lx, SET=0x%x\n",
cat_module_name(i), qic_addr, qabc_data[8]);
#if 0 /* plumbing fails---FIXME */
if((qabc_data[8] & 0xf0) == 0) {
if ((qabc_data[8] & 0xf0) == 0) {
/* FIXME: 32 way 8 CPU slot monster cannot be
* plumbed this way---need to check for it */
......@@ -842,94 +860,97 @@ voyager_cat_init(void)
#ifdef VOYAGER_CAT_DEBUG
/* verify plumbing */
cat_subread(*modpp, qabc_asic, 8, 1, &qabc_data[8]);
if((qabc_data[8] & 0xf0) == 0) {
CDEBUG(("PLUMBING FAILED: 0x%x\n", qabc_data[8]));
if ((qabc_data[8] & 0xf0) == 0) {
CDEBUG(("PLUMBING FAILED: 0x%x\n",
qabc_data[8]));
}
#endif
}
#endif
{
struct resource *res = kzalloc(sizeof(struct resource),GFP_KERNEL);
struct resource *res =
kzalloc(sizeof(struct resource), GFP_KERNEL);
res->name = kmalloc(128, GFP_KERNEL);
sprintf((char *)res->name, "Voyager %s Quad CPI", cat_module_name(i));
sprintf((char *)res->name, "Voyager %s Quad CPI",
cat_module_name(i));
res->start = qic_addr;
res->end = qic_addr + 0x3ff;
request_resource(&iomem_resource, res);
}
qic_addr = (unsigned long)ioremap(qic_addr, 0x400);
for(j = 0; j < 4; j++) {
for (j = 0; j < 4; j++) {
__u8 cpu;
if(voyager_8slot) {
if (voyager_8slot) {
/* 8 slot has a different mapping,
* each slot has only one vic line, so
* 1 cpu in each slot must be < 8 */
cpu = (i & 0x07) + j*8;
cpu = (i & 0x07) + j * 8;
} else {
cpu = (i & 0x03) + j*4;
cpu = (i & 0x03) + j * 4;
}
if( (qabc_data[8] & (1<<j))) {
voyager_extended_vic_processors |= (1<<cpu);
if ((qabc_data[8] & (1 << j))) {
voyager_extended_vic_processors |= (1 << cpu);
}
if(qabc_data[8] & (1<<(j+4)) ) {
if (qabc_data[8] & (1 << (j + 4))) {
/* Second SET register plumbed: Quad
* card has two VIC connected CPUs.
* Secondary cannot be booted as a VIC
* CPU */
voyager_extended_vic_processors |= (1<<cpu);
voyager_allowed_boot_processors &= (~(1<<cpu));
voyager_extended_vic_processors |= (1 << cpu);
voyager_allowed_boot_processors &=
(~(1 << cpu));
}
voyager_quad_processors |= (1<<cpu);
voyager_quad_processors |= (1 << cpu);
voyager_quad_cpi_addr[cpu] = (struct voyager_qic_cpi *)
(qic_addr+(j<<8));
(qic_addr + (j << 8));
CDEBUG(("CPU%d: CPI address 0x%lx\n", cpu,
(unsigned long)voyager_quad_cpi_addr[cpu]));
}
outb(VOYAGER_CAT_END, CAT_CMD);
*asicpp = NULL;
modpp = &((*modpp)->next);
}
*modpp = NULL;
printk("CAT Bus Initialisation finished: extended procs 0x%x, quad procs 0x%x, allowed vic boot = 0x%x\n", voyager_extended_vic_processors, voyager_quad_processors, voyager_allowed_boot_processors);
printk
("CAT Bus Initialisation finished: extended procs 0x%x, quad procs 0x%x, allowed vic boot = 0x%x\n",
voyager_extended_vic_processors, voyager_quad_processors,
voyager_allowed_boot_processors);
request_resource(&ioport_resource, &vic_res);
if(voyager_quad_processors)
if (voyager_quad_processors)
request_resource(&ioport_resource, &qic_res);
/* set up the front power switch */
}
int
voyager_cat_readb(__u8 module, __u8 asic, int reg)
int voyager_cat_readb(__u8 module, __u8 asic, int reg)
{
return 0;
}
static int
cat_disconnect(voyager_module_t *modp, voyager_asic_t *asicp)
static int cat_disconnect(voyager_module_t * modp, voyager_asic_t * asicp)
{
__u8 val;
int err = 0;
if(!modp->scan_path_connected)
if (!modp->scan_path_connected)
return 0;
if(asicp->asic_id != VOYAGER_CAT_ID) {
if (asicp->asic_id != VOYAGER_CAT_ID) {
CDEBUG(("cat_disconnect: ASIC is not CAT\n"));
return 1;
}
err = cat_read(modp, asicp, VOYAGER_SCANPATH, &val);
if(err) {
if (err) {
CDEBUG(("cat_disconnect: failed to read SCANPATH\n"));
return err;
}
val &= VOYAGER_DISCONNECT_ASIC;
err = cat_write(modp, asicp, VOYAGER_SCANPATH, val);
if(err) {
if (err) {
CDEBUG(("cat_disconnect: failed to write SCANPATH\n"));
return err;
}
......@@ -940,27 +961,26 @@ cat_disconnect(voyager_module_t *modp, voyager_asic_t *asicp)
return 0;
}
static int
cat_connect(voyager_module_t *modp, voyager_asic_t *asicp)
static int cat_connect(voyager_module_t * modp, voyager_asic_t * asicp)
{
__u8 val;
int err = 0;
if(modp->scan_path_connected)
if (modp->scan_path_connected)
return 0;
if(asicp->asic_id != VOYAGER_CAT_ID) {
if (asicp->asic_id != VOYAGER_CAT_ID) {
CDEBUG(("cat_connect: ASIC is not CAT\n"));
return 1;
}
err = cat_read(modp, asicp, VOYAGER_SCANPATH, &val);
if(err) {
if (err) {
CDEBUG(("cat_connect: failed to read SCANPATH\n"));
return err;
}
val |= VOYAGER_CONNECT_ASIC;
err = cat_write(modp, asicp, VOYAGER_SCANPATH, val);
if(err) {
if (err) {
CDEBUG(("cat_connect: failed to write SCANPATH\n"));
return err;
}
......@@ -971,11 +991,10 @@ cat_connect(voyager_module_t *modp, voyager_asic_t *asicp)
return 0;
}
void
voyager_cat_power_off(void)
void voyager_cat_power_off(void)
{
/* Power the machine off by writing to the PSI over the CAT
* bus */
* bus */
__u8 data;
voyager_module_t psi = { 0 };
voyager_asic_t psi_asic = { 0 };
......@@ -1009,8 +1028,7 @@ voyager_cat_power_off(void)
struct voyager_status voyager_status = { 0 };
void
voyager_cat_psi(__u8 cmd, __u16 reg, __u8 *data)
void voyager_cat_psi(__u8 cmd, __u16 reg, __u8 * data)
{
voyager_module_t psi = { 0 };
voyager_asic_t psi_asic = { 0 };
......@@ -1027,7 +1045,7 @@ voyager_cat_psi(__u8 cmd, __u16 reg, __u8 *data)
outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT);
outb(VOYAGER_CAT_RUN, CAT_CMD);
cat_disconnect(&psi, &psi_asic);
switch(cmd) {
switch (cmd) {
case VOYAGER_PSI_READ:
cat_read(&psi, &psi_asic, reg, data);
break;
......@@ -1047,8 +1065,7 @@ voyager_cat_psi(__u8 cmd, __u16 reg, __u8 *data)
outb(VOYAGER_CAT_END, CAT_CMD);
}
void
voyager_cat_do_common_interrupt(void)
void voyager_cat_do_common_interrupt(void)
{
/* This is caused either by a memory parity error or something
* in the PSI */
......@@ -1057,7 +1074,7 @@ voyager_cat_do_common_interrupt(void)
voyager_asic_t psi_asic = { 0 };
struct voyager_psi psi_reg;
int i;
re_read:
re_read:
psi.asic = &psi_asic;
psi.asic->asic_id = VOYAGER_CAT_ID;
psi.asic->subaddr = VOYAGER_SUBADDR_HI;
......@@ -1072,43 +1089,45 @@ voyager_cat_do_common_interrupt(void)
cat_disconnect(&psi, &psi_asic);
/* Read the status. NOTE: Need to read *all* the PSI regs here
* otherwise the cmn int will be reasserted */
for(i = 0; i < sizeof(psi_reg.regs); i++) {
cat_read(&psi, &psi_asic, i, &((__u8 *)&psi_reg.regs)[i]);
for (i = 0; i < sizeof(psi_reg.regs); i++) {
cat_read(&psi, &psi_asic, i, &((__u8 *) & psi_reg.regs)[i]);
}
outb(VOYAGER_CAT_END, CAT_CMD);
if((psi_reg.regs.checkbit & 0x02) == 0) {
if ((psi_reg.regs.checkbit & 0x02) == 0) {
psi_reg.regs.checkbit |= 0x02;
cat_write(&psi, &psi_asic, 5, psi_reg.regs.checkbit);
printk("VOYAGER RE-READ PSI\n");
goto re_read;
}
outb(VOYAGER_CAT_RUN, CAT_CMD);
for(i = 0; i < sizeof(psi_reg.subregs); i++) {
for (i = 0; i < sizeof(psi_reg.subregs); i++) {
/* This looks strange, but the PSI doesn't do auto increment
* correctly */
cat_subread(&psi, &psi_asic, VOYAGER_PSI_SUPPLY_REG + i,
1, &((__u8 *)&psi_reg.subregs)[i]);
cat_subread(&psi, &psi_asic, VOYAGER_PSI_SUPPLY_REG + i,
1, &((__u8 *) & psi_reg.subregs)[i]);
}
outb(VOYAGER_CAT_END, CAT_CMD);
#ifdef VOYAGER_CAT_DEBUG
printk("VOYAGER PSI: ");
for(i=0; i<sizeof(psi_reg.regs); i++)
printk("%02x ", ((__u8 *)&psi_reg.regs)[i]);
for (i = 0; i < sizeof(psi_reg.regs); i++)
printk("%02x ", ((__u8 *) & psi_reg.regs)[i]);
printk("\n ");
for(i=0; i<sizeof(psi_reg.subregs); i++)
printk("%02x ", ((__u8 *)&psi_reg.subregs)[i]);
for (i = 0; i < sizeof(psi_reg.subregs); i++)
printk("%02x ", ((__u8 *) & psi_reg.subregs)[i]);
printk("\n");
#endif
if(psi_reg.regs.intstatus & PSI_MON) {
if (psi_reg.regs.intstatus & PSI_MON) {
/* switch off or power fail */
if(psi_reg.subregs.supply & PSI_SWITCH_OFF) {
if(voyager_status.switch_off) {
printk(KERN_ERR "Voyager front panel switch turned off again---Immediate power off!\n");
if (psi_reg.subregs.supply & PSI_SWITCH_OFF) {
if (voyager_status.switch_off) {
printk(KERN_ERR
"Voyager front panel switch turned off again---Immediate power off!\n");
voyager_cat_power_off();
/* not reached */
} else {
printk(KERN_ERR "Voyager front panel switch turned off\n");
printk(KERN_ERR
"Voyager front panel switch turned off\n");
voyager_status.switch_off = 1;
voyager_status.request_from_kernel = 1;
wake_up_process(voyager_thread);
......@@ -1127,7 +1146,7 @@ voyager_cat_do_common_interrupt(void)
VDEBUG(("Voyager ac fail reg 0x%x\n",
psi_reg.subregs.ACfail));
if((psi_reg.subregs.ACfail & AC_FAIL_STAT_CHANGE) == 0) {
if ((psi_reg.subregs.ACfail & AC_FAIL_STAT_CHANGE) == 0) {
/* No further update */
return;
}
......@@ -1135,20 +1154,20 @@ voyager_cat_do_common_interrupt(void)
/* Don't bother trying to find out who failed.
* FIXME: This probably makes the code incorrect on
* anything other than a 345x */
for(i=0; i< 5; i++) {
if( psi_reg.subregs.ACfail &(1<<i)) {
for (i = 0; i < 5; i++) {
if (psi_reg.subregs.ACfail & (1 << i)) {
break;
}
}
printk(KERN_NOTICE "AC FAIL IN SUPPLY %d\n", i);
#endif
/* DON'T do this: it shuts down the AC PSI
outb(VOYAGER_CAT_RUN, CAT_CMD);
data = PSI_MASK_MASK | i;
cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_MASK,
1, &data);
outb(VOYAGER_CAT_END, CAT_CMD);
*/
outb(VOYAGER_CAT_RUN, CAT_CMD);
data = PSI_MASK_MASK | i;
cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_MASK,
1, &data);
outb(VOYAGER_CAT_END, CAT_CMD);
*/
printk(KERN_ERR "Voyager AC power failure\n");
outb(VOYAGER_CAT_RUN, CAT_CMD);
data = PSI_COLD_START;
......@@ -1159,16 +1178,16 @@ voyager_cat_do_common_interrupt(void)
voyager_status.request_from_kernel = 1;
wake_up_process(voyager_thread);
}
} else if(psi_reg.regs.intstatus & PSI_FAULT) {
} else if (psi_reg.regs.intstatus & PSI_FAULT) {
/* Major fault! */
printk(KERN_ERR "Voyager PSI Detected major fault, immediate power off!\n");
printk(KERN_ERR
"Voyager PSI Detected major fault, immediate power off!\n");
voyager_cat_power_off();
/* not reached */
} else if(psi_reg.regs.intstatus & (PSI_DC_FAIL | PSI_ALARM
| PSI_CURRENT | PSI_DVM
| PSI_PSCFAULT | PSI_STAT_CHG)) {
} else if (psi_reg.regs.intstatus & (PSI_DC_FAIL | PSI_ALARM
| PSI_CURRENT | PSI_DVM
| PSI_PSCFAULT | PSI_STAT_CHG)) {
/* other psi fault */
printk(KERN_WARNING "Voyager PSI status 0x%x\n", data);
......
arch/x86/mach-voyager/voyager_smp.c
View file @ a4ec1eff
......@@ -32,7 +32,8 @@
DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { &init_mm, 0 };
/* CPU IRQ affinity -- set to all ones initially */
static unsigned long cpu_irq_affinity[NR_CPUS] __cacheline_aligned = { [0 ... NR_CPUS-1] = ~0UL };
static unsigned long cpu_irq_affinity[NR_CPUS] __cacheline_aligned =
{[0 ... NR_CPUS-1] = ~0UL };
/* per CPU data structure (for /proc/cpuinfo et al), visible externally
* indexed physically */
......@@ -76,7 +77,6 @@ EXPORT_SYMBOL(cpu_online_map);
* by scheduler but indexed physically */
cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
/* The internal functions */
static void send_CPI(__u32 cpuset, __u8 cpi);
static void ack_CPI(__u8 cpi);
......@@ -101,94 +101,86 @@ int hard_smp_processor_id(void);
int safe_smp_processor_id(void);
/* Inline functions */
static inline void
send_one_QIC_CPI(__u8 cpu, __u8 cpi)
static inline void send_one_QIC_CPI(__u8 cpu, __u8 cpi)
{
voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi =
(smp_processor_id() << 16) + cpi;
(smp_processor_id() << 16) + cpi;
}
static inline void
send_QIC_CPI(__u32 cpuset, __u8 cpi)
static inline void send_QIC_CPI(__u32 cpuset, __u8 cpi)
{
int cpu;
for_each_online_cpu(cpu) {
if(cpuset & (1<<cpu)) {
if (cpuset & (1 << cpu)) {
#ifdef VOYAGER_DEBUG
if(!cpu_isset(cpu, cpu_online_map))
VDEBUG(("CPU%d sending cpi %d to CPU%d not in cpu_online_map\n", hard_smp_processor_id(), cpi, cpu));
if (!cpu_isset(cpu, cpu_online_map))
VDEBUG(("CPU%d sending cpi %d to CPU%d not in "
"cpu_online_map\n",
hard_smp_processor_id(), cpi, cpu));
#endif
send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET);
}
}
}
static inline void
wrapper_smp_local_timer_interrupt(void)
static inline void wrapper_smp_local_timer_interrupt(void)
{
irq_enter();
smp_local_timer_interrupt();
irq_exit();
}
static inline void
send_one_CPI(__u8 cpu, __u8 cpi)
static inline void send_one_CPI(__u8 cpu, __u8 cpi)
{
if(voyager_quad_processors & (1<<cpu))
if (voyager_quad_processors & (1 << cpu))
send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET);
else
send_CPI(1<<cpu, cpi);
send_CPI(1 << cpu, cpi);
}
static inline void
send_CPI_allbutself(__u8 cpi)
static inline void send_CPI_allbutself(__u8 cpi)
{
__u8 cpu = smp_processor_id();
__u32 mask = cpus_addr(cpu_online_map)[0] & ~(1 << cpu);
send_CPI(mask, cpi);
}
static inline int
is_cpu_quad(void)
static inline int is_cpu_quad(void)
{
__u8 cpumask = inb(VIC_PROC_WHO_AM_I);
return ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER);
}
static inline int
is_cpu_extended(void)
static inline int is_cpu_extended(void)
{
__u8 cpu = hard_smp_processor_id();
return(voyager_extended_vic_processors & (1<<cpu));
return (voyager_extended_vic_processors & (1 << cpu));
}
static inline int
is_cpu_vic_boot(void)
static inline int is_cpu_vic_boot(void)
{
__u8 cpu = hard_smp_processor_id();
return(voyager_extended_vic_processors
& voyager_allowed_boot_processors & (1<<cpu));
return (voyager_extended_vic_processors
& voyager_allowed_boot_processors & (1 << cpu));
}
static inline void
ack_CPI(__u8 cpi)
static inline void ack_CPI(__u8 cpi)
{
switch(cpi) {
switch (cpi) {
case VIC_CPU_BOOT_CPI:
if(is_cpu_quad() && !is_cpu_vic_boot())
if (is_cpu_quad() && !is_cpu_vic_boot())
ack_QIC_CPI(cpi);
else
ack_VIC_CPI(cpi);
break;
case VIC_SYS_INT:
case VIC_CMN_INT:
case VIC_CMN_INT:
/* These are slightly strange. Even on the Quad card,
* They are vectored as VIC CPIs */
if(is_cpu_quad())
if (is_cpu_quad())
ack_special_QIC_CPI(cpi);
else
ack_VIC_CPI(cpi);
......@@ -205,11 +197,11 @@ ack_CPI(__u8 cpi)
* 8259 IRQs except that masks and things must be kept per processor
*/
static struct irq_chip vic_chip = {
.name = "VIC",
.startup = startup_vic_irq,
.mask = mask_vic_irq,
.unmask = unmask_vic_irq,
.set_affinity = set_vic_irq_affinity,
.name = "VIC",
.startup = startup_vic_irq,
.mask = mask_vic_irq,
.unmask = unmask_vic_irq,
.set_affinity = set_vic_irq_affinity,
};
/* used to count up as CPUs are brought on line (starts at 0) */
......@@ -223,7 +215,7 @@ static __u32 trampoline_base;
/* The per cpu profile stuff - used in smp_local_timer_interrupt */
static DEFINE_PER_CPU(int, prof_multiplier) = 1;
static DEFINE_PER_CPU(int, prof_old_multiplier) = 1;
static DEFINE_PER_CPU(int, prof_counter) = 1;
static DEFINE_PER_CPU(int, prof_counter) = 1;
/* the map used to check if a CPU has booted */
static __u32 cpu_booted_map;
......@@ -246,9 +238,9 @@ static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned;
static __u16 vic_irq_enable_mask[NR_CPUS] __cacheline_aligned = { 0 };
/* Lock for enable/disable of VIC interrupts */
static __cacheline_aligned DEFINE_SPINLOCK(vic_irq_lock);
static __cacheline_aligned DEFINE_SPINLOCK(vic_irq_lock);
/* The boot processor is correctly set up in PC mode when it
/* The boot processor is correctly set up in PC mode when it
* comes up, but the secondaries need their master/slave 8259
* pairs initializing correctly */
......@@ -262,8 +254,7 @@ static unsigned long vic_tick[NR_CPUS] __cacheline_aligned = { 0 };
static unsigned long vic_cpi_mailbox[NR_CPUS] __cacheline_aligned;
/* debugging routine to read the isr of the cpu's pic */
static inline __u16
vic_read_isr(void)
static inline __u16 vic_read_isr(void)
{
__u16 isr;
......@@ -275,17 +266,16 @@ vic_read_isr(void)
return isr;
}
static __init void
qic_setup(void)
static __init void qic_setup(void)
{
if(!is_cpu_quad()) {
if (!is_cpu_quad()) {
/* not a quad, no setup */
return;
}
outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0);
outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1);
if(is_cpu_extended()) {
if (is_cpu_extended()) {
/* the QIC duplicate of the VIC base register */
outb(VIC_DEFAULT_CPI_BASE, QIC_VIC_CPI_BASE_REGISTER);
outb(QIC_DEFAULT_CPI_BASE, QIC_CPI_BASE_REGISTER);
......@@ -295,8 +285,7 @@ qic_setup(void)
}
}
static __init void
vic_setup_pic(void)
static __init void vic_setup_pic(void)
{
outb(1, VIC_REDIRECT_REGISTER_1);
/* clear the claim registers for dynamic routing */
......@@ -333,7 +322,7 @@ vic_setup_pic(void)
/* ICW2: slave vector base */
outb(FIRST_EXTERNAL_VECTOR + 8, 0xA1);
/* ICW3: slave ID */
outb(0x02, 0xA1);
......@@ -341,19 +330,18 @@ vic_setup_pic(void)
outb(0x01, 0xA1);
}
static void
do_quad_bootstrap(void)
static void do_quad_bootstrap(void)
{
if(is_cpu_quad() && is_cpu_vic_boot()) {
if (is_cpu_quad() && is_cpu_vic_boot()) {
int i;
unsigned long flags;
__u8 cpuid = hard_smp_processor_id();
local_irq_save(flags);
for(i = 0; i<4; i++) {
for (i = 0; i < 4; i++) {
/* FIXME: this would be >>3 &0x7 on the 32 way */
if(((cpuid >> 2) & 0x03) == i)
if (((cpuid >> 2) & 0x03) == i)
/* don't lower our own mask! */
continue;
......@@ -368,12 +356,10 @@ do_quad_bootstrap(void)
}
}
/* Set up all the basic stuff: read the SMP config and make all the
* SMP information reflect only the boot cpu. All others will be
* brought on-line later. */
void __init
find_smp_config(void)
void __init find_smp_config(void)
{
int i;
......@@ -382,24 +368,31 @@ find_smp_config(void)
printk("VOYAGER SMP: Boot cpu is %d\n", boot_cpu_id);
/* initialize the CPU structures (moved from smp_boot_cpus) */
for(i=0; i<NR_CPUS; i++) {
for (i = 0; i < NR_CPUS; i++) {
cpu_irq_affinity[i] = ~0;
}
cpu_online_map = cpumask_of_cpu(boot_cpu_id);
/* The boot CPU must be extended */
voyager_extended_vic_processors = 1<<boot_cpu_id;
voyager_extended_vic_processors = 1 << boot_cpu_id;
/* initially, all of the first 8 CPUs can boot */
voyager_allowed_boot_processors = 0xff;
/* set up everything for just this CPU, we can alter
* this as we start the other CPUs later */
/* now get the CPU disposition from the extended CMOS */
cpus_addr(phys_cpu_present_map)[0] = voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK);
cpus_addr(phys_cpu_present_map)[0] |= voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8;
cpus_addr(phys_cpu_present_map)[0] |= voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 2) << 16;
cpus_addr(phys_cpu_present_map)[0] |= voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 3) << 24;
cpus_addr(phys_cpu_present_map)[0] =
voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK);
cpus_addr(phys_cpu_present_map)[0] |=
voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8;
cpus_addr(phys_cpu_present_map)[0] |=
voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
2) << 16;
cpus_addr(phys_cpu_present_map)[0] |=
voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
3) << 24;
cpu_possible_map = phys_cpu_present_map;
printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n", cpus_addr(phys_cpu_present_map)[0]);
printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n",
cpus_addr(phys_cpu_present_map)[0]);
/* Here we set up the VIC to enable SMP */
/* enable the CPIs by writing the base vector to their register */
outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER);
......@@ -427,8 +420,7 @@ find_smp_config(void)
/*
* The bootstrap kernel entry code has set these up. Save them
* for a given CPU, id is physical */
void __init
smp_store_cpu_info(int id)
void __init smp_store_cpu_info(int id)
{
struct cpuinfo_x86 *c = &cpu_data(id);
......@@ -438,21 +430,19 @@ smp_store_cpu_info(int id)
}
/* set up the trampoline and return the physical address of the code */
static __u32 __init
setup_trampoline(void)
static __u32 __init setup_trampoline(void)
{
/* these two are global symbols in trampoline.S */
extern const __u8 trampoline_end[];
extern const __u8 trampoline_data[];
memcpy((__u8 *)trampoline_base, trampoline_data,
memcpy((__u8 *) trampoline_base, trampoline_data,
trampoline_end - trampoline_data);
return virt_to_phys((__u8 *)trampoline_base);
return virt_to_phys((__u8 *) trampoline_base);
}
/* Routine initially called when a non-boot CPU is brought online */
static void __init
start_secondary(void *unused)
static void __init start_secondary(void *unused)
{
__u8 cpuid = hard_smp_processor_id();
/* external functions not defined in the headers */
......@@ -464,17 +454,18 @@ start_secondary(void *unused)
ack_CPI(VIC_CPU_BOOT_CPI);
/* setup the 8259 master slave pair belonging to this CPU ---
* we won't actually receive any until the boot CPU
* relinquishes it's static routing mask */
* we won't actually receive any until the boot CPU
* relinquishes it's static routing mask */
vic_setup_pic();
qic_setup();
if(is_cpu_quad() && !is_cpu_vic_boot()) {
if (is_cpu_quad() && !is_cpu_vic_boot()) {
/* clear the boot CPI */
__u8 dummy;
dummy = voyager_quad_cpi_addr[cpuid]->qic_cpi[VIC_CPU_BOOT_CPI].cpi;
dummy =
voyager_quad_cpi_addr[cpuid]->qic_cpi[VIC_CPU_BOOT_CPI].cpi;
printk("read dummy %d\n", dummy);
}
......@@ -516,7 +507,6 @@ start_secondary(void *unused)
cpu_idle();
}
/* Routine to kick start the given CPU and wait for it to report ready
* (or timeout in startup). When this routine returns, the requested
* CPU is either fully running and configured or known to be dead.
......@@ -524,15 +514,14 @@ start_secondary(void *unused)
* We call this routine sequentially 1 CPU at a time, so no need for
* locking */
static void __init
do_boot_cpu(__u8 cpu)
static void __init do_boot_cpu(__u8 cpu)
{
struct task_struct *idle;
int timeout;
unsigned long flags;
int quad_boot = (1<<cpu) & voyager_quad_processors
& ~( voyager_extended_vic_processors
& voyager_allowed_boot_processors);
int quad_boot = (1 << cpu) & voyager_quad_processors
& ~(voyager_extended_vic_processors
& voyager_allowed_boot_processors);
/* This is an area in head.S which was used to set up the
* initial kernel stack. We need to alter this to give the
......@@ -543,10 +532,10 @@ do_boot_cpu(__u8 cpu)
} stack_start;
/* This is the format of the CPI IDT gate (in real mode) which
* we're hijacking to boot the CPU */
union IDTFormat {
union IDTFormat {
struct seg {
__u16 Offset;
__u16 Segment;
__u16 Offset;
__u16 Segment;
} idt;
__u32 val;
} hijack_source;
......@@ -565,19 +554,19 @@ do_boot_cpu(__u8 cpu)
alternatives_smp_switch(1);
idle = fork_idle(cpu);
if(IS_ERR(idle))
if (IS_ERR(idle))
panic("failed fork for CPU%d", cpu);
idle->thread.eip = (unsigned long) start_secondary;
idle->thread.eip = (unsigned long)start_secondary;
/* init_tasks (in sched.c) is indexed logically */
stack_start.esp = (void *) idle->thread.esp;
stack_start.esp = (void *)idle->thread.esp;
init_gdt(cpu);
per_cpu(current_task, cpu) = idle;
per_cpu(current_task, cpu) = idle;
early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
irq_ctx_init(cpu);
/* Note: Don't modify initial ss override */
VDEBUG(("VOYAGER SMP: Booting CPU%d at 0x%lx[%x:%x], stack %p\n", cpu,
VDEBUG(("VOYAGER SMP: Booting CPU%d at 0x%lx[%x:%x], stack %p\n", cpu,
(unsigned long)hijack_source.val, hijack_source.idt.Segment,
hijack_source.idt.Offset, stack_start.esp));
......@@ -586,16 +575,23 @@ do_boot_cpu(__u8 cpu)
min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
flush_tlb_all();
if(quad_boot) {
if (quad_boot) {
printk("CPU %d: non extended Quad boot\n", cpu);
hijack_vector = (__u32 *)phys_to_virt((VIC_CPU_BOOT_CPI + QIC_DEFAULT_CPI_BASE)*4);
hijack_vector =
(__u32 *)
phys_to_virt((VIC_CPU_BOOT_CPI + QIC_DEFAULT_CPI_BASE) * 4);
*hijack_vector = hijack_source.val;
} else {
printk("CPU%d: extended VIC boot\n", cpu);
hijack_vector = (__u32 *)phys_to_virt((VIC_CPU_BOOT_CPI + VIC_DEFAULT_CPI_BASE)*4);
hijack_vector =
(__u32 *)
phys_to_virt((VIC_CPU_BOOT_CPI + VIC_DEFAULT_CPI_BASE) * 4);
*hijack_vector = hijack_source.val;
/* VIC errata, may also receive interrupt at this address */
hijack_vector = (__u32 *)phys_to_virt((VIC_CPU_BOOT_ERRATA_CPI + VIC_DEFAULT_CPI_BASE)*4);
hijack_vector =
(__u32 *)
phys_to_virt((VIC_CPU_BOOT_ERRATA_CPI +
VIC_DEFAULT_CPI_BASE) * 4);
*hijack_vector = hijack_source.val;
}
/* All non-boot CPUs start with interrupts fully masked. Need
......@@ -603,73 +599,76 @@ do_boot_cpu(__u8 cpu)
* this in the VIC by masquerading as the processor we're
* about to boot and lowering its interrupt mask */
local_irq_save(flags);
if(quad_boot) {
if (quad_boot) {
send_one_QIC_CPI(cpu, VIC_CPU_BOOT_CPI);
} else {
outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID);
/* here we're altering registers belonging to `cpu' */
outb(VIC_BOOT_INTERRUPT_MASK, 0x21);
/* now go back to our original identity */
outb(boot_cpu_id, VIC_PROCESSOR_ID);
/* and boot the CPU */
send_CPI((1<<cpu), VIC_CPU_BOOT_CPI);
send_CPI((1 << cpu), VIC_CPU_BOOT_CPI);
}
cpu_booted_map = 0;
local_irq_restore(flags);
/* now wait for it to become ready (or timeout) */
for(timeout = 0; timeout < 50000; timeout++) {
if(cpu_booted_map)
for (timeout = 0; timeout < 50000; timeout++) {
if (cpu_booted_map)
break;
udelay(100);
}
/* reset the page table */
zap_low_mappings();
if (cpu_booted_map) {
VDEBUG(("CPU%d: Booted successfully, back in CPU %d\n",
cpu, smp_processor_id()));
printk("CPU%d: ", cpu);
print_cpu_info(&cpu_data(cpu));
wmb();
cpu_set(cpu, cpu_callout_map);
cpu_set(cpu, cpu_present_map);
}
else {
} else {
printk("CPU%d FAILED TO BOOT: ", cpu);
if (*((volatile unsigned char *)phys_to_virt(start_phys_address))==0xA5)
if (*
((volatile unsigned char *)phys_to_virt(start_phys_address))
== 0xA5)
printk("Stuck.\n");
else
printk("Not responding.\n");
cpucount--;
}
}
void __init
smp_boot_cpus(void)
void __init smp_boot_cpus(void)
{
int i;
/* CAT BUS initialisation must be done after the memory */
/* FIXME: The L4 has a catbus too, it just needs to be
* accessed in a totally different way */
if(voyager_level == 5) {
if (voyager_level == 5) {
voyager_cat_init();
/* now that the cat has probed the Voyager System Bus, sanity
* check the cpu map */
if( ((voyager_quad_processors | voyager_extended_vic_processors)
& cpus_addr(phys_cpu_present_map)[0]) != cpus_addr(phys_cpu_present_map)[0]) {
if (((voyager_quad_processors | voyager_extended_vic_processors)
& cpus_addr(phys_cpu_present_map)[0]) !=
cpus_addr(phys_cpu_present_map)[0]) {
/* should panic */
printk("\n\n***WARNING*** Sanity check of CPU present map FAILED\n");
printk("\n\n***WARNING*** "
"Sanity check of CPU present map FAILED\n");
}
} else if(voyager_level == 4)
voyager_extended_vic_processors = cpus_addr(phys_cpu_present_map)[0];
} else if (voyager_level == 4)
voyager_extended_vic_processors =
cpus_addr(phys_cpu_present_map)[0];
/* this sets up the idle task to run on the current cpu */
voyager_extended_cpus = 1;
......@@ -678,14 +677,14 @@ smp_boot_cpus(void)
//global_irq_holder = boot_cpu_id;
/* FIXME: Need to do something about this but currently only works
* on CPUs with a tsc which none of mine have.
smp_tune_scheduling();
* on CPUs with a tsc which none of mine have.
smp_tune_scheduling();
*/
smp_store_cpu_info(boot_cpu_id);
printk("CPU%d: ", boot_cpu_id);
print_cpu_info(&cpu_data(boot_cpu_id));
if(is_cpu_quad()) {
if (is_cpu_quad()) {
/* booting on a Quad CPU */
printk("VOYAGER SMP: Boot CPU is Quad\n");
qic_setup();
......@@ -697,11 +696,11 @@ smp_boot_cpus(void)
cpu_set(boot_cpu_id, cpu_online_map);
cpu_set(boot_cpu_id, cpu_callout_map);
/* loop over all the extended VIC CPUs and boot them. The
/* loop over all the extended VIC CPUs and boot them. The
* Quad CPUs must be bootstrapped by their extended VIC cpu */
for(i = 0; i < NR_CPUS; i++) {
if(i == boot_cpu_id || !cpu_isset(i, phys_cpu_present_map))
for (i = 0; i < NR_CPUS; i++) {
if (i == boot_cpu_id || !cpu_isset(i, phys_cpu_present_map))
continue;
do_boot_cpu(i);
/* This udelay seems to be needed for the Quad boots
......@@ -715,25 +714,26 @@ smp_boot_cpus(void)
for (i = 0; i < NR_CPUS; i++)
if (cpu_isset(i, cpu_online_map))
bogosum += cpu_data(i).loops_per_jiffy;
printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
cpucount+1,
bogosum/(500000/HZ),
(bogosum/(5000/HZ))%100);
printk(KERN_INFO "Total of %d processors activated "
"(%lu.%02lu BogoMIPS).\n",
cpucount + 1, bogosum / (500000 / HZ),
(bogosum / (5000 / HZ)) % 100);
}
voyager_extended_cpus = hweight32(voyager_extended_vic_processors);
printk("VOYAGER: Extended (interrupt handling CPUs): %d, non-extended: %d\n", voyager_extended_cpus, num_booting_cpus() - voyager_extended_cpus);
printk("VOYAGER: Extended (interrupt handling CPUs): "
"%d, non-extended: %d\n", voyager_extended_cpus,
num_booting_cpus() - voyager_extended_cpus);
/* that's it, switch to symmetric mode */
outb(0, VIC_PRIORITY_REGISTER);
outb(0, VIC_CLAIM_REGISTER_0);
outb(0, VIC_CLAIM_REGISTER_1);
VDEBUG(("VOYAGER SMP: Booted with %d CPUs\n", num_booting_cpus()));
}
/* Reload the secondary CPUs task structure (this function does not
* return ) */
void __init
initialize_secondary(void)
void __init initialize_secondary(void)
{
#if 0
// AC kernels only
......@@ -745,11 +745,9 @@ initialize_secondary(void)
* basically just the stack pointer and the eip.
*/
asm volatile(
"movl %0,%%esp\n\t"
"jmp *%1"
:
:"r" (current->thread.esp),"r" (current->thread.eip));
asm volatile ("movl %0,%%esp\n\t"
"jmp *%1"::"r" (current->thread.esp),
"r"(current->thread.eip));
}
/* handle a Voyager SYS_INT -- If we don't, the base board will
......@@ -758,25 +756,23 @@ initialize_secondary(void)
* System interrupts occur because some problem was detected on the
* various busses. To find out what you have to probe all the
* hardware via the CAT bus. FIXME: At the moment we do nothing. */
fastcall void
smp_vic_sys_interrupt(struct pt_regs *regs)
fastcall void smp_vic_sys_interrupt(struct pt_regs *regs)
{
ack_CPI(VIC_SYS_INT);
printk("Voyager SYSTEM INTERRUPT\n");
printk("Voyager SYSTEM INTERRUPT\n");
}
/* Handle a voyager CMN_INT; These interrupts occur either because of
* a system status change or because a single bit memory error
* occurred. FIXME: At the moment, ignore all this. */
fastcall void
smp_vic_cmn_interrupt(struct pt_regs *regs)
fastcall void smp_vic_cmn_interrupt(struct pt_regs *regs)
{
static __u8 in_cmn_int = 0;
static DEFINE_SPINLOCK(cmn_int_lock);
/* common ints are broadcast, so make sure we only do this once */
_raw_spin_lock(&cmn_int_lock);
if(in_cmn_int)
if (in_cmn_int)
goto unlock_end;
in_cmn_int++;
......@@ -784,12 +780,12 @@ smp_vic_cmn_interrupt(struct pt_regs *regs)
VDEBUG(("Voyager COMMON INTERRUPT\n"));
if(voyager_level == 5)
if (voyager_level == 5)
voyager_cat_do_common_interrupt();
_raw_spin_lock(&cmn_int_lock);
in_cmn_int = 0;
unlock_end:
unlock_end:
_raw_spin_unlock(&cmn_int_lock);
ack_CPI(VIC_CMN_INT);
}
......@@ -797,26 +793,24 @@ smp_vic_cmn_interrupt(struct pt_regs *regs)
/*
* Reschedule call back. Nothing to do, all the work is done
* automatically when we return from the interrupt. */
static void
smp_reschedule_interrupt(void)
static void smp_reschedule_interrupt(void)
{
/* do nothing */
}
static struct mm_struct * flush_mm;
static struct mm_struct *flush_mm;
static unsigned long flush_va;
static DEFINE_SPINLOCK(tlbstate_lock);
#define FLUSH_ALL 0xffffffff
/*
* We cannot call mmdrop() because we are in interrupt context,
* We cannot call mmdrop() because we are in interrupt context,
* instead update mm->cpu_vm_mask.
*
* We need to reload %cr3 since the page tables may be going
* away from under us..
*/
static inline void
leave_mm (unsigned long cpu)
static inline void leave_mm(unsigned long cpu)
{
if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
BUG();
......@@ -824,12 +818,10 @@ leave_mm (unsigned long cpu)
load_cr3(swapper_pg_dir);
}
/*
* Invalidate call-back
*/
static void
smp_invalidate_interrupt(void)
static void smp_invalidate_interrupt(void)
{
__u8 cpu = smp_processor_id();
......@@ -837,9 +829,9 @@ smp_invalidate_interrupt(void)
return;
/* This will flood messages. Don't uncomment unless you see
* Problems with cross cpu invalidation
VDEBUG(("VOYAGER SMP: CPU%d received INVALIDATE_CPI\n",
smp_processor_id()));
*/
VDEBUG(("VOYAGER SMP: CPU%d received INVALIDATE_CPI\n",
smp_processor_id()));
*/
if (flush_mm == per_cpu(cpu_tlbstate, cpu).active_mm) {
if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) {
......@@ -857,11 +849,10 @@ smp_invalidate_interrupt(void)
/* All the new flush operations for 2.4 */
/* This routine is called with a physical cpu mask */
static void
voyager_flush_tlb_others (unsigned long cpumask, struct mm_struct *mm,
unsigned long va)
voyager_flush_tlb_others(unsigned long cpumask, struct mm_struct *mm,
unsigned long va)
{
int stuck = 50000;
......@@ -875,7 +866,7 @@ voyager_flush_tlb_others (unsigned long cpumask, struct mm_struct *mm,
BUG();
spin_lock(&tlbstate_lock);
flush_mm = mm;
flush_va = va;
atomic_set_mask(cpumask, &smp_invalidate_needed);
......@@ -887,23 +878,23 @@ voyager_flush_tlb_others (unsigned long cpumask, struct mm_struct *mm,
while (smp_invalidate_needed) {
mb();
if(--stuck == 0) {
printk("***WARNING*** Stuck doing invalidate CPI (CPU%d)\n", smp_processor_id());
if (--stuck == 0) {
printk("***WARNING*** Stuck doing invalidate CPI "
"(CPU%d)\n", smp_processor_id());
break;
}
}
/* Uncomment only to debug invalidation problems
VDEBUG(("VOYAGER SMP: Completed invalidate CPI (CPU%d)\n", cpu));
*/
VDEBUG(("VOYAGER SMP: Completed invalidate CPI (CPU%d)\n", cpu));
*/
flush_mm = NULL;
flush_va = 0;
spin_unlock(&tlbstate_lock);
}
void
flush_tlb_current_task(void)
void flush_tlb_current_task(void)
{
struct mm_struct *mm = current->mm;
unsigned long cpu_mask;
......@@ -918,9 +909,7 @@ flush_tlb_current_task(void)
preempt_enable();
}
void
flush_tlb_mm (struct mm_struct * mm)
void flush_tlb_mm(struct mm_struct *mm)
{
unsigned long cpu_mask;
......@@ -940,7 +929,7 @@ flush_tlb_mm (struct mm_struct * mm)
preempt_enable();
}
void flush_tlb_page(struct vm_area_struct * vma, unsigned long va)
void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
{
struct mm_struct *mm = vma->vm_mm;
unsigned long cpu_mask;
......@@ -949,10 +938,10 @@ void flush_tlb_page(struct vm_area_struct * vma, unsigned long va)
cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
if (current->active_mm == mm) {
if(current->mm)
if (current->mm)
__flush_tlb_one(va);
else
leave_mm(smp_processor_id());
else
leave_mm(smp_processor_id());
}
if (cpu_mask)
......@@ -960,21 +949,21 @@ void flush_tlb_page(struct vm_area_struct * vma, unsigned long va)
preempt_enable();
}
EXPORT_SYMBOL(flush_tlb_page);
/* enable the requested IRQs */
static void
smp_enable_irq_interrupt(void)
static void smp_enable_irq_interrupt(void)
{
__u8 irq;
__u8 cpu = get_cpu();
VDEBUG(("VOYAGER SMP: CPU%d enabling irq mask 0x%x\n", cpu,
vic_irq_enable_mask[cpu]));
vic_irq_enable_mask[cpu]));
spin_lock(&vic_irq_lock);
for(irq = 0; irq < 16; irq++) {
if(vic_irq_enable_mask[cpu] & (1<<irq))
for (irq = 0; irq < 16; irq++) {
if (vic_irq_enable_mask[cpu] & (1 << irq))
enable_local_vic_irq(irq);
}
vic_irq_enable_mask[cpu] = 0;
......@@ -982,17 +971,16 @@ smp_enable_irq_interrupt(void)
put_cpu_no_resched();
}
/*
* CPU halt call-back
*/
static void
smp_stop_cpu_function(void *dummy)
static void smp_stop_cpu_function(void *dummy)
{
VDEBUG(("VOYAGER SMP: CPU%d is STOPPING\n", smp_processor_id()));
cpu_clear(smp_processor_id(), cpu_online_map);
local_irq_disable();
for(;;)
for (;;)
halt();
}
......@@ -1006,14 +994,13 @@ struct call_data_struct {
int wait;
};
static struct call_data_struct * call_data;
static struct call_data_struct *call_data;
/* execute a thread on a new CPU. The function to be called must be
* previously set up. This is used to schedule a function for
* execution on all CPUs - set up the function then broadcast a
* function_interrupt CPI to come here on each CPU */
static void
smp_call_function_interrupt(void)
static void smp_call_function_interrupt(void)
{
void (*func) (void *info) = call_data->func;
void *info = call_data->info;
......@@ -1027,16 +1014,17 @@ smp_call_function_interrupt(void)
* about to execute the function
*/
mb();
if(!test_and_clear_bit(cpu, &call_data->started)) {
if (!test_and_clear_bit(cpu, &call_data->started)) {
/* If the bit wasn't set, this could be a replay */
printk(KERN_WARNING "VOYAGER SMP: CPU %d received call funtion with no call pending\n", cpu);
printk(KERN_WARNING "VOYAGER SMP: CPU %d received call funtion"
" with no call pending\n", cpu);
return;
}
/*
* At this point the info structure may be out of scope unless wait==1
*/
irq_enter();
(*func)(info);
(*func) (info);
__get_cpu_var(irq_stat).irq_call_count++;
irq_exit();
if (wait) {
......@@ -1046,14 +1034,13 @@ smp_call_function_interrupt(void)
}
static int
voyager_smp_call_function_mask (cpumask_t cpumask,
void (*func) (void *info), void *info,
int wait)
voyager_smp_call_function_mask(cpumask_t cpumask,
void (*func) (void *info), void *info, int wait)
{
struct call_data_struct data;
u32 mask = cpus_addr(cpumask)[0];
mask &= ~(1<<smp_processor_id());
mask &= ~(1 << smp_processor_id());
if (!mask)
return 0;
......@@ -1093,7 +1080,7 @@ voyager_smp_call_function_mask (cpumask_t cpumask,
* so we use the system clock to interrupt one processor, which in
* turn, broadcasts a timer CPI to all the others --- we receive that
* CPI here. We don't use this actually for counting so losing
* ticks doesn't matter
* ticks doesn't matter
*
* FIXME: For those CPUs which actually have a local APIC, we could
* try to use it to trigger this interrupt instead of having to
......@@ -1101,8 +1088,7 @@ voyager_smp_call_function_mask (cpumask_t cpumask,
* no local APIC, so I can't do this
*
* This function is currently a placeholder and is unused in the code */
fastcall void
smp_apic_timer_interrupt(struct pt_regs *regs)
fastcall void smp_apic_timer_interrupt(struct pt_regs *regs)
{
struct pt_regs *old_regs = set_irq_regs(regs);
wrapper_smp_local_timer_interrupt();
......@@ -1110,8 +1096,7 @@ smp_apic_timer_interrupt(struct pt_regs *regs)
}
/* All of the QUAD interrupt GATES */
fastcall void
smp_qic_timer_interrupt(struct pt_regs *regs)
fastcall void smp_qic_timer_interrupt(struct pt_regs *regs)
{
struct pt_regs *old_regs = set_irq_regs(regs);
ack_QIC_CPI(QIC_TIMER_CPI);
......@@ -1119,60 +1104,54 @@ smp_qic_timer_interrupt(struct pt_regs *regs)
set_irq_regs(old_regs);
}
fastcall void
smp_qic_invalidate_interrupt(struct pt_regs *regs)
fastcall void smp_qic_invalidate_interrupt(struct pt_regs *regs)
{
ack_QIC_CPI(QIC_INVALIDATE_CPI);
smp_invalidate_interrupt();
}
fastcall void
smp_qic_reschedule_interrupt(struct pt_regs *regs)
fastcall void smp_qic_reschedule_interrupt(struct pt_regs *regs)
{
ack_QIC_CPI(QIC_RESCHEDULE_CPI);
smp_reschedule_interrupt();
}
fastcall void
smp_qic_enable_irq_interrupt(struct pt_regs *regs)
fastcall void smp_qic_enable_irq_interrupt(struct pt_regs *regs)
{
ack_QIC_CPI(QIC_ENABLE_IRQ_CPI);
smp_enable_irq_interrupt();
}
fastcall void
smp_qic_call_function_interrupt(struct pt_regs *regs)
fastcall void smp_qic_call_function_interrupt(struct pt_regs *regs)
{
ack_QIC_CPI(QIC_CALL_FUNCTION_CPI);
smp_call_function_interrupt();
}
fastcall void
smp_vic_cpi_interrupt(struct pt_regs *regs)
fastcall void smp_vic_cpi_interrupt(struct pt_regs *regs)
{
struct pt_regs *old_regs = set_irq_regs(regs);
__u8 cpu = smp_processor_id();
if(is_cpu_quad())
if (is_cpu_quad())
ack_QIC_CPI(VIC_CPI_LEVEL0);
else
ack_VIC_CPI(VIC_CPI_LEVEL0);
if(test_and_clear_bit(VIC_TIMER_CPI, &vic_cpi_mailbox[cpu]))
if (test_and_clear_bit(VIC_TIMER_CPI, &vic_cpi_mailbox[cpu]))
wrapper_smp_local_timer_interrupt();
if(test_and_clear_bit(VIC_INVALIDATE_CPI, &vic_cpi_mailbox[cpu]))
if (test_and_clear_bit(VIC_INVALIDATE_CPI, &vic_cpi_mailbox[cpu]))
smp_invalidate_interrupt();
if(test_and_clear_bit(VIC_RESCHEDULE_CPI, &vic_cpi_mailbox[cpu]))
if (test_and_clear_bit(VIC_RESCHEDULE_CPI, &vic_cpi_mailbox[cpu]))
smp_reschedule_interrupt();
if(test_and_clear_bit(VIC_ENABLE_IRQ_CPI, &vic_cpi_mailbox[cpu]))
if (test_and_clear_bit(VIC_ENABLE_IRQ_CPI, &vic_cpi_mailbox[cpu]))
smp_enable_irq_interrupt();
if(test_and_clear_bit(VIC_CALL_FUNCTION_CPI, &vic_cpi_mailbox[cpu]))
if (test_and_clear_bit(VIC_CALL_FUNCTION_CPI, &vic_cpi_mailbox[cpu]))
smp_call_function_interrupt();
set_irq_regs(old_regs);
}
static void
do_flush_tlb_all(void* info)
static void do_flush_tlb_all(void *info)
{
unsigned long cpu = smp_processor_id();
......@@ -1181,65 +1160,56 @@ do_flush_tlb_all(void* info)
leave_mm(cpu);
}
/* flush the TLB of every active CPU in the system */
void
flush_tlb_all(void)
void flush_tlb_all(void)
{
on_each_cpu(do_flush_tlb_all, 0, 1, 1);
}
/* used to set up the trampoline for other CPUs when the memory manager
* is sorted out */
void __init
smp_alloc_memory(void)
void __init smp_alloc_memory(void)
{
trampoline_base = (__u32)alloc_bootmem_low_pages(PAGE_SIZE);
if(__pa(trampoline_base) >= 0x93000)
trampoline_base = (__u32) alloc_bootmem_low_pages(PAGE_SIZE);
if (__pa(trampoline_base) >= 0x93000)
BUG();
}
/* send a reschedule CPI to one CPU by physical CPU number*/
static void
voyager_smp_send_reschedule(int cpu)
static void voyager_smp_send_reschedule(int cpu)
{
send_one_CPI(cpu, VIC_RESCHEDULE_CPI);
}
int
hard_smp_processor_id(void)
int hard_smp_processor_id(void)
{
__u8 i;
__u8 cpumask = inb(VIC_PROC_WHO_AM_I);
if((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER)
if ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER)
return cpumask & 0x1F;
for(i = 0; i < 8; i++) {
if(cpumask & (1<<i))
for (i = 0; i < 8; i++) {
if (cpumask & (1 << i))
return i;
}
printk("** WARNING ** Illegal cpuid returned by VIC: %d", cpumask);
return 0;
}
int
safe_smp_processor_id(void)
int safe_smp_processor_id(void)
{
return hard_smp_processor_id();
}
/* broadcast a halt to all other CPUs */
static void
voyager_smp_send_stop(void)
static void voyager_smp_send_stop(void)
{
smp_call_function(smp_stop_cpu_function, NULL, 1, 1);
}
/* this function is triggered in time.c when a clock tick fires
* we need to re-broadcast the tick to all CPUs */
void
smp_vic_timer_interrupt(void)
void smp_vic_timer_interrupt(void)
{
send_CPI_allbutself(VIC_TIMER_CPI);
smp_local_timer_interrupt();
......@@ -1253,8 +1223,7 @@ smp_vic_timer_interrupt(void)
* multiplier is 1 and it can be changed by writing the new multiplier
* value into /proc/profile.
*/
void
smp_local_timer_interrupt(void)
void smp_local_timer_interrupt(void)
{
int cpu = smp_processor_id();
long weight;
......@@ -1269,18 +1238,18 @@ smp_local_timer_interrupt(void)
*
* Interrupts are already masked off at this point.
*/
per_cpu(prof_counter,cpu) = per_cpu(prof_multiplier, cpu);
per_cpu(prof_counter, cpu) = per_cpu(prof_multiplier, cpu);
if (per_cpu(prof_counter, cpu) !=
per_cpu(prof_old_multiplier, cpu)) {
per_cpu(prof_old_multiplier, cpu)) {
/* FIXME: need to update the vic timer tick here */
per_cpu(prof_old_multiplier, cpu) =
per_cpu(prof_counter, cpu);
per_cpu(prof_counter, cpu);
}
update_process_times(user_mode_vm(get_irq_regs()));
}
if( ((1<<cpu) & voyager_extended_vic_processors) == 0)
if (((1 << cpu) & voyager_extended_vic_processors) == 0)
/* only extended VIC processors participate in
* interrupt distribution */
return;
......@@ -1296,12 +1265,12 @@ smp_local_timer_interrupt(void)
* we can take more than 100K local irqs per second on a 100 MHz P5.
*/
if((++vic_tick[cpu] & 0x7) != 0)
if ((++vic_tick[cpu] & 0x7) != 0)
return;
/* get here every 16 ticks (about every 1/6 of a second) */
/* Change our priority to give someone else a chance at getting
* the IRQ. The algorithm goes like this:
* the IRQ. The algorithm goes like this:
*
* In the VIC, the dynamically routed interrupt is always
* handled by the lowest priority eligible (i.e. receiving
......@@ -1325,18 +1294,18 @@ smp_local_timer_interrupt(void)
* affinity code since we now try to even up the interrupt
* counts when an affinity binding is keeping them on a
* particular CPU*/
weight = (vic_intr_count[cpu]*voyager_extended_cpus
weight = (vic_intr_count[cpu] * voyager_extended_cpus
- vic_intr_total) >> 4;
weight += 4;
if(weight > 7)
if (weight > 7)
weight = 7;
if(weight < 0)
if (weight < 0)
weight = 0;
outb((__u8)weight, VIC_PRIORITY_REGISTER);
outb((__u8) weight, VIC_PRIORITY_REGISTER);
#ifdef VOYAGER_DEBUG
if((vic_tick[cpu] & 0xFFF) == 0) {
if ((vic_tick[cpu] & 0xFFF) == 0) {
/* print this message roughly every 25 secs */
printk("VOYAGER SMP: vic_tick[%d] = %lu, weight = %ld\n",
cpu, vic_tick[cpu], weight);
......@@ -1345,15 +1314,14 @@ smp_local_timer_interrupt(void)
}
/* setup the profiling timer */
int
setup_profiling_timer(unsigned int multiplier)
int setup_profiling_timer(unsigned int multiplier)
{
int i;
if ( (!multiplier))
if ((!multiplier))
return -EINVAL;
/*
/*
* Set the new multiplier for each CPU. CPUs don't start using the
* new values until the next timer interrupt in which they do process
* accounting.
......@@ -1367,15 +1335,13 @@ setup_profiling_timer(unsigned int multiplier)
/* This is a bit of a mess, but forced on us by the genirq changes
* there's no genirq handler that really does what voyager wants
* so hack it up with the simple IRQ handler */
static void fastcall
handle_vic_irq(unsigned int irq, struct irq_desc *desc)
static void fastcall handle_vic_irq(unsigned int irq, struct irq_desc *desc)
{
before_handle_vic_irq(irq);
handle_simple_irq(irq, desc);
after_handle_vic_irq(irq);
}
/* The CPIs are handled in the per cpu 8259s, so they must be
* enabled to be received: FIX: enabling the CPIs in the early
* boot sequence interferes with bug checking; enable them later
......@@ -1385,13 +1351,12 @@ handle_vic_irq(unsigned int irq, struct irq_desc *desc)
#define QIC_SET_GATE(cpi, vector) \
set_intr_gate((cpi) + QIC_DEFAULT_CPI_BASE, (vector))
void __init
smp_intr_init(void)
void __init smp_intr_init(void)
{
int i;
/* initialize the per cpu irq mask to all disabled */
for(i = 0; i < NR_CPUS; i++)
for (i = 0; i < NR_CPUS; i++)
vic_irq_mask[i] = 0xFFFF;
VIC_SET_GATE(VIC_CPI_LEVEL0, vic_cpi_interrupt);
......@@ -1404,42 +1369,40 @@ smp_intr_init(void)
QIC_SET_GATE(QIC_RESCHEDULE_CPI, qic_reschedule_interrupt);
QIC_SET_GATE(QIC_ENABLE_IRQ_CPI, qic_enable_irq_interrupt);
QIC_SET_GATE(QIC_CALL_FUNCTION_CPI, qic_call_function_interrupt);
/* now put the VIC descriptor into the first 48 IRQs
/* now put the VIC descriptor into the first 48 IRQs
*
* This is for later: first 16 correspond to PC IRQs; next 16
* are Primary MC IRQs and final 16 are Secondary MC IRQs */
for(i = 0; i < 48; i++)
for (i = 0; i < 48; i++)
set_irq_chip_and_handler(i, &vic_chip, handle_vic_irq);
}
/* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per
* processor to receive CPI */
static void
send_CPI(__u32 cpuset, __u8 cpi)
static void send_CPI(__u32 cpuset, __u8 cpi)
{
int cpu;
__u32 quad_cpuset = (cpuset & voyager_quad_processors);
if(cpi < VIC_START_FAKE_CPI) {
/* fake CPI are only used for booting, so send to the
if (cpi < VIC_START_FAKE_CPI) {
/* fake CPI are only used for booting, so send to the
* extended quads as well---Quads must be VIC booted */
outb((__u8)(cpuset), VIC_CPI_Registers[cpi]);
outb((__u8) (cpuset), VIC_CPI_Registers[cpi]);
return;
}
if(quad_cpuset)
if (quad_cpuset)
send_QIC_CPI(quad_cpuset, cpi);
cpuset &= ~quad_cpuset;
cpuset &= 0xff; /* only first 8 CPUs vaild for VIC CPI */
if(cpuset == 0)
if (cpuset == 0)
return;
for_each_online_cpu(cpu) {
if(cpuset & (1<<cpu))
if (cpuset & (1 << cpu))
set_bit(cpi, &vic_cpi_mailbox[cpu]);
}
if(cpuset)
outb((__u8)cpuset, VIC_CPI_Registers[VIC_CPI_LEVEL0]);
if (cpuset)
outb((__u8) cpuset, VIC_CPI_Registers[VIC_CPI_LEVEL0]);
}
/* Acknowledge receipt of CPI in the QIC, clear in QIC hardware and
......@@ -1448,20 +1411,19 @@ send_CPI(__u32 cpuset, __u8 cpi)
* DON'T make this inline otherwise the cache line read will be
* optimised away
* */
static int
ack_QIC_CPI(__u8 cpi) {
static int ack_QIC_CPI(__u8 cpi)
{
__u8 cpu = hard_smp_processor_id();
cpi &= 7;
outb(1<<cpi, QIC_INTERRUPT_CLEAR1);
outb(1 << cpi, QIC_INTERRUPT_CLEAR1);
return voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi;
}
static void
ack_special_QIC_CPI(__u8 cpi)
static void ack_special_QIC_CPI(__u8 cpi)
{
switch(cpi) {
switch (cpi) {
case VIC_CMN_INT:
outb(QIC_CMN_INT, QIC_INTERRUPT_CLEAR0);
break;
......@@ -1474,8 +1436,7 @@ ack_special_QIC_CPI(__u8 cpi)
}
/* Acknowledge receipt of CPI in the VIC (essentially an EOI) */
static void
ack_VIC_CPI(__u8 cpi)
static void ack_VIC_CPI(__u8 cpi)
{
#ifdef VOYAGER_DEBUG
unsigned long flags;
......@@ -1484,17 +1445,17 @@ ack_VIC_CPI(__u8 cpi)
local_irq_save(flags);
isr = vic_read_isr();
if((isr & (1<<(cpi &7))) == 0) {
if ((isr & (1 << (cpi & 7))) == 0) {
printk("VOYAGER SMP: CPU%d lost CPI%d\n", cpu, cpi);
}
#endif
/* send specific EOI; the two system interrupts have
* bit 4 set for a separate vector but behave as the
* corresponding 3 bit intr */
outb_p(0x60|(cpi & 7),0x20);
outb_p(0x60 | (cpi & 7), 0x20);
#ifdef VOYAGER_DEBUG
if((vic_read_isr() & (1<<(cpi &7))) != 0) {
if ((vic_read_isr() & (1 << (cpi & 7))) != 0) {
printk("VOYAGER SMP: CPU%d still asserting CPI%d\n", cpu, cpi);
}
local_irq_restore(flags);
......@@ -1502,12 +1463,11 @@ ack_VIC_CPI(__u8 cpi)
}
/* cribbed with thanks from irq.c */
#define __byte(x,y) (((unsigned char *)&(y))[x])
#define __byte(x,y) (((unsigned char *)&(y))[x])
#define cached_21(cpu) (__byte(0,vic_irq_mask[cpu]))
#define cached_A1(cpu) (__byte(1,vic_irq_mask[cpu]))
static unsigned int
startup_vic_irq(unsigned int irq)
static unsigned int startup_vic_irq(unsigned int irq)
{
unmask_vic_irq(irq);
......@@ -1535,13 +1495,12 @@ startup_vic_irq(unsigned int irq)
* broadcast an Interrupt enable CPI which causes all other CPUs to
* adjust their masks accordingly. */
static void
unmask_vic_irq(unsigned int irq)
static void unmask_vic_irq(unsigned int irq)
{
/* linux doesn't to processor-irq affinity, so enable on
* all CPUs we know about */
int cpu = smp_processor_id(), real_cpu;
__u16 mask = (1<<irq);
__u16 mask = (1 << irq);
__u32 processorList = 0;
unsigned long flags;
......@@ -1549,78 +1508,72 @@ unmask_vic_irq(unsigned int irq)
irq, cpu, cpu_irq_affinity[cpu]));
spin_lock_irqsave(&vic_irq_lock, flags);
for_each_online_cpu(real_cpu) {
if(!(voyager_extended_vic_processors & (1<<real_cpu)))
if (!(voyager_extended_vic_processors & (1 << real_cpu)))
continue;
if(!(cpu_irq_affinity[real_cpu] & mask)) {
if (!(cpu_irq_affinity[real_cpu] & mask)) {
/* irq has no affinity for this CPU, ignore */
continue;
}
if(real_cpu == cpu) {
if (real_cpu == cpu) {
enable_local_vic_irq(irq);
}
else if(vic_irq_mask[real_cpu] & mask) {
} else if (vic_irq_mask[real_cpu] & mask) {
vic_irq_enable_mask[real_cpu] |= mask;
processorList |= (1<<real_cpu);
processorList |= (1 << real_cpu);
}
}
spin_unlock_irqrestore(&vic_irq_lock, flags);
if(processorList)
if (processorList)
send_CPI(processorList, VIC_ENABLE_IRQ_CPI);
}
static void
mask_vic_irq(unsigned int irq)
static void mask_vic_irq(unsigned int irq)
{
/* lazy disable, do nothing */
}
static void
enable_local_vic_irq(unsigned int irq)
static void enable_local_vic_irq(unsigned int irq)
{
__u8 cpu = smp_processor_id();
__u16 mask = ~(1 << irq);
__u16 old_mask = vic_irq_mask[cpu];
vic_irq_mask[cpu] &= mask;
if(vic_irq_mask[cpu] == old_mask)
if (vic_irq_mask[cpu] == old_mask)
return;
VDEBUG(("VOYAGER DEBUG: Enabling irq %d in hardware on CPU %d\n",
irq, cpu));
if (irq & 8) {
outb_p(cached_A1(cpu),0xA1);
outb_p(cached_A1(cpu), 0xA1);
(void)inb_p(0xA1);
}
else {
outb_p(cached_21(cpu),0x21);
} else {
outb_p(cached_21(cpu), 0x21);
(void)inb_p(0x21);
}
}
static void
disable_local_vic_irq(unsigned int irq)
static void disable_local_vic_irq(unsigned int irq)
{
__u8 cpu = smp_processor_id();
__u16 mask = (1 << irq);
__u16 old_mask = vic_irq_mask[cpu];
if(irq == 7)
if (irq == 7)
return;
vic_irq_mask[cpu] |= mask;
if(old_mask == vic_irq_mask[cpu])
if (old_mask == vic_irq_mask[cpu])
return;
VDEBUG(("VOYAGER DEBUG: Disabling irq %d in hardware on CPU %d\n",
irq, cpu));
if (irq & 8) {
outb_p(cached_A1(cpu),0xA1);
outb_p(cached_A1(cpu), 0xA1);
(void)inb_p(0xA1);
}
else {
outb_p(cached_21(cpu),0x21);
} else {
outb_p(cached_21(cpu), 0x21);
(void)inb_p(0x21);
}
}
......@@ -1631,8 +1584,7 @@ disable_local_vic_irq(unsigned int irq)
* interrupt in the vic, so we merely set a flag (IRQ_DISABLED). If
* this interrupt actually comes in, then we mask and ack here to push
* the interrupt off to another CPU */
static void
before_handle_vic_irq(unsigned int irq)
static void before_handle_vic_irq(unsigned int irq)
{
irq_desc_t *desc = irq_desc + irq;
__u8 cpu = smp_processor_id();
......@@ -1641,16 +1593,16 @@ before_handle_vic_irq(unsigned int irq)
vic_intr_total++;
vic_intr_count[cpu]++;
if(!(cpu_irq_affinity[cpu] & (1<<irq))) {
if (!(cpu_irq_affinity[cpu] & (1 << irq))) {
/* The irq is not in our affinity mask, push it off
* onto another CPU */
VDEBUG(("VOYAGER DEBUG: affinity triggered disable of irq %d on cpu %d\n",
irq, cpu));
VDEBUG(("VOYAGER DEBUG: affinity triggered disable of irq %d "
"on cpu %d\n", irq, cpu));
disable_local_vic_irq(irq);
/* set IRQ_INPROGRESS to prevent the handler in irq.c from
* actually calling the interrupt routine */
desc->status |= IRQ_REPLAY | IRQ_INPROGRESS;
} else if(desc->status & IRQ_DISABLED) {
} else if (desc->status & IRQ_DISABLED) {
/* Damn, the interrupt actually arrived, do the lazy
* disable thing. The interrupt routine in irq.c will
* not handle a IRQ_DISABLED interrupt, so nothing more
......@@ -1667,8 +1619,7 @@ before_handle_vic_irq(unsigned int irq)
}
/* Finish the VIC interrupt: basically mask */
static void
after_handle_vic_irq(unsigned int irq)
static void after_handle_vic_irq(unsigned int irq)
{
irq_desc_t *desc = irq_desc + irq;
......@@ -1685,11 +1636,11 @@ after_handle_vic_irq(unsigned int irq)
#ifdef VOYAGER_DEBUG
/* DEBUG: before we ack, check what's in progress */
isr = vic_read_isr();
if((isr & (1<<irq) && !(status & IRQ_REPLAY)) == 0) {
if ((isr & (1 << irq) && !(status & IRQ_REPLAY)) == 0) {
int i;
__u8 cpu = smp_processor_id();
__u8 real_cpu;
int mask; /* Um... initialize me??? --RR */
int mask; /* Um... initialize me??? --RR */
printk("VOYAGER SMP: CPU%d lost interrupt %d\n",
cpu, irq);
......@@ -1698,9 +1649,10 @@ after_handle_vic_irq(unsigned int irq)
outb(VIC_CPU_MASQUERADE_ENABLE | real_cpu,
VIC_PROCESSOR_ID);
isr = vic_read_isr();
if(isr & (1<<irq)) {
printk("VOYAGER SMP: CPU%d ack irq %d\n",
real_cpu, irq);
if (isr & (1 << irq)) {
printk
("VOYAGER SMP: CPU%d ack irq %d\n",
real_cpu, irq);
ack_vic_irq(irq);
}
outb(cpu, VIC_PROCESSOR_ID);
......@@ -1711,7 +1663,7 @@ after_handle_vic_irq(unsigned int irq)
* receipt by another CPU so everything must be in
* order here */
ack_vic_irq(irq);
if(status & IRQ_REPLAY) {
if (status & IRQ_REPLAY) {
/* replay is set if we disable the interrupt
* in the before_handle_vic_irq() routine, so
* clear the in progress bit here to allow the
......@@ -1720,9 +1672,9 @@ after_handle_vic_irq(unsigned int irq)
}
#ifdef VOYAGER_DEBUG
isr = vic_read_isr();
if((isr & (1<<irq)) != 0)
printk("VOYAGER SMP: after_handle_vic_irq() after ack irq=%d, isr=0x%x\n",
irq, isr);
if ((isr & (1 << irq)) != 0)
printk("VOYAGER SMP: after_handle_vic_irq() after "
"ack irq=%d, isr=0x%x\n", irq, isr);
#endif /* VOYAGER_DEBUG */
}
_raw_spin_unlock(&vic_irq_lock);
......@@ -1731,7 +1683,6 @@ after_handle_vic_irq(unsigned int irq)
* may be intercepted by another CPU if reasserted */
}
/* Linux processor - interrupt affinity manipulations.
*
* For each processor, we maintain a 32 bit irq affinity mask.
......@@ -1748,8 +1699,7 @@ after_handle_vic_irq(unsigned int irq)
* change the mask and then do an interrupt enable CPI to re-enable on
* the selected processors */
void
set_vic_irq_affinity(unsigned int irq, cpumask_t mask)
void set_vic_irq_affinity(unsigned int irq, cpumask_t mask)
{
/* Only extended processors handle interrupts */
unsigned long real_mask;
......@@ -1757,13 +1707,13 @@ set_vic_irq_affinity(unsigned int irq, cpumask_t mask)
int cpu;
real_mask = cpus_addr(mask)[0] & voyager_extended_vic_processors;
if(cpus_addr(mask)[0] == 0)
if (cpus_addr(mask)[0] == 0)
/* can't have no CPUs to accept the interrupt -- extremely
* bad things will happen */
return;
if(irq == 0)
if (irq == 0)
/* can't change the affinity of the timer IRQ. This
* is due to the constraint in the voyager
* architecture that the CPI also comes in on and IRQ
......@@ -1772,7 +1722,7 @@ set_vic_irq_affinity(unsigned int irq, cpumask_t mask)
* will no-longer be able to accept VIC CPIs */
return;
if(irq >= 32)
if (irq >= 32)
/* You can only have 32 interrupts in a voyager system
* (and 32 only if you have a secondary microchannel
* bus) */
......@@ -1780,8 +1730,8 @@ set_vic_irq_affinity(unsigned int irq, cpumask_t mask)
for_each_online_cpu(cpu) {
unsigned long cpu_mask = 1 << cpu;
if(cpu_mask & real_mask) {
if (cpu_mask & real_mask) {
/* enable the interrupt for this cpu */
cpu_irq_affinity[cpu] |= irq_mask;
} else {
......@@ -1800,25 +1750,23 @@ set_vic_irq_affinity(unsigned int irq, cpumask_t mask)
unmask_vic_irq(irq);
}
static void
ack_vic_irq(unsigned int irq)
static void ack_vic_irq(unsigned int irq)
{
if (irq & 8) {
outb(0x62,0x20); /* Specific EOI to cascade */
outb(0x60|(irq & 7),0xA0);
outb(0x62, 0x20); /* Specific EOI to cascade */
outb(0x60 | (irq & 7), 0xA0);
} else {
outb(0x60 | (irq & 7),0x20);
outb(0x60 | (irq & 7), 0x20);
}
}
/* enable the CPIs. In the VIC, the CPIs are delivered by the 8259
* but are not vectored by it. This means that the 8259 mask must be
* lowered to receive them */
static __init void
vic_enable_cpi(void)
static __init void vic_enable_cpi(void)
{
__u8 cpu = smp_processor_id();
/* just take a copy of the current mask (nop for boot cpu) */
vic_irq_mask[cpu] = vic_irq_mask[boot_cpu_id];
......@@ -1827,7 +1775,7 @@ vic_enable_cpi(void)
/* for sys int and cmn int */
enable_local_vic_irq(7);
if(is_cpu_quad()) {
if (is_cpu_quad()) {
outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0);
outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1);
VDEBUG(("VOYAGER SMP: QIC ENABLE CPI: CPU%d: MASK 0x%x\n",
......@@ -1838,8 +1786,7 @@ vic_enable_cpi(void)
cpu, vic_irq_mask[cpu]));
}
void
voyager_smp_dump()
void voyager_smp_dump()
{
int old_cpu = smp_processor_id(), cpu;
......@@ -1865,10 +1812,10 @@ voyager_smp_dump()
cpu, vic_irq_mask[cpu], imr, irr, isr);
#if 0
/* These lines are put in to try to unstick an un ack'd irq */
if(isr != 0) {
if (isr != 0) {
int irq;
for(irq=0; irq<16; irq++) {
if(isr & (1<<irq)) {
for (irq = 0; irq < 16; irq++) {
if (isr & (1 << irq)) {
printk("\tCPU%d: ack irq %d\n",
cpu, irq);
local_irq_save(flags);
......@@ -1884,17 +1831,15 @@ voyager_smp_dump()
}
}
void
smp_voyager_power_off(void *dummy)
void smp_voyager_power_off(void *dummy)
{
if(smp_processor_id() == boot_cpu_id)
if (smp_processor_id() == boot_cpu_id)
voyager_power_off();
else
smp_stop_cpu_function(NULL);
}
static void __init
voyager_smp_prepare_cpus(unsigned int max_cpus)
static void __init voyager_smp_prepare_cpus(unsigned int max_cpus)
{
/* FIXME: ignore max_cpus for now */
smp_boot_cpus();
......@@ -1911,8 +1856,7 @@ static void __cpuinit voyager_smp_prepare_boot_cpu(void)
cpu_set(smp_processor_id(), cpu_present_map);
}
static int __cpuinit
voyager_cpu_up(unsigned int cpu)
static int __cpuinit voyager_cpu_up(unsigned int cpu)
{
/* This only works at boot for x86. See "rewrite" above. */
if (cpu_isset(cpu, smp_commenced_mask))
......@@ -1928,14 +1872,12 @@ voyager_cpu_up(unsigned int cpu)
return 0;
}
static void __init
voyager_smp_cpus_done(unsigned int max_cpus)
static void __init voyager_smp_cpus_done(unsigned int max_cpus)
{
zap_low_mappings();
}
void __init
smp_setup_processor_id(void)
void __init smp_setup_processor_id(void)
{
current_thread_info()->cpu = hard_smp_processor_id();
x86_write_percpu(cpu_number, hard_smp_processor_id());
......
arch/x86/mach-voyager/voyager_thread.c
View file @ a4ec1eff
......@@ -30,12 +30,10 @@
#include <asm/mtrr.h>
#include <asm/msr.h>
struct task_struct *voyager_thread;
static __u8 set_timeout;
static int
execute(const char *string)
static int execute(const char *string)
{
int ret;
......@@ -52,48 +50,48 @@ execute(const char *string)
NULL,
};
if ((ret = call_usermodehelper(argv[0], argv, envp, UMH_WAIT_PROC)) != 0) {
printk(KERN_ERR "Voyager failed to run \"%s\": %i\n",
string, ret);
if ((ret =
call_usermodehelper(argv[0], argv, envp, UMH_WAIT_PROC)) != 0) {
printk(KERN_ERR "Voyager failed to run \"%s\": %i\n", string,
ret);
}
return ret;
}
static void
check_from_kernel(void)
static void check_from_kernel(void)
{
if(voyager_status.switch_off) {
if (voyager_status.switch_off) {
/* FIXME: This should be configurable via proc */
execute("umask 600; echo 0 > /etc/initrunlvl; kill -HUP 1");
} else if(voyager_status.power_fail) {
} else if (voyager_status.power_fail) {
VDEBUG(("Voyager daemon detected AC power failure\n"));
/* FIXME: This should be configureable via proc */
execute("umask 600; echo F > /etc/powerstatus; kill -PWR 1");
set_timeout = 1;
}
}
static void
check_continuing_condition(void)
static void check_continuing_condition(void)
{
if(voyager_status.power_fail) {
if (voyager_status.power_fail) {
__u8 data;
voyager_cat_psi(VOYAGER_PSI_SUBREAD,
voyager_cat_psi(VOYAGER_PSI_SUBREAD,
VOYAGER_PSI_AC_FAIL_REG, &data);
if((data & 0x1f) == 0) {
if ((data & 0x1f) == 0) {
/* all power restored */
printk(KERN_NOTICE "VOYAGER AC power restored, cancelling shutdown\n");
printk(KERN_NOTICE
"VOYAGER AC power restored, cancelling shutdown\n");
/* FIXME: should be user configureable */
execute("umask 600; echo O > /etc/powerstatus; kill -PWR 1");
execute
("umask 600; echo O > /etc/powerstatus; kill -PWR 1");
set_timeout = 0;
}
}
}
static int
thread(void *unused)
static int thread(void *unused)
{
printk(KERN_NOTICE "Voyager starting monitor thread\n");
......@@ -102,7 +100,7 @@ thread(void *unused)
schedule_timeout(set_timeout ? HZ : MAX_SCHEDULE_TIMEOUT);
VDEBUG(("Voyager Daemon awoken\n"));
if(voyager_status.request_from_kernel == 0) {
if (voyager_status.request_from_kernel == 0) {
/* probably awoken from timeout */
check_continuing_condition();
} else {
......@@ -112,20 +110,18 @@ thread(void *unused)
}
}
static int __init
voyager_thread_start(void)
static int __init voyager_thread_start(void)
{
voyager_thread = kthread_run(thread, NULL, "kvoyagerd");
if (IS_ERR(voyager_thread)) {
printk(KERN_ERR "Voyager: Failed to create system monitor thread.\n");
printk(KERN_ERR
"Voyager: Failed to create system monitor thread.\n");
return PTR_ERR(voyager_thread);
}
return 0;
}
static void __exit
voyager_thread_stop(void)
static void __exit voyager_thread_stop(void)
{
kthread_stop(voyager_thread);
}
......
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