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Commit a7ed0dc0 authored by James Bottomley's avatar James Bottomley
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ncr53c8xx updates 

From: Matthew Wilcox <willy@debian.org>

- remove all of the PCI chips (8xx series) leaving only 720
- pull out stand alone initialisation code (driver becomes a chip only
  driver for NCR Q720 and Zalon)
- remove most vestiges of PCI support (chip driver should be bus neutral)
- tidy up typedefs
- remove simulated intfly (may need putting back for 770)
Signed-off-by: default avatarJames Bottomley <James.Bottomley@SteelEye.com>
parent 66aed46f
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Showing with 711 additions and 2189 deletions
drivers/scsi/Makefile
View file @ a7ed0dc0
......@@ -148,13 +148,8 @@ sr_mod-objs := sr.o sr_ioctl.o sr_vendor.o
initio-objs := ini9100u.o i91uscsi.o
a100u2w-objs := inia100.o i60uscsi.o
ncr53c8xx-flags-$(CONFIG_SCSI_ZALON) \
:= -DCONFIG_NCR53C8XX_PREFETCH \
-DCONFIG_SCSI_NCR53C8XX_NO_WORD_TRANSFERS \
-DCONFIG_SCSI_NCR53C8XX_NO_NVRAM \
-DSCSI_NCR_BIG_ENDIAN -DSIMULATED_INTFLY
ncr53c8xx-flags-$(CONFIG_SCSI_NCR_Q720) \
:= -DCONFIG_SCSI_NCR53C8XX_NO_NVRAM \
-DSIMULATED_INTFLY
:= -DCONFIG_NCR53C8XX_PREFETCH -DSCSI_NCR_BIG_ENDIAN \
-DCONFIG_SCSI_NCR53C8XX_NO_WORD_TRANSFERS
CFLAGS_ncr53c8xx.o := $(ncr53c8xx-flags-y) $(ncr53c8xx-flags-m)
zalon7xx-objs := zalon.o ncr53c8xx.o
NCR_Q720_mod-objs := NCR_Q720.o ncr53c8xx.o
......
drivers/scsi/NCR_Q720.c
View file @ a7ed0dc0
......@@ -22,10 +22,8 @@
#include "NCR_Q720.h"
static ncr_chip q720_chip __initdata = {
.device_id = PSEUDO_720_ID,
static struct ncr_chip q720_chip __initdata = {
.revision_id = 0x0f,
.name = "720",
.burst_max = 3,
.offset_max = 8,
.nr_divisor = 4,
......@@ -50,7 +48,7 @@ struct NCR_Q720_private {
struct Scsi_Host *hosts[4];
};
Scsi_Host_Template NCR_Q720_tpnt = {
struct scsi_host_template NCR_Q720_tpnt = {
.module = THIS_MODULE,
.proc_name = "NCR_Q720",
};
......
drivers/scsi/ncr53c8xx.c
View file @ a7ed0dc0
......@@ -83,17 +83,6 @@
**
** Supported NCR/SYMBIOS chips:
** 53C720 (Wide, Fast SCSI-2, intfly problems)
** 53C810 (8 bits, Fast SCSI-2, no rom BIOS)
** 53C815 (8 bits, Fast SCSI-2, on board rom BIOS)
** 53C820 (Wide, Fast SCSI-2, no rom BIOS)
** 53C825 (Wide, Fast SCSI-2, on board rom BIOS)
** 53C860 (8 bits, Fast 20, no rom BIOS)
** 53C875 (Wide, Fast 20, on board rom BIOS)
** 53C895 (Wide, Fast 40, on board rom BIOS)
** 53C895A (Wide, Fast 40, on board rom BIOS)
** 53C896 (Wide, Fast 40, on board rom BIOS)
** 53C897 (Wide, Fast 40, on board rom BIOS)
** 53C1510D (Wide, Fast 40, on board rom BIOS)
**
** Other features:
** Memory mapped IO (linux-1.3.X and above only)
......@@ -101,10 +90,8 @@
** Shared IRQ (since linux-1.3.72)
*/
/*
** Name and version of the driver
*/
#define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3b-20010512"
/* Name and version of the driver */
#define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3e"
#define SCSI_NCR_DEBUG_FLAGS (0)
......@@ -157,11 +144,6 @@
#include "sym53c8xx_comm.h"
int ncr53c8xx_slave_configure(Scsi_Device *device);
int ncr53c8xx_bus_reset(Scsi_Cmnd *cmd);
int ncr53c8xx_queue_command (Scsi_Cmnd *cmd, void (* done)(Scsi_Cmnd *));
const char *ncr53c8xx_info (struct Scsi_Host *host);
/*==========================================================
**
......@@ -341,11 +323,6 @@ static int ncr53c8xx_proc_info(struct Scsi_Host *host, char *buffer, char **star
#define initverbose (driver_setup.verbose)
#define bootverbose (np->verbose)
#ifdef SCSI_NCR_NVRAM_SUPPORT
static u_char Tekram_sync[16] __initdata =
{25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
#endif /* SCSI_NCR_NVRAM_SUPPORT */
/*==========================================================
**
** Command control block states.
......@@ -483,11 +460,6 @@ struct ccb;
struct ncb;
struct script;
typedef struct ncb * ncb_p;
typedef struct tcb * tcb_p;
typedef struct lcb * lcb_p;
typedef struct ccb * ccb_p;
struct link {
ncrcmd l_cmd;
ncrcmd l_paddr;
......@@ -558,7 +530,7 @@ struct tcb {
**----------------------------------------------------------------
*/
struct link jump_lcb[4]; /* JUMPs for reselection */
lcb_p lp[MAX_LUN]; /* The lcb's of this tcb */
struct lcb * lp[MAX_LUN]; /* The lcb's of this tcb */
u_char inq_done; /* Target capabilities received */
u_char inq_byte7; /* Contains these capabilities */
......@@ -568,7 +540,7 @@ struct tcb {
** when tagged command queuing is enabled.
**----------------------------------------------------------------
*/
ccb_p nego_cp;
struct ccb * nego_cp;
/*----------------------------------------------------------------
** statistical data
......@@ -582,7 +554,7 @@ struct tcb {
**----------------------------------------------------------------
*/
#ifdef SCSI_NCR_BIG_ENDIAN
/*0*/ u_short period;
/*0*/ u16 period;
/*2*/ u_char sval;
/*3*/ u_char minsync;
/*0*/ u_char wval;
......@@ -592,7 +564,7 @@ struct tcb {
#else
/*0*/ u_char minsync;
/*1*/ u_char sval;
/*2*/ u_short period;
/*2*/ u16 period;
/*0*/ u_char maxoffs;
/*1*/ u_char quirks;
/*2*/ u_char widedone;
......@@ -606,11 +578,7 @@ struct tcb {
u_char ic_done;
#endif
/*----------------------------------------------------------------
** User settable limits and options.
** These limits are read from the NVRAM if present.
**----------------------------------------------------------------
*/
/* User settable limits and options. */
u_char usrsync;
u_char usrwide;
u_char usrtags;
......@@ -691,11 +659,11 @@ struct lcb {
** QUEUE FULL and ORDERED tag control.
**----------------------------------------------------------------
*/
u_short num_good; /* Nr of GOOD since QUEUE FULL */
u16 num_good; /* Nr of GOOD since QUEUE FULL */
tagmap_t tags_umap; /* Used tags bitmap */
tagmap_t tags_smap; /* Tags in use at 'tag_stime' */
u_long tags_stime; /* Last time we set smap=umap */
ccb_p held_ccb; /* CCB held for QUEUE FULL */
struct ccb * held_ccb; /* CCB held for QUEUE FULL */
};
/*========================================================================
......@@ -761,7 +729,7 @@ struct head {
** The virtual address of the ccb containing this header.
**----------------------------------------------------------------
*/
ccb_p cp;
struct ccb * cp;
/*----------------------------------------------------------------
** Status fields.
......@@ -921,7 +889,7 @@ struct ccb {
** pointer to a control block.
**----------------------------------------------------------------
*/
Scsi_Cmnd *cmd; /* SCSI command */
struct scsi_cmnd *cmd; /* SCSI command */
u_char cdb_buf[16]; /* Copy of CDB */
u_char sense_buf[64];
int data_len; /* Total data length */
......@@ -951,7 +919,7 @@ struct ccb {
u_char lun;
u_char queued;
u_char auto_sense;
ccb_p link_ccb; /* Host adapter CCB chain */
struct ccb * link_ccb; /* Host adapter CCB chain */
XPT_QUEHEAD link_ccbq; /* Link to unit CCB queue */
u32 startp; /* Initial data pointer */
u_long magic; /* Free / busy CCB flag */
......@@ -980,9 +948,9 @@ struct ncb {
** CCBs management queues.
**----------------------------------------------------------------
*/
Scsi_Cmnd *waiting_list; /* Commands waiting for a CCB */
struct scsi_cmnd *waiting_list; /* Commands waiting for a CCB */
/* when lcb is not allocated. */
Scsi_Cmnd *done_list; /* Commands waiting for done() */
struct scsi_cmnd *done_list; /* Commands waiting for done() */
/* callback to be invoked. */
spinlock_t smp_lock; /* Lock for SMP threading */
......@@ -991,7 +959,6 @@ struct ncb {
**----------------------------------------------------------------
*/
int unit; /* Unit number */
char chip_name[8]; /* Chip name */
char inst_name[16]; /* ncb instance name */
/*----------------------------------------------------------------
......@@ -1053,13 +1020,9 @@ struct ncb {
**----------------------------------------------------------------
*/
struct device *dev;
u_short device_id; /* PCI device id */
u_char revision_id; /* PCI device revision id */
u_char bus; /* PCI BUS number */
u_char device_fn; /* PCI BUS device and function */
u_long base_io; /* IO space base address */
u_int irq; /* IRQ level */
u_int features; /* Chip features map */
u32 irq; /* IRQ level */
u32 features; /* Chip features map */
u_char myaddr; /* SCSI id of the adapter */
u_char maxburst; /* log base 2 of dwords burst */
u_char maxwide; /* Maximum transfer width */
......@@ -1076,10 +1039,10 @@ struct ncb {
** SCRIPTS processor in order to start SCSI commands.
**----------------------------------------------------------------
*/
u_short squeueput; /* Next free slot of the queue */
u_short actccbs; /* Number of allocated CCBs */
u_short queuedccbs; /* Number of CCBs in start queue*/
u_short queuedepth; /* Start queue depth */
u16 squeueput; /* Next free slot of the queue */
u16 actccbs; /* Number of allocated CCBs */
u16 queuedccbs; /* Number of CCBs in start queue*/
u16 queuedepth; /* Start queue depth */
/*----------------------------------------------------------------
** Timeout handler.
......@@ -1304,65 +1267,59 @@ struct scripth {
**==========================================================
*/
static void ncr_alloc_ccb (ncb_p np, u_char tn, u_char ln);
static void ncr_complete (ncb_p np, ccb_p cp);
static void ncr_exception (ncb_p np);
static void ncr_free_ccb (ncb_p np, ccb_p cp);
static void ncr_init_ccb (ncb_p np, ccb_p cp);
static void ncr_init_tcb (ncb_p np, u_char tn);
static lcb_p ncr_alloc_lcb (ncb_p np, u_char tn, u_char ln);
static lcb_p ncr_setup_lcb (ncb_p np, u_char tn, u_char ln,
static void ncr_alloc_ccb (struct ncb *np, u_char tn, u_char ln);
static void ncr_complete (struct ncb *np, struct ccb *cp);
static void ncr_exception (struct ncb *np);
static void ncr_free_ccb (struct ncb *np, struct ccb *cp);
static void ncr_init_ccb (struct ncb *np, struct ccb *cp);
static void ncr_init_tcb (struct ncb *np, u_char tn);
static struct lcb * ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln);
static struct lcb * ncr_setup_lcb (struct ncb *np, u_char tn, u_char ln,
u_char *inq_data);
static void ncr_getclock (ncb_p np, int mult);
static void ncr_selectclock (ncb_p np, u_char scntl3);
static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln);
static void ncr_chip_reset (ncb_p np, int delay);
static void ncr_init (ncb_p np, int reset, char * msg, u_long code);
static int ncr_int_sbmc (ncb_p np);
static int ncr_int_par (ncb_p np);
static void ncr_int_ma (ncb_p np);
static void ncr_int_sir (ncb_p np);
static void ncr_int_sto (ncb_p np);
static void ncr_getclock (struct ncb *np, int mult);
static void ncr_selectclock (struct ncb *np, u_char scntl3);
static struct ccb *ncr_get_ccb (struct ncb *np, u_char tn, u_char ln);
static void ncr_chip_reset (struct ncb *np, int delay);
static void ncr_init (struct ncb *np, int reset, char * msg, u_long code);
static int ncr_int_sbmc (struct ncb *np);
static int ncr_int_par (struct ncb *np);
static void ncr_int_ma (struct ncb *np);
static void ncr_int_sir (struct ncb *np);
static void ncr_int_sto (struct ncb *np);
static u_long ncr_lookup (char* id);
static void ncr_negotiate (struct ncb* np, struct tcb* tp);
static int ncr_prepare_nego(ncb_p np, ccb_p cp, u_char *msgptr);
static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr);
#ifdef SCSI_NCR_INTEGRITY_CHECKING
static int ncr_ic_nego(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd, u_char *msgptr);
static int ncr_ic_nego(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd, u_char *msgptr);
#endif
static void ncr_script_copy_and_bind
(ncb_p np, ncrcmd *src, ncrcmd *dst, int len);
(struct ncb *np, ncrcmd *src, ncrcmd *dst, int len);
static void ncr_script_fill (struct script * scr, struct scripth * scripth);
static int ncr_scatter (ncb_p np, ccb_p cp, Scsi_Cmnd *cmd);
static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p);
static void ncr_setsync (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer);
static void ncr_setup_tags (ncb_p np, u_char tn, u_char ln);
static void ncr_setwide (ncb_p np, ccb_p cp, u_char wide, u_char ack);
static int ncr_scatter (struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd);
static void ncr_getsync (struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p);
static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer);
static void ncr_setup_tags (struct ncb *np, u_char tn, u_char ln);
static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack);
static int ncr_show_msg (u_char * msg);
static void ncr_print_msg (ccb_p cp, char *label, u_char *msg);
static int ncr_snooptest (ncb_p np);
static void ncr_timeout (ncb_p np);
static void ncr_wakeup (ncb_p np, u_long code);
static void ncr_wakeup_done (ncb_p np);
static void ncr_start_next_ccb (ncb_p np, lcb_p lp, int maxn);
static void ncr_put_start_queue(ncb_p np, ccb_p cp);
static void ncr_start_reset (ncb_p np);
static int ncr_reset_scsi_bus (ncb_p np, int enab_int, int settle_delay);
#ifdef SCSI_NCR_USER_COMMAND_SUPPORT
static void ncr_usercmd (ncb_p np);
#endif
static void insert_into_waiting_list(ncb_p np, Scsi_Cmnd *cmd);
static Scsi_Cmnd *retrieve_from_waiting_list(int to_remove, ncb_p np, Scsi_Cmnd *cmd);
static void process_waiting_list(ncb_p np, int sts);
static void ncr_print_msg (struct ccb *cp, char *label, u_char *msg);
static int ncr_snooptest (struct ncb *np);
static void ncr_timeout (struct ncb *np);
static void ncr_wakeup (struct ncb *np, u_long code);
static void ncr_wakeup_done (struct ncb *np);
static void ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn);
static void ncr_put_start_queue(struct ncb *np, struct ccb *cp);
static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd);
static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd);
static void process_waiting_list(struct ncb *np, int sts);
#define remove_from_waiting_list(np, cmd) \
retrieve_from_waiting_list(1, (np), (cmd))
#define requeue_waiting_list(np) process_waiting_list((np), DID_OK)
#define reset_waiting_list(np) process_waiting_list((np), DID_RESET)
static inline char *ncr_name (ncb_p np)
static inline char *ncr_name (struct ncb *np)
{
return np->inst_name;
}
......@@ -1851,13 +1808,8 @@ static struct script script0 __initdata = {
/*
** ... signal completion to the host
*/
#ifdef SIMULATED_INTFLY
SCR_INT,
SIR_INTFLY,
#else
SCR_INT_FLY,
0,
#endif
/*
** Auf zu neuen Schandtaten!
*/
......@@ -1876,13 +1828,8 @@ static struct script script0 __initdata = {
SCR_INT,
SIR_DONE_OVERFLOW,
}/*------------------------< DONE_END >---------------------*/,{
#ifdef SIMULATED_INTFLY
SCR_INT,
SIR_INTFLY,
#else
SCR_INT_FLY,
0,
#endif
SCR_COPY (4),
RADDR (temp),
PADDR (done_pos),
......@@ -2226,7 +2173,7 @@ static struct scripth scripth0 __initdata = {
**-----------------------------------------------------------
**
** ##===========< I=0; i<MAX_DONE >===========
** || SCR_COPY (sizeof(ccb_p)),
** || SCR_COPY (sizeof(struct ccb *),
** || NADDR (header.cp),
** || NADDR (ccb_done[i]),
** || SCR_CALL,
......@@ -2885,7 +2832,7 @@ void __init ncr_script_fill (struct script * scr, struct scripth * scrh)
p = scrh->done_queue;
for (i = 0; i<MAX_DONE; i++) {
*p++ =SCR_COPY (sizeof(ccb_p));
*p++ =SCR_COPY (sizeof(struct ccb *));
*p++ =NADDR (header.cp);
*p++ =NADDR (ccb_done[i]);
*p++ =SCR_CALL;
......@@ -2944,7 +2891,7 @@ void __init ncr_script_fill (struct script * scr, struct scripth * scrh)
*/
static void __init
ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len)
ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len)
{
ncrcmd opcode, new, old, tmp1, tmp2;
ncrcmd *start, *end;
......@@ -3115,17 +3062,17 @@ struct host_data {
** target, lun concerned by a kernel message.
*/
static void PRINT_TARGET(ncb_p np, int target)
static void PRINT_TARGET(struct ncb *np, int target)
{
printk(KERN_INFO "%s-<%d,*>: ", ncr_name(np), target);
}
static void PRINT_LUN(ncb_p np, int target, int lun)
static void PRINT_LUN(struct ncb *np, int target, int lun)
{
printk(KERN_INFO "%s-<%d,%d>: ", ncr_name(np), target, lun);
}
static void PRINT_ADDR(Scsi_Cmnd *cmd)
static void PRINT_ADDR(struct scsi_cmnd *cmd)
{
struct host_data *host_data = (struct host_data *) cmd->device->host->hostdata;
PRINT_LUN(host_data->ncb, cmd->device->id, cmd->device->lun);
......@@ -3164,90 +3111,31 @@ static u_long div_10M[] =
#define burst_length(bc) (!(bc))? 0 : 1 << (bc)
/*
* Burst code from io register bits. Burst enable is ctest0 for c720,
* ctest4 for others.
* Burst code from io register bits. Burst enable is ctest0 for c720
*/
#define burst_code(dmode, ctest0, ctest4, ctest5) \
(np->device_id == PSEUDO_720_ID) ? \
(ctest0) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + 1 : \
(ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
#define burst_code(dmode, ctest0) \
(ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1
/*
* Set initial io register bits from burst code.
*/
static inline void ncr_init_burst(ncb_p np, u_char bc)
static inline void ncr_init_burst(struct ncb *np, u_char bc)
{
u_char *be = (np->device_id == PSEUDO_720_ID) ?
&np->rv_ctest0 : &np->rv_ctest4;
u_char *be = &np->rv_ctest0;
*be &= ~0x80;
np->rv_dmode &= ~(0x3 << 6);
np->rv_ctest5 &= ~0x4;
if (!bc) {
*be |= 0x80;
}
else {
} else {
--bc;
np->rv_dmode |= ((bc & 0x3) << 6);
np->rv_ctest5 |= (bc & 0x4);
}
}
#ifdef SCSI_NCR_NVRAM_SUPPORT
/*
** Get target set-up from Symbios format NVRAM.
*/
static void __init
ncr_Symbios_setup_target(ncb_p np, int target, Symbios_nvram *nvram)
{
tcb_p tp = &np->target[target];
Symbios_target *tn = &nvram->target[target];
tp->usrsync = tn->sync_period ? (tn->sync_period + 3) / 4 : 255;
tp->usrwide = tn->bus_width == 0x10 ? 1 : 0;
tp->usrtags =
(tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? MAX_TAGS : 0;
if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
tp->usrflag |= UF_NODISC;
if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
tp->usrflag |= UF_NOSCAN;
}
/*
** Get target set-up from Tekram format NVRAM.
*/
static void __init
ncr_Tekram_setup_target(ncb_p np, int target, Tekram_nvram *nvram)
{
tcb_p tp = &np->target[target];
struct Tekram_target *tn = &nvram->target[target];
int i;
if (tn->flags & TEKRAM_SYNC_NEGO) {
i = tn->sync_index & 0xf;
tp->usrsync = Tekram_sync[i];
}
tp->usrwide = (tn->flags & TEKRAM_WIDE_NEGO) ? 1 : 0;
if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
tp->usrtags = 2 << nvram->max_tags_index;
}
if (!(tn->flags & TEKRAM_DISCONNECT_ENABLE))
tp->usrflag = UF_NODISC;
/* If any device does not support parity, we will not use this option */
if (!(tn->flags & TEKRAM_PARITY_CHECK))
np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
}
#endif /* SCSI_NCR_NVRAM_SUPPORT */
static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
static void __init ncr_prepare_setting(struct ncb *np)
{
u_char burst_max;
u_long period;
......@@ -3278,9 +3166,7 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
/*
* Guess the frequency of the chip's clock.
*/
if (np->features & (FE_ULTRA3 | FE_ULTRA2))
np->clock_khz = 160000;
else if (np->features & FE_ULTRA)
if (np->features & FE_ULTRA)
np->clock_khz = 80000;
else
np->clock_khz = 40000;
......@@ -3329,10 +3215,8 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
* Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
*/
if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2)))
if (np->minsync < 25 && !(np->features & FE_ULTRA))
np->minsync = 25;
else if (np->minsync < 12 && !(np->features & FE_ULTRA2))
np->minsync = 12;
/*
* Maximum synchronous period factor supported by the chip.
......@@ -3352,7 +3236,7 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
np->rv_ctest3 = np->sv_ctest3;
np->rv_ctest4 = np->sv_ctest4;
np->rv_ctest5 = np->sv_ctest5;
burst_max = burst_code(np->sv_dmode, np->sv_ctest0, np->sv_ctest4, np->sv_ctest5);
burst_max = burst_code(np->sv_dmode, np->sv_ctest0);
#else
/*
......@@ -3360,7 +3244,7 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
*/
burst_max = driver_setup.burst_max;
if (burst_max == 255)
burst_max = burst_code(np->sv_dmode, np->sv_ctest0, np->sv_ctest4, np->sv_ctest5);
burst_max = burst_code(np->sv_dmode, np->sv_ctest0);
if (burst_max > 7)
burst_max = 7;
if (burst_max > np->maxburst)
......@@ -3398,25 +3282,6 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
if (driver_setup.scsi_parity)
np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
#ifdef SCSI_NCR_NVRAM_SUPPORT
/*
** Get parity checking, host ID and verbose mode from NVRAM
**/
if (nvram) {
switch(nvram->type) {
case SCSI_NCR_TEKRAM_NVRAM:
np->myaddr = nvram->data.Tekram.host_id & 0x0f;
break;
case SCSI_NCR_SYMBIOS_NVRAM:
if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
np->rv_scntl0 &= ~0x0a;
np->myaddr = nvram->data.Symbios.host_id & 0x0f;
if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
np->verbose += 1;
break;
}
}
#endif
/*
** Get SCSI addr of host adapter (set by bios?).
*/
......@@ -3443,9 +3308,7 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
** since a 100% safe algorithm is not possible.
*/
np->scsi_mode = SMODE_SE;
if (np->features & FE_ULTRA2)
np->scsi_mode = (np->sv_stest4 & SMODE);
else if (np->features & FE_DIFF) {
if (np->features & FE_DIFF) {
switch(driver_setup.diff_support) {
case 4: /* Trust previous settings if present, then GPIO3 */
if (np->sv_scntl3) {
......@@ -3454,8 +3317,6 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
break;
}
case 3: /* SYMBIOS controllers report HVD through GPIO3 */
if (nvram && nvram->type != SCSI_NCR_SYMBIOS_NVRAM)
break;
if (INB(nc_gpreg) & 0x08)
break;
case 2: /* Set HVD unconditionally */
......@@ -3478,8 +3339,7 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
** that drive the LED directly.
** Also probe initial setting of GPIO0 as output.
*/
if ((driver_setup.led_pin ||
(nvram && nvram->type == SCSI_NCR_SYMBIOS_NVRAM)) &&
if ((driver_setup.led_pin) &&
!(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
np->features |= FE_LED0;
......@@ -3499,51 +3359,24 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
/*
** Configure targets according to driver setup.
** If NVRAM present get targets setup from NVRAM.
** Allow to override sync, wide and NOSCAN from
** boot command line.
*/
for (i = 0 ; i < MAX_TARGET ; i++) {
tcb_p tp = &np->target[i];
struct tcb *tp = &np->target[i];
tp->usrsync = 255;
#ifdef SCSI_NCR_NVRAM_SUPPORT
if (nvram) {
switch(nvram->type) {
case SCSI_NCR_TEKRAM_NVRAM:
ncr_Tekram_setup_target(np, i, &nvram->data.Tekram);
break;
case SCSI_NCR_SYMBIOS_NVRAM:
ncr_Symbios_setup_target(np, i, &nvram->data.Symbios);
break;
}
if (driver_setup.use_nvram & 0x2)
tp->usrsync = driver_setup.default_sync;
if (driver_setup.use_nvram & 0x4)
tp->usrwide = driver_setup.max_wide;
if (driver_setup.use_nvram & 0x8)
tp->usrflag &= ~UF_NOSCAN;
}
else {
#else
if (1) {
#endif
tp->usrsync = driver_setup.default_sync;
tp->usrwide = driver_setup.max_wide;
tp->usrtags = MAX_TAGS;
if (!driver_setup.disconnection)
np->target[i].usrflag = UF_NODISC;
}
}
/*
** Announce all that stuff to user.
*/
i = nvram ? nvram->type : 0;
printk(KERN_INFO "%s: %sID %d, Fast-%d%s%s\n", ncr_name(np),
i == SCSI_NCR_SYMBIOS_NVRAM ? "Symbios format NVRAM, " :
(i == SCSI_NCR_TEKRAM_NVRAM ? "Tekram format NVRAM, " : ""),
printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n", ncr_name(np),
np->myaddr,
np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10),
(np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity",
......@@ -3564,354 +3397,8 @@ static int __init ncr_prepare_setting(ncb_p np, ncr_nvram *nvram)
if (bootverbose && np->paddr2)
printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n",
ncr_name(np), np->paddr2);
return 0;
}
/*
** Host attach and initialisations.
**
** Allocate host data and ncb structure.
** Request IO region and remap MMIO region.
** Do chip initialization.
** If all is OK, install interrupt handling and
** start the timer daemon.
*/
struct Scsi_Host * __init
ncr_attach (Scsi_Host_Template *tpnt, int unit, struct ncr_device *device)
{
struct host_data *host_data;
ncb_p np = 0;
struct Scsi_Host *instance = 0;
u_long flags = 0;
ncr_nvram *nvram = device->nvram;
int i;
#ifdef SCSI_NCR_PROC_INFO_SUPPORT
tpnt->proc_info = ncr53c8xx_proc_info,
#endif
tpnt->info = ncr53c8xx_info;
tpnt->queuecommand = ncr53c8xx_queue_command;
tpnt->slave_configure = ncr53c8xx_slave_configure;
tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset;
tpnt->can_queue = SCSI_NCR_CAN_QUEUE;
tpnt->this_id = 7;
tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE;
tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN;
tpnt->use_clustering = DISABLE_CLUSTERING;
if(device->differential)
driver_setup.diff_support = device->differential;
printk(KERN_INFO "ncr53c%s-%d: rev 0x%x on bus %d device %d function %d irq %d\n",
device->chip.name, unit, device->chip.revision_id,
device->slot.bus, (device->slot.device_fn & 0xf8) >> 3,
device->slot.device_fn & 7,
device->slot.irq);
/*
** Allocate host_data structure
*/
if (!(instance = scsi_host_alloc(tpnt, sizeof(*host_data))))
goto attach_error;
host_data = (struct host_data *) instance->hostdata;
/*
** Allocate the host control block.
*/
np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB");
if (!np)
goto attach_error;
NCR_INIT_LOCK_NCB(np);
np->dev = device->dev;
np->p_ncb = vtobus(np);
host_data->ncb = np;
/*
** Allocate the default CCB.
*/
np->ccb = (ccb_p) m_calloc_dma(sizeof(struct ccb), "CCB");
if (!np->ccb)
goto attach_error;
/*
** Store input informations in the host data structure.
*/
strlcpy(np->chip_name, device->chip.name, sizeof(np->chip_name));
np->unit = unit;
np->verbose = driver_setup.verbose;
sprintf(np->inst_name, "ncr53c%s-%d", np->chip_name, np->unit);
np->device_id = device->chip.device_id;
np->revision_id = device->chip.revision_id;
np->bus = device->slot.bus;
np->device_fn = device->slot.device_fn;
np->features = device->chip.features;
np->clock_divn = device->chip.nr_divisor;
np->maxoffs = device->chip.offset_max;
np->maxburst = device->chip.burst_max;
np->myaddr = device->host_id;
/*
** Allocate SCRIPTS areas.
*/
np->script0 = (struct script *)
m_calloc_dma(sizeof(struct script), "SCRIPT");
if (!np->script0)
goto attach_error;
np->scripth0 = (struct scripth *)
m_calloc_dma(sizeof(struct scripth), "SCRIPTH");
if (!np->scripth0)
goto attach_error;
/*
** Initialize timer structure
**
*/
init_timer(&np->timer);
np->timer.data = (unsigned long) np;
np->timer.function = ncr53c8xx_timeout;
/*
** Try to map the controller chip to
** virtual and physical memory.
*/
np->paddr = device->slot.base;
np->paddr2 = (np->features & FE_RAM)? device->slot.base_2 : 0;
#ifndef SCSI_NCR_IOMAPPED
if(device->slot.base_v)
np->vaddr = device->slot.base_v;
else
np->vaddr = (unsigned long)ioremap(device->slot.base_c, 128);
if (!np->vaddr) {
printk(KERN_ERR
"%s: can't map memory mapped IO region\n",ncr_name(np));
goto attach_error;
}
else
if (bootverbose > 1)
printk(KERN_INFO
"%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr);
/*
** Make the controller's registers available.
** Now the INB INW INL OUTB OUTW OUTL macros
** can be used safely.
*/
np->reg = (struct ncr_reg*) np->vaddr;
#else
/*
** Try to map the controller chip into iospace.
*/
np->base_io = device->slot.io_port;
#endif /* !defined SCSI_NCR_IOMAPPED */
#ifdef SCSI_NCR_NVRAM_SUPPORT
if (nvram) {
switch(nvram->type) {
case SCSI_NCR_SYMBIOS_NVRAM:
#ifdef SCSI_NCR_DEBUG_NVRAM
ncr_display_Symbios_nvram(&nvram->data.Symbios);
#endif
break;
case SCSI_NCR_TEKRAM_NVRAM:
#ifdef SCSI_NCR_DEBUG_NVRAM
ncr_display_Tekram_nvram(&nvram->data.Tekram);
#endif
break;
default:
nvram = 0;
#ifdef SCSI_NCR_DEBUG_NVRAM
printk(KERN_DEBUG "%s: NVRAM: None or invalid data.\n", ncr_name(np));
#endif
}
}
#endif
/*
** Do chip dependent initialization.
*/
(void)ncr_prepare_setting(np, nvram);
if (np->paddr2 && sizeof(struct script) > 4096) {
np->paddr2 = 0;
printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n",
ncr_name(np));
}
/*
** Fill Linux host instance structure
*/
instance->max_channel = 0;
instance->this_id = np->myaddr;
instance->max_id = np->maxwide ? 16 : 8;
instance->max_lun = SCSI_NCR_MAX_LUN;
#ifndef SCSI_NCR_IOMAPPED
instance->base = (unsigned long) np->reg;
#endif
instance->irq = device->slot.irq;
instance->unique_id = device->slot.io_port;
instance->io_port = device->slot.io_port;
instance->n_io_port = 128;
instance->dma_channel = 0;
instance->cmd_per_lun = MAX_TAGS;
instance->can_queue = (MAX_START-4);
scsi_set_device(instance, device->dev);
#ifdef SCSI_NCR_INTEGRITY_CHECKING
np->check_integrity = 0;
instance->check_integrity = 0;
#ifdef SCSI_NCR_ENABLE_INTEGRITY_CHECK
if ( !(driver_setup.bus_check & 0x04) ) {
np->check_integrity = 1;
instance->check_integrity = 1;
}
#endif
#endif
/*
** Patch script to physical addresses
*/
ncr_script_fill (&script0, &scripth0);
np->scripth = np->scripth0;
np->p_scripth = vtobus(np->scripth);
np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0);
ncr_script_copy_and_bind (np, (ncrcmd *) &script0, (ncrcmd *) np->script0, sizeof(struct script));
ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0, (ncrcmd *) np->scripth0, sizeof(struct scripth));
np->ccb->p_ccb = vtobus (np->ccb);
/*
** Patch the script for LED support.
*/
if (np->features & FE_LED0) {
np->script0->idle[0] =
cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01));
np->script0->reselected[0] =
cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
np->script0->start[0] =
cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
}
/*
** Look for the target control block of this nexus.
** For i = 0 to 3
** JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
*/
for (i = 0 ; i < 4 ; i++) {
np->jump_tcb[i].l_cmd =
cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
np->jump_tcb[i].l_paddr =
cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target));
}
/*
** Reset chip.
*/
ncr_chip_reset(np, 100);
/*
** Now check the cache handling of the chipset.
*/
if (ncr_snooptest (np)) {
printk (KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n");
goto attach_error;
};
/*
** Install the interrupt handler.
*/
np->irq = device->slot.irq;
/*
** Initialize the fixed part of the default ccb.
*/
ncr_init_ccb(np, np->ccb);
/*
** After SCSI devices have been opened, we cannot
** reset the bus safely, so we do it here.
** Interrupt handler does the real work.
** Process the reset exception,
** if interrupts are not enabled yet.
** Then enable disconnects.
*/
NCR_LOCK_NCB(np, flags);
if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) {
printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np));
NCR_UNLOCK_NCB(np, flags);
goto attach_error;
}
ncr_exception (np);
np->disc = 1;
/*
** The middle-level SCSI driver does not
** wait for devices to settle.
** Wait synchronously if more than 2 seconds.
*/
if (driver_setup.settle_delay > 2) {
printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n",
ncr_name(np), driver_setup.settle_delay);
MDELAY (1000 * driver_setup.settle_delay);
}
/*
** Now let the generic SCSI driver
** look for the SCSI devices on the bus ..
*/
/*
** start the timeout daemon
*/
np->lasttime=0;
ncr_timeout (np);
/*
** use SIMPLE TAG messages by default
*/
#ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
np->order = M_SIMPLE_TAG;
#endif
NCR_UNLOCK_NCB(np, flags);
return instance;
attach_error:
if (!instance) return NULL;
printk(KERN_INFO "%s: detaching...\n", ncr_name(np));
if (!np)
goto unregister;
if (np->scripth0)
m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
if (np->script0)
m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
if (np->ccb)
m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
m_free_dma(np, sizeof(struct ncb), "NCB");
unregister:
scsi_host_put(instance);
return NULL;
}
/*==========================================================
**
**
......@@ -3931,20 +3418,20 @@ ncr_attach (Scsi_Host_Template *tpnt, int unit, struct ncr_device *device)
**
**==========================================================
*/
static inline void ncr_queue_done_cmd(ncb_p np, Scsi_Cmnd *cmd)
static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd)
{
unmap_scsi_data(np, cmd);
cmd->host_scribble = (char *) np->done_list;
np->done_list = cmd;
}
static inline void ncr_flush_done_cmds(Scsi_Cmnd *lcmd)
static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd)
{
Scsi_Cmnd *cmd;
struct scsi_cmnd *cmd;
while (lcmd) {
cmd = lcmd;
lcmd = (Scsi_Cmnd *) cmd->host_scribble;
lcmd = (struct scsi_cmnd *) cmd->host_scribble;
cmd->scsi_done(cmd);
}
}
......@@ -3964,9 +3451,9 @@ static inline void ncr_flush_done_cmds(Scsi_Cmnd *lcmd)
*/
#ifdef SCSI_NCR_INTEGRITY_CHECKING
static int ncr_ic_nego(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd, u_char *msgptr)
static int ncr_ic_nego(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd, u_char *msgptr)
{
tcb_p tp = &np->target[cp->target];
struct tcb *tp = &np->target[cp->target];
int msglen = 0;
int nego = 0;
u_char no_increase;
......@@ -4139,9 +3626,9 @@ static int ncr_ic_nego(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd, u_char *msgptr)
*/
static int ncr_prepare_nego(ncb_p np, ccb_p cp, u_char *msgptr)
static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr)
{
tcb_p tp = &np->target[cp->target];
struct tcb *tp = &np->target[cp->target];
int msglen = 0;
int nego = 0;
......@@ -4223,16 +3710,16 @@ static int ncr_prepare_nego(ncb_p np, ccb_p cp, u_char *msgptr)
**
**==========================================================
*/
static int ncr_queue_command (ncb_p np, Scsi_Cmnd *cmd)
static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd)
{
/* Scsi_Device *device = cmd->device; */
tcb_p tp = &np->target[cmd->device->id];
lcb_p lp = tp->lp[cmd->device->lun];
ccb_p cp;
/* struct scsi_device *device = cmd->device; */
struct tcb *tp = &np->target[cmd->device->id];
struct lcb *lp = tp->lp[cmd->device->lun];
struct ccb *cp;
int segments;
u_char idmsg, *msgptr;
u_int msglen;
u32 msglen;
int direction;
u32 lastp, goalp;
......@@ -4432,15 +3919,15 @@ static int ncr_queue_command (ncb_p np, Scsi_Cmnd *cmd)
if (tp->sval&0x1f) {
u_long mbs = 10000 * (tp->ic_max_width + 1);
printk(" %d.%d MB/s",
(int) (mbs / tp->period), (int) (mbs % tp->period));
printk(" %d.%d MB/s", (int) (mbs / tp->period),
(int) (mbs % tp->period));
printk(" (%d ns, %d offset)\n",
tp->period/10, tp->sval&0x1f);
}
else
} else {
printk(" %d MB/s. \n ", (tp->ic_max_width+1)*5);
}
}
#else
if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) {
msglen += ncr_prepare_nego (np, cp, msgptr + msglen);
......@@ -4600,10 +4087,10 @@ static int ncr_queue_command (ncb_p np, Scsi_Cmnd *cmd)
**==========================================================
*/
static void ncr_start_next_ccb(ncb_p np, lcb_p lp, int maxn)
static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn)
{
XPT_QUEHEAD *qp;
ccb_p cp;
struct ccb *cp;
if (lp->held_ccb)
return;
......@@ -4621,9 +4108,9 @@ static void ncr_start_next_ccb(ncb_p np, lcb_p lp, int maxn)
}
}
static void ncr_put_start_queue(ncb_p np, ccb_p cp)
static void ncr_put_start_queue(struct ncb *np, struct ccb *cp)
{
u_short qidx;
u16 qidx;
/*
** insert into start queue.
......@@ -4652,26 +4139,7 @@ static void ncr_put_start_queue(ncb_p np, ccb_p cp)
}
/*==========================================================
**
**
** Start reset process.
** If reset in progress do nothing.
** The interrupt handler will reinitialize the chip.
** The timeout handler will wait for settle_time before
** clearing it and so resuming command processing.
**
**
**==========================================================
*/
static void ncr_start_reset(ncb_p np)
{
if (!np->settle_time) {
(void) ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay);
}
}
static int ncr_reset_scsi_bus(ncb_p np, int enab_int, int settle_delay)
static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay)
{
u32 term;
int retv = 0;
......@@ -4692,8 +4160,6 @@ static int ncr_reset_scsi_bus(ncb_p np, int enab_int, int settle_delay)
** properly set IRQ mode, prior to resetting the bus.
*/
OUTB (nc_stest3, TE);
if (np->device_id != PSEUDO_720_ID)
OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
OUTB (nc_scntl1, CRST);
UDELAY (200);
......@@ -4732,6 +4198,20 @@ static int ncr_reset_scsi_bus(ncb_p np, int enab_int, int settle_delay)
return retv;
}
/*
* Start reset process.
* If reset in progress do nothing.
* The interrupt handler will reinitialize the chip.
* The timeout handler will wait for settle_time before
* clearing it and so resuming command processing.
*/
static void ncr_start_reset(struct ncb *np)
{
if (!np->settle_time) {
ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay);
}
}
/*==========================================================
**
**
......@@ -4741,10 +4221,10 @@ static int ncr_reset_scsi_bus(ncb_p np, int enab_int, int settle_delay)
**
**==========================================================
*/
static int ncr_reset_bus (ncb_p np, Scsi_Cmnd *cmd, int sync_reset)
static int ncr_reset_bus (struct ncb *np, struct scsi_cmnd *cmd, int sync_reset)
{
/* Scsi_Device *device = cmd->device; */
ccb_p cp;
/* struct scsi_device *device = cmd->device; */
struct ccb *cp;
int found;
/*
......@@ -4809,10 +4289,10 @@ static int ncr_reset_bus (ncb_p np, Scsi_Cmnd *cmd, int sync_reset)
**
**==========================================================
*/
static int ncr_abort_command (ncb_p np, Scsi_Cmnd *cmd)
static int ncr_abort_command (struct ncb *np, struct scsi_cmnd *cmd)
{
/* Scsi_Device *device = cmd->device; */
ccb_p cp;
/* struct scsi_device *device = cmd->device; */
struct ccb *cp;
int found;
int retv;
......@@ -4892,11 +4372,11 @@ static int ncr_abort_command (ncb_p np, Scsi_Cmnd *cmd)
**==========================================================
*/
static int ncr_detach(ncb_p np)
static void ncr_detach(struct ncb *np)
{
ccb_p cp;
tcb_p tp;
lcb_p lp;
struct ccb *cp;
struct tcb *tp;
struct lcb *lp;
int target, lun;
int i;
char inst_name[16];
......@@ -4965,9 +4445,7 @@ static int ncr_detach(ncb_p np)
m_free_dma(cp, sizeof(*cp), "CCB");
}
/*
** Free allocated tp(s)
*/
/* Free allocated tp(s) */
for (target = 0; target < MAX_TARGET ; target++) {
tp=&np->target[target];
......@@ -4993,8 +4471,6 @@ static int ncr_detach(ncb_p np)
m_free_dma(np, sizeof(struct ncb), "NCB");
printk("%s: host resources successfully released\n", inst_name);
return 1;
}
/*==========================================================
......@@ -5007,11 +4483,11 @@ static int ncr_detach(ncb_p np)
**==========================================================
*/
void ncr_complete (ncb_p np, ccb_p cp)
void ncr_complete (struct ncb *np, struct ccb *cp)
{
Scsi_Cmnd *cmd;
tcb_p tp;
lcb_p lp;
struct scsi_cmnd *cmd;
struct tcb *tp;
struct lcb *lp;
/*
** Sanity check
......@@ -5114,9 +4590,9 @@ void ncr_complete (ncb_p np, ccb_p cp)
&& (cp->scsi_status == S_GOOD ||
cp->scsi_status == S_COND_MET)) {
/*
** All went well (GOOD status).
** CONDITION MET status is returned on
** `Pre-Fetch' or `Search data' success.
* All went well (GOOD status).
* CONDITION MET status is returned on
* `Pre-Fetch' or `Search data' success.
*/
cmd->result = ScsiResult(DID_OK, cp->scsi_status);
......@@ -5300,10 +4776,10 @@ void ncr_complete (ncb_p np, ccb_p cp)
** This CCB has been skipped by the NCR.
** Queue it in the correponding unit queue.
*/
static void ncr_ccb_skipped(ncb_p np, ccb_p cp)
static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp)
{
tcb_p tp = &np->target[cp->target];
lcb_p lp = tp->lp[cp->lun];
struct tcb *tp = &np->target[cp->target];
struct lcb *lp = tp->lp[cp->lun];
if (lp && cp != np->ccb) {
cp->host_status &= ~HS_SKIPMASK;
......@@ -5325,9 +4801,9 @@ static void ncr_ccb_skipped(ncb_p np, ccb_p cp)
** The NCR has completed CCBs.
** Look at the DONE QUEUE if enabled, otherwise scan all CCBs
*/
void ncr_wakeup_done (ncb_p np)
void ncr_wakeup_done (struct ncb *np)
{
ccb_p cp;
struct ccb *cp;
#ifdef SCSI_NCR_CCB_DONE_SUPPORT
int i, j;
......@@ -5341,7 +4817,7 @@ void ncr_wakeup_done (ncb_p np)
if (!CCB_DONE_VALID(cp))
break;
np->ccb_done[j] = (ccb_p) CCB_DONE_EMPTY;
np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY;
np->scripth->done_queue[5*j + 4] =
cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug));
MEMORY_BARRIER();
......@@ -5371,9 +4847,9 @@ void ncr_wakeup_done (ncb_p np)
/*
** Complete all active CCBs.
*/
void ncr_wakeup (ncb_p np, u_long code)
void ncr_wakeup (struct ncb *np, u_long code)
{
ccb_p cp = np->ccb;
struct ccb *cp = np->ccb;
while (cp) {
if (cp->host_status != HS_IDLE) {
......@@ -5392,7 +4868,7 @@ void ncr_wakeup (ncb_p np, u_long code)
* at least. EA (dcntl bit 5) isn't set here as it is set once only in
* the _detect function.
*/
static void ncr_chip_reset(ncb_p np, int delay)
static void ncr_chip_reset(struct ncb *np, int delay)
{
OUTB (nc_istat, SRST);
UDELAY (delay);
......@@ -5414,7 +4890,7 @@ static void ncr_chip_reset(ncb_p np, int delay)
**==========================================================
*/
void ncr_init (ncb_p np, int reset, char * msg, u_long code)
void ncr_init (struct ncb *np, int reset, char * msg, u_long code)
{
int i;
......@@ -5456,7 +4932,7 @@ void ncr_init (ncb_p np, int reset, char * msg, u_long code)
** Clear Done Queue
*/
for (i = 0; i < MAX_DONE; i++) {
np->ccb_done[i] = (ccb_p) CCB_DONE_EMPTY;
np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY;
np->scripth0->done_queue[5*i + 4] =
cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end));
}
......@@ -5527,24 +5003,6 @@ void ncr_init (ncb_p np, int reset, char * msg, u_long code)
OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
/*
** For 895/6 enable SBMC interrupt and save current SCSI bus mode.
*/
if (np->features & FE_ULTRA2) {
OUTONW (nc_sien, SBMC);
np->scsi_mode = INB (nc_stest4) & SMODE;
}
/*
** DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
** Disable overlapped arbitration.
** All 896 chips are also affected by this errata.
*/
if (np->device_id == PCI_DEVICE_ID_NCR_53C875)
OUTB (nc_ctest0, (1<<5));
else if (np->device_id == PCI_DEVICE_ID_NCR_53C896)
OUTB (nc_ccntl0, DPR);
/*
** Fill in target structure.
** Reinitialize usrsync.
......@@ -5553,7 +5011,7 @@ void ncr_init (ncb_p np, int reset, char * msg, u_long code)
*/
for (i=0;i<MAX_TARGET;i++) {
tcb_p tp = &np->target[i];
struct tcb *tp = &np->target[i];
tp->sval = 0;
tp->wval = np->rv_scntl3;
......@@ -5651,7 +5109,7 @@ static void ncr_negotiate (struct ncb* np, struct tcb* tp)
**==========================================================
*/
static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p)
{
u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
int div = np->clock_divn; /* Number of divisors supported */
......@@ -5720,10 +5178,10 @@ static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
**==========================================================
*/
static void ncr_set_sync_wide_status (ncb_p np, u_char target)
static void ncr_set_sync_wide_status (struct ncb *np, u_char target)
{
ccb_p cp;
tcb_p tp = &np->target[target];
struct ccb *cp;
struct tcb *tp = &np->target[target];
/*
** set actual value and sync_status
......@@ -5755,10 +5213,10 @@ static void ncr_set_sync_wide_status (ncb_p np, u_char target)
**==========================================================
*/
static void ncr_setsync (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer)
static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer)
{
Scsi_Cmnd *cmd;
tcb_p tp;
struct scsi_cmnd *cmd;
struct tcb *tp;
u_char target = INB (nc_sdid) & 0x0f;
u_char idiv;
......@@ -5839,11 +5297,11 @@ static void ncr_setsync (ncb_p np, ccb_p cp, u_char scntl3, u_char sxfer)
**==========================================================
*/
static void ncr_setwide (ncb_p np, ccb_p cp, u_char wide, u_char ack)
static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack)
{
Scsi_Cmnd *cmd;
u_short target = INB (nc_sdid) & 0x0f;
tcb_p tp;
struct scsi_cmnd *cmd;
u16 target = INB (nc_sdid) & 0x0f;
struct tcb *tp;
u_char scntl3;
u_char sxfer;
......@@ -5893,10 +5351,10 @@ static void ncr_setwide (ncb_p np, ccb_p cp, u_char wide, u_char ack)
**==========================================================
*/
static void ncr_setup_tags (ncb_p np, u_char tn, u_char ln)
static void ncr_setup_tags (struct ncb *np, u_char tn, u_char ln)
{
tcb_p tp = &np->target[tn];
lcb_p lp = tp->lp[ln];
struct tcb *tp = &np->target[tn];
struct lcb *lp = tp->lp[ln];
u_char reqtags, maxdepth;
/*
......@@ -5989,10 +5447,10 @@ static void ncr_setup_tags (ncb_p np, u_char tn, u_char ln)
#ifdef SCSI_NCR_USER_COMMAND_SUPPORT
static void ncr_usercmd (ncb_p np)
static void ncr_usercmd (struct ncb *np)
{
u_char t;
tcb_p tp;
struct tcb *tp;
switch (np->user.cmd) {
......@@ -6013,7 +5471,7 @@ static void ncr_usercmd (ncb_p np)
if (!((np->user.target>>t)&1)) continue;
np->target[t].usrtags = np->user.data;
for (ln = 0; ln < MAX_LUN; ln++) {
lcb_p lp = np->target[t].lp[ln];
struct lcb *lp = np->target[t].lp[ln];
if (!lp)
continue;
lp->maxtags = lp->numtags = np->user.data;
......@@ -6074,7 +5532,7 @@ static void ncr_usercmd (ncb_p np)
**----------------------------------------------------------
*/
static void ncr_timeout (ncb_p np)
static void ncr_timeout (struct ncb *np)
{
u_long thistime = ktime_get(0);
......@@ -6162,7 +5620,7 @@ static void ncr_timeout (ncb_p np)
**==========================================================
*/
static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat)
{
u32 dsp;
int script_ofs;
......@@ -6242,10 +5700,10 @@ static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
**============================================================
*/
void ncr_exception (ncb_p np)
void ncr_exception (struct ncb *np)
{
u_char istat, dstat;
u_short sist;
u16 sist;
int i;
/*
......@@ -6425,10 +5883,10 @@ void ncr_exception (ncb_p np)
**----------------------------------------------------------
*/
void ncr_int_sto (ncb_p np)
void ncr_int_sto (struct ncb *np)
{
u_long dsa;
ccb_p cp;
struct ccb *cp;
if (DEBUG_FLAGS & DEBUG_TINY) printk ("T");
/*
......@@ -6470,7 +5928,7 @@ void ncr_int_sto (ncb_p np)
**----------------------------------------------------------
*/
static int ncr_int_sbmc (ncb_p np)
static int ncr_int_sbmc (struct ncb *np)
{
u_char scsi_mode = INB (nc_stest4) & SMODE;
......@@ -6502,7 +5960,7 @@ static int ncr_int_sbmc (ncb_p np)
**----------------------------------------------------------
*/
static int ncr_int_par (ncb_p np)
static int ncr_int_par (struct ncb *np)
{
u_char hsts = INB (HS_PRT);
u32 dbc = INL (nc_dbc);
......@@ -6589,7 +6047,7 @@ static int ncr_int_par (ncb_p np)
**----------------------------------------------------------
*/
static void ncr_int_ma (ncb_p np)
static void ncr_int_ma (struct ncb *np)
{
u32 dbc;
u32 rest;
......@@ -6602,7 +6060,7 @@ static void ncr_int_ma (ncb_p np)
u32 *tblp;
ncrcmd *newcmd;
u_char cmd, sbcl;
ccb_p cp;
struct ccb *cp;
dsp = INL (nc_dsp);
dbc = INL (nc_dbc);
......@@ -6618,7 +6076,7 @@ static void ncr_int_ma (ncb_p np)
if ((cmd & 1) == 0) {
u_char ctest5, ss0, ss2;
u_short delta;
u16 delta;
ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
if (ctest5 & DFS)
......@@ -6890,13 +6348,13 @@ static void ncr_int_ma (ncb_p np)
}
static void ncr_sir_to_redo(ncb_p np, int num, ccb_p cp)
static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp)
{
Scsi_Cmnd *cmd = cp->cmd;
tcb_p tp = &np->target[cmd->device->id];
lcb_p lp = tp->lp[cmd->device->lun];
struct scsi_cmnd *cmd = cp->cmd;
struct tcb *tp = &np->target[cmd->device->id];
struct lcb *lp = tp->lp[cmd->device->lun];
XPT_QUEHEAD *qp;
ccb_p cp2;
struct ccb * cp2;
int disc_cnt = 0;
int busy_cnt = 0;
u32 startp;
......@@ -7059,7 +6517,7 @@ static int ncr_show_msg (u_char * msg)
return (1);
}
static void ncr_print_msg ( ccb_p cp, char *label, u_char *msg)
static void ncr_print_msg ( struct ccb *cp, char *label, u_char *msg)
{
if (cp)
PRINT_ADDR(cp->cmd);
......@@ -7070,15 +6528,15 @@ static void ncr_print_msg ( ccb_p cp, char *label, u_char *msg)
printk(".\n");
}
void ncr_int_sir (ncb_p np)
void ncr_int_sir (struct ncb *np)
{
u_char scntl3;
u_char chg, ofs, per, fak, wide;
u_char num = INB (nc_dsps);
ccb_p cp=0;
struct ccb *cp=0;
u_long dsa = INL (nc_dsa);
u_char target = INB (nc_sdid) & 0x0f;
tcb_p tp = &np->target[target];
struct tcb *tp = &np->target[target];
if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num);
......@@ -7548,12 +7006,12 @@ void ncr_int_sir (ncb_p np)
**==========================================================
*/
static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln)
static struct ccb *ncr_get_ccb (struct ncb *np, u_char tn, u_char ln)
{
tcb_p tp = &np->target[tn];
lcb_p lp = tp->lp[ln];
struct tcb *tp = &np->target[tn];
struct lcb *lp = tp->lp[ln];
u_char tag = NO_TAG;
ccb_p cp = (ccb_p) 0;
struct ccb *cp = NULL;
/*
** Lun structure available ?
......@@ -7564,7 +7022,7 @@ static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln)
** Keep from using more tags than we can handle.
*/
if (lp->usetags && lp->busyccbs >= lp->maxnxs)
return (ccb_p) 0;
return NULL;
/*
** Allocate a new CCB if needed.
......@@ -7605,7 +7063,7 @@ static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln)
tag = lp->cb_tags[lp->ia_tag];
}
else if (lp->actccbs > 0)
return (ccb_p) 0;
return NULL;
}
/*
......@@ -7626,7 +7084,7 @@ static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln)
#endif
if (cp->magic)
return ((ccb_p) 0);
return NULL;
cp->magic = 1;
......@@ -7666,10 +7124,10 @@ static ccb_p ncr_get_ccb (ncb_p np, u_char tn, u_char ln)
**==========================================================
*/
static void ncr_free_ccb (ncb_p np, ccb_p cp)
static void ncr_free_ccb (struct ncb *np, struct ccb *cp)
{
tcb_p tp = &np->target[cp->target];
lcb_p lp = tp->lp[cp->lun];
struct tcb *tp = &np->target[cp->target];
struct lcb *lp = tp->lp[cp->lun];
if (DEBUG_FLAGS & DEBUG_TAGS) {
PRINT_LUN(np, cp->target, cp->lun);
......@@ -7731,7 +7189,7 @@ static void ncr_free_ccb (ncb_p np, ccb_p cp)
**------------------------------------------------------------------------
**------------------------------------------------------------------------
*/
static void ncr_init_ccb(ncb_p np, ccb_p cp)
static void ncr_init_ccb(struct ncb *np, struct ccb *cp)
{
ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
......@@ -7770,11 +7228,11 @@ static void ncr_init_ccb(ncb_p np, ccb_p cp)
**------------------------------------------------------------------------
**------------------------------------------------------------------------
*/
static void ncr_alloc_ccb(ncb_p np, u_char tn, u_char ln)
static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln)
{
tcb_p tp = &np->target[tn];
lcb_p lp = tp->lp[ln];
ccb_p cp = 0;
struct tcb *tp = &np->target[tn];
struct lcb *lp = tp->lp[ln];
struct ccb *cp = 0;
/*
** Allocate memory for this CCB.
......@@ -7820,9 +7278,9 @@ static void ncr_alloc_ccb(ncb_p np, u_char tn, u_char ln)
** It contains a SCRIPT that is called on target reselection.
**------------------------------------------------------------------------
*/
static void ncr_init_tcb (ncb_p np, u_char tn)
static void ncr_init_tcb (struct ncb *np, u_char tn)
{
tcb_p tp = &np->target[tn];
struct tcb *tp = &np->target[tn];
ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1);
int th = tn & 3;
int i;
......@@ -7907,10 +7365,10 @@ static void ncr_init_tcb (ncb_p np, u_char tn)
** command has been successfully completed for this target/lun.
**------------------------------------------------------------------------
*/
static lcb_p ncr_alloc_lcb (ncb_p np, u_char tn, u_char ln)
static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln)
{
tcb_p tp = &np->target[tn];
lcb_p lp = tp->lp[ln];
struct tcb *tp = &np->target[tn];
struct lcb *lp = tp->lp[ln];
ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4);
int lh = ln & 3;
......@@ -7997,10 +7455,10 @@ static lcb_p ncr_alloc_lcb (ncb_p np, u_char tn, u_char ln)
** will play with CHANGE DEFINITION commands. :-)
**------------------------------------------------------------------------
*/
static lcb_p ncr_setup_lcb (ncb_p np, u_char tn, u_char ln, u_char *inq_data)
static struct lcb *ncr_setup_lcb (struct ncb *np, u_char tn, u_char ln, u_char *inq_data)
{
tcb_p tp = &np->target[tn];
lcb_p lp = tp->lp[ln];
struct tcb *tp = &np->target[tn];
struct lcb *lp = tp->lp[ln];
u_char inq_byte7;
/*
......@@ -8117,7 +7575,7 @@ static lcb_p ncr_setup_lcb (ncb_p np, u_char tn, u_char ln, u_char *inq_data)
** sizes to the data segment array.
*/
static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd)
{
struct scr_tblmove *data;
int segment = 0;
......@@ -8171,7 +7629,6 @@ static int ncr_scatter(ncb_p np, ccb_p cp, Scsi_Cmnd *cmd)
**==========================================================
*/
#ifndef SCSI_NCR_IOMAPPED
static int __init ncr_regtest (struct ncb* np)
{
register volatile u32 data;
......@@ -8194,21 +7651,18 @@ static int __init ncr_regtest (struct ncb* np)
};
return (0);
}
#endif
static int __init ncr_snooptest (struct ncb* np)
{
u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
int i, err=0;
#ifndef SCSI_NCR_IOMAPPED
if (np->reg) {
err |= ncr_regtest (np);
if (err) return (err);
if (err)
return (err);
}
#endif
/*
** init
*/
/* init */
pc = NCB_SCRIPTH_PHYS (np, snooptest);
host_wr = 1;
ncr_wr = 2;
......@@ -8361,7 +7815,7 @@ static u_long ncr_lookup(char * id)
/*
* Select NCR SCSI clock frequency
*/
static void ncr_selectclock(ncb_p np, u_char scntl3)
static void ncr_selectclock(struct ncb *np, u_char scntl3)
{
if (np->multiplier < 2) {
OUTB(nc_scntl3, scntl3);
......@@ -8390,7 +7844,7 @@ static void ncr_selectclock(ncb_p np, u_char scntl3)
/*
* calculate NCR SCSI clock frequency (in KHz)
*/
static unsigned __init ncrgetfreq (ncb_p np, int gen)
static unsigned __init ncrgetfreq (struct ncb *np, int gen)
{
unsigned ms = 0;
char count = 0;
......@@ -8441,7 +7895,7 @@ static unsigned __init ncrgetfreq (ncb_p np, int gen)
/*
* Get/probe NCR SCSI clock frequency
*/
static void __init ncr_getclock (ncb_p np, int mult)
static void __init ncr_getclock (struct ncb *np, int mult)
{
unsigned char scntl3 = INB(nc_scntl3);
unsigned char stest1 = INB(nc_stest1);
......@@ -8508,12 +7962,12 @@ static void __init ncr_getclock (ncb_p np, int mult)
** Linux select queue depths function
*/
int ncr53c8xx_slave_configure(Scsi_Device *device)
int ncr53c8xx_slave_configure(struct scsi_device *device)
{
struct Scsi_Host *host = device->host;
ncb_p np;
tcb_p tp;
lcb_p lp;
struct ncb *np;
struct tcb *tp;
struct lcb *lp;
int numtags, depth_to_use;
np = ((struct host_data *) host->hostdata)->ncb;
......@@ -8565,9 +8019,9 @@ int ncr53c8xx_slave_configure(Scsi_Device *device)
** Linux entry point of queuecommand() function
*/
int ncr53c8xx_queue_command (Scsi_Cmnd *cmd, void (* done)(Scsi_Cmnd *))
int ncr53c8xx_queue_command (struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
{
ncb_p np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
unsigned long flags;
int sts;
......@@ -8577,10 +8031,8 @@ printk("ncr53c8xx_queue_command\n");
cmd->scsi_done = done;
cmd->host_scribble = NULL;
#ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
cmd->__data_mapped = 0;
cmd->__data_mapping = 0;
#endif
NCR_LOCK_NCB(np, flags);
......@@ -8618,8 +8070,8 @@ irqreturn_t ncr53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs)
unsigned long flags;
struct Scsi_Host *shost = (struct Scsi_Host *)dev_id;
struct host_data *host_data = (struct host_data *)shost->hostdata;
ncb_p np = host_data->ncb;
Scsi_Cmnd *done_list;
struct ncb *np = host_data->ncb;
struct scsi_cmnd *done_list;
#ifdef DEBUG_NCR53C8XX
printk("ncr53c8xx : interrupt received\n");
......@@ -8649,12 +8101,12 @@ irqreturn_t ncr53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs)
static void ncr53c8xx_timeout(unsigned long npref)
{
ncb_p np = (ncb_p) npref;
struct ncb *np = (struct ncb *) npref;
unsigned long flags;
Scsi_Cmnd *done_list;
struct scsi_cmnd *done_list;
NCR_LOCK_NCB(np, flags);
ncr_timeout((ncb_p) np);
ncr_timeout(np);
done_list = np->done_list;
np->done_list = 0;
NCR_UNLOCK_NCB(np, flags);
......@@ -8670,12 +8122,12 @@ static void ncr53c8xx_timeout(unsigned long npref)
** Linux entry point of reset() function
*/
int ncr53c8xx_bus_reset(Scsi_Cmnd *cmd)
int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd)
{
ncb_p np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
int sts;
unsigned long flags;
Scsi_Cmnd *done_list;
struct scsi_cmnd *done_list;
NCR_LOCK_NCB(np, flags);
......@@ -8701,12 +8153,12 @@ int ncr53c8xx_bus_reset(Scsi_Cmnd *cmd)
** Linux entry point of abort() function
*/
int ncr53c8xx_abort(Scsi_Cmnd *cmd)
int ncr53c8xx_abort(struct scsi_cmnd *cmd)
{
ncb_p np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb;
int sts;
unsigned long flags;
Scsi_Cmnd *done_list;
struct scsi_cmnd *done_list;
#if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS
printk("ncr53c8xx_abort: pid=%lu serial_number=%ld serial_number_at_timeout=%ld\n",
......@@ -8739,17 +8191,6 @@ int ncr53c8xx_abort(Scsi_Cmnd *cmd)
}
int ncr53c8xx_release(struct Scsi_Host *host)
{
#ifdef DEBUG_NCR53C8XX
printk("ncr53c8xx : release\n");
#endif
ncr_detach(((struct host_data *) host->hostdata)->ncb);
return 1;
}
/*
** Scsi command waiting list management.
**
......@@ -8765,9 +8206,9 @@ printk("ncr53c8xx : release\n");
#define next_wcmd host_scribble
static void insert_into_waiting_list(ncb_p np, Scsi_Cmnd *cmd)
static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd)
{
Scsi_Cmnd *wcmd;
struct scsi_cmnd *wcmd;
#ifdef DEBUG_WAITING_LIST
printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd);
......@@ -8776,19 +8217,19 @@ static void insert_into_waiting_list(ncb_p np, Scsi_Cmnd *cmd)
if (!(wcmd = np->waiting_list)) np->waiting_list = cmd;
else {
while ((wcmd->next_wcmd) != 0)
wcmd = (Scsi_Cmnd *) wcmd->next_wcmd;
wcmd = (struct scsi_cmnd *) wcmd->next_wcmd;
wcmd->next_wcmd = (char *) cmd;
}
}
static Scsi_Cmnd *retrieve_from_waiting_list(int to_remove, ncb_p np, Scsi_Cmnd *cmd)
static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd)
{
Scsi_Cmnd **pcmd = &np->waiting_list;
struct scsi_cmnd **pcmd = &np->waiting_list;
while (*pcmd) {
if (cmd == *pcmd) {
if (to_remove) {
*pcmd = (Scsi_Cmnd *) cmd->next_wcmd;
*pcmd = (struct scsi_cmnd *) cmd->next_wcmd;
cmd->next_wcmd = 0;
}
#ifdef DEBUG_WAITING_LIST
......@@ -8796,14 +8237,14 @@ static Scsi_Cmnd *retrieve_from_waiting_list(int to_remove, ncb_p np, Scsi_Cmnd
#endif
return cmd;
}
pcmd = (Scsi_Cmnd **) &(*pcmd)->next_wcmd;
pcmd = (struct scsi_cmnd **) &(*pcmd)->next_wcmd;
}
return 0;
}
static void process_waiting_list(ncb_p np, int sts)
static void process_waiting_list(struct ncb *np, int sts)
{
Scsi_Cmnd *waiting_list, *wcmd;
struct scsi_cmnd *waiting_list, *wcmd;
waiting_list = np->waiting_list;
np->waiting_list = 0;
......@@ -8812,7 +8253,7 @@ static void process_waiting_list(ncb_p np, int sts)
if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts);
#endif
while ((wcmd = waiting_list) != 0) {
waiting_list = (Scsi_Cmnd *) wcmd->next_wcmd;
waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd;
wcmd->next_wcmd = 0;
if (sts == DID_OK) {
#ifdef DEBUG_WAITING_LIST
......@@ -8900,7 +8341,7 @@ static int is_keyword(char *ptr, int len, char *verb)
** Parse a control command
*/
static int ncr_user_command(ncb_p np, char *buffer, int length)
static int ncr_user_command(struct ncb *np, char *buffer, int length)
{
char *ptr = buffer;
int len = length;
......@@ -9046,7 +8487,7 @@ printk("ncr_user_command: data=%ld\n", uc->data);
** Copy formatted information into the input buffer.
*/
static int ncr_host_info(ncb_p np, char *ptr, off_t offset, int len)
static int ncr_host_info(struct ncb *np, char *ptr, off_t offset, int len)
{
struct info_str info;
......@@ -9055,12 +8496,8 @@ static int ncr_host_info(ncb_p np, char *ptr, off_t offset, int len)
info.offset = offset;
info.pos = 0;
copy_info(&info, " Chip NCR53C%s, device id 0x%x, "
"revision id 0x%x\n",
np->chip_name, np->device_id, np->revision_id);
copy_info(&info, " On PCI bus %d, device %d, function %d, IRQ %d\n",
np->bus, (np->device_fn & 0xf8) >> 3, np->device_fn & 7,
(int) np->irq);
copy_info(&info, " Chip NCR53C720, revision id 0x%x, IRQ %d\n",
np->revision_id, (int) np->irq);
copy_info(&info, " Synchronous period factor %d, "
"max commands per lun %d\n",
(int) np->minsync, MAX_TAGS);
......@@ -9085,7 +8522,7 @@ static int ncr53c8xx_proc_info(struct Scsi_Host *host, char *buffer, char **star
int length, int func)
{
struct host_data *host_data;
ncb_p ncb = 0;
struct ncb *ncb = 0;
int retv;
#ifdef DEBUG_PROC_INFO
......@@ -9152,3 +8589,267 @@ const char *ncr53c8xx_info (struct Scsi_Host *host)
{
return SCSI_NCR_DRIVER_NAME;
}
/*
* Host attach and initialisations.
*
* Allocate host data and ncb structure.
* Request IO region and remap MMIO region.
* Do chip initialization.
* If all is OK, install interrupt handling and
* start the timer daemon.
*/
struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt,
int unit, struct ncr_device *device)
{
struct host_data *host_data;
struct ncb *np = 0;
struct Scsi_Host *instance = 0;
u_long flags = 0;
int i;
#ifdef SCSI_NCR_PROC_INFO_SUPPORT
tpnt->proc_info = ncr53c8xx_proc_info,
#endif
tpnt->info = ncr53c8xx_info;
tpnt->queuecommand = ncr53c8xx_queue_command;
tpnt->slave_configure = ncr53c8xx_slave_configure;
tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset;
tpnt->can_queue = SCSI_NCR_CAN_QUEUE;
tpnt->this_id = 7;
tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE;
tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN;
tpnt->use_clustering = DISABLE_CLUSTERING;
if (device->differential)
driver_setup.diff_support = device->differential;
printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n",
unit, device->chip.revision_id, device->slot.irq);
instance = scsi_host_alloc(tpnt, sizeof(*host_data));
if (!instance)
goto attach_error;
host_data = (struct host_data *) instance->hostdata;
np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB");
if (!np)
goto attach_error;
NCR_INIT_LOCK_NCB(np);
np->dev = device->dev;
np->p_ncb = vtobus(np);
host_data->ncb = np;
np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB");
if (!np->ccb)
goto attach_error;
/* Store input information in the host data structure. */
np->unit = unit;
np->verbose = driver_setup.verbose;
sprintf(np->inst_name, "ncr53c720-%d", np->unit);
np->revision_id = device->chip.revision_id;
np->features = device->chip.features;
np->clock_divn = device->chip.nr_divisor;
np->maxoffs = device->chip.offset_max;
np->maxburst = device->chip.burst_max;
np->myaddr = device->host_id;
/* Allocate SCRIPTS areas. */
np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT");
if (!np->script0)
goto attach_error;
np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH");
if (!np->scripth0)
goto attach_error;
init_timer(&np->timer);
np->timer.data = (unsigned long) np;
np->timer.function = ncr53c8xx_timeout;
/* Try to map the controller chip to virtual and physical memory. */
np->paddr = device->slot.base;
np->paddr2 = (np->features & FE_RAM) ? device->slot.base_2 : 0;
if (device->slot.base_v)
np->vaddr = device->slot.base_v;
else
np->vaddr = (unsigned long)ioremap(device->slot.base_c, 128);
if (!np->vaddr) {
printk(KERN_ERR
"%s: can't map memory mapped IO region\n",ncr_name(np));
goto attach_error;
} else {
if (bootverbose > 1)
printk(KERN_INFO
"%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr);
}
/* Make the controller's registers available. Now the INB INW INL
* OUTB OUTW OUTL macros can be used safely.
*/
np->reg = (struct ncr_reg*) np->vaddr;
/* Do chip dependent initialization. */
ncr_prepare_setting(np);
if (np->paddr2 && sizeof(struct script) > 4096) {
np->paddr2 = 0;
printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n",
ncr_name(np));
}
/* Fill Linux host instance structure */
instance->max_channel = 0;
instance->this_id = np->myaddr;
instance->max_id = np->maxwide ? 16 : 8;
instance->max_lun = SCSI_NCR_MAX_LUN;
instance->base = (unsigned long) np->reg;
instance->irq = device->slot.irq;
instance->unique_id = device->slot.base;
instance->dma_channel = 0;
instance->cmd_per_lun = MAX_TAGS;
instance->can_queue = (MAX_START-4);
scsi_set_device(instance, device->dev);
#ifdef SCSI_NCR_INTEGRITY_CHECKING
np->check_integrity = 0;
instance->check_integrity = 0;
#ifdef SCSI_NCR_ENABLE_INTEGRITY_CHECK
if ( !(driver_setup.bus_check & 0x04) ) {
np->check_integrity = 1;
instance->check_integrity = 1;
}
#endif
#endif
/* Patch script to physical addresses */
ncr_script_fill(&script0, &scripth0);
np->scripth = np->scripth0;
np->p_scripth = vtobus(np->scripth);
np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0);
ncr_script_copy_and_bind(np, (ncrcmd *) &script0,
(ncrcmd *) np->script0, sizeof(struct script));
ncr_script_copy_and_bind(np, (ncrcmd *) &scripth0,
(ncrcmd *) np->scripth0, sizeof(struct scripth));
np->ccb->p_ccb = vtobus (np->ccb);
/* Patch the script for LED support. */
if (np->features & FE_LED0) {
np->script0->idle[0] =
cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01));
np->script0->reselected[0] =
cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
np->script0->start[0] =
cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe));
}
/*
* Look for the target control block of this nexus.
* For i = 0 to 3
* JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb)
*/
for (i = 0 ; i < 4 ; i++) {
np->jump_tcb[i].l_cmd =
cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3))));
np->jump_tcb[i].l_paddr =
cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target));
}
ncr_chip_reset(np, 100);
/* Now check the cache handling of the chipset. */
if (ncr_snooptest(np)) {
printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n");
goto attach_error;
};
/* Install the interrupt handler. */
np->irq = device->slot.irq;
/* Initialize the fixed part of the default ccb. */
ncr_init_ccb(np, np->ccb);
/*
* After SCSI devices have been opened, we cannot reset the bus
* safely, so we do it here. Interrupt handler does the real work.
* Process the reset exception if interrupts are not enabled yet.
* Then enable disconnects.
*/
NCR_LOCK_NCB(np, flags);
if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) {
printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np));
NCR_UNLOCK_NCB(np, flags);
goto attach_error;
}
ncr_exception(np);
np->disc = 1;
/*
* The middle-level SCSI driver does not wait for devices to settle.
* Wait synchronously if more than 2 seconds.
*/
if (driver_setup.settle_delay > 2) {
printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n",
ncr_name(np), driver_setup.settle_delay);
MDELAY (1000 * driver_setup.settle_delay);
}
/* start the timeout daemon */
np->lasttime=0;
ncr_timeout (np);
/* use SIMPLE TAG messages by default */
#ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG
np->order = M_SIMPLE_TAG;
#endif
NCR_UNLOCK_NCB(np, flags);
return instance;
attach_error:
if (!instance)
return NULL;
printk(KERN_INFO "%s: detaching...\n", ncr_name(np));
if (!np)
goto unregister;
if (np->scripth0)
m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH");
if (np->script0)
m_free_dma(np->script0, sizeof(struct script), "SCRIPT");
if (np->ccb)
m_free_dma(np->ccb, sizeof(struct ccb), "CCB");
m_free_dma(np, sizeof(struct ncb), "NCB");
host_data->ncb = NULL;
unregister:
scsi_host_put(instance);
return NULL;
}
int ncr53c8xx_release(struct Scsi_Host *host)
{
struct host_data *host_data;
#ifdef DEBUG_NCR53C8XX
printk("ncr53c8xx: release\n");
#endif
if (!host)
return 1;
host_data = (struct host_data *)host->hostdata;
if (host_data && host_data->ncb)
ncr_detach(host_data->ncb);
return 1;
}
drivers/scsi/ncr53c8xx.h
View file @ a7ed0dc0
......@@ -42,6 +42,8 @@
#ifndef NCR53C8XX_H
#define NCR53C8XX_H
#include <scsi/scsi_host.h>
typedef u_long vm_offset_t;
#include "sym53c8xx_defs.h"
......@@ -53,39 +55,17 @@ typedef u_long vm_offset_t;
**
**==========================================================
*/
typedef struct {
int bus;
u_char device_fn;
struct ncr_slot {
u_long base;
u_long base_2;
u_long io_port;
u_long base_c;
u_long base_2_c;
u_long base_v;
u_long base_2_v;
int irq;
/* port and reg fields to use INB, OUTB macros */
u_long base_io;
volatile struct ncr_reg *reg;
} ncr_slot;
/*==========================================================
**
** Structure used to store the NVRAM content.
**
**==========================================================
*/
typedef struct {
int type;
#define SCSI_NCR_SYMBIOS_NVRAM (1)
#define SCSI_NCR_TEKRAM_NVRAM (2)
#ifdef SCSI_NCR_NVRAM_SUPPORT
union {
Symbios_nvram Symbios;
Tekram_nvram Tekram;
} data;
#endif
} ncr_nvram;
};
/*==========================================================
**
......@@ -96,18 +76,13 @@ typedef struct {
*/
struct ncr_device {
struct device *dev;
ncr_slot slot;
ncr_chip chip;
ncr_nvram *nvram;
struct ncr_slot slot;
struct ncr_chip chip;
u_char host_id;
#ifdef SCSI_NCR_PQS_PDS_SUPPORT
u_char pqs_pds;
#endif
__u8 differential;
int attach_done;
u8 differential;
};
extern struct Scsi_Host *ncr_attach (Scsi_Host_Template *tpnt, int unit, struct ncr_device *device);
extern struct Scsi_Host *ncr_attach(struct scsi_host_template *tpnt, int unit, struct ncr_device *device);
extern int ncr53c8xx_release(struct Scsi_Host *host);
irqreturn_t ncr53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs);
......
drivers/scsi/sym53c8xx_comm.h
View file @ a7ed0dc0
......@@ -71,8 +71,6 @@
**==========================================================
*/
#define SCSI_NCR_DYNAMIC_DMA_MAPPING
/*==========================================================
**
** Miscallaneous defines.
......@@ -81,22 +79,12 @@
*/
#define u_char unsigned char
#define u_short unsigned short
#define u_int unsigned int
#define u_long unsigned long
#ifndef bcmp
#define bcmp(s, d, n) memcmp((d), (s), (n))
#endif
#ifndef bzero
#define bzero(d, n) memset((d), 0, (n))
#endif
#ifndef offsetof
#define offsetof(t, m) ((size_t) (&((t *)0)->m))
#endif
/*==========================================================
**
** assert ()
......@@ -353,7 +341,6 @@ typedef struct m_link { /* Link between free memory chunks */
struct m_link *next;
} m_link_s;
#ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
typedef struct m_vtob { /* Virtual to Bus address translation */
struct m_vtob *next;
m_addr_t vaddr;
......@@ -364,10 +351,8 @@ typedef struct m_vtob { /* Virtual to Bus address translation */
#define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
#define VTOB_HASH_CODE(m) \
((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
#endif
typedef struct m_pool { /* Memory pool of a given kind */
#ifdef SCSI_NCR_DYNAMIC_DMA_MAPPING
m_bush_t bush;
m_addr_t (*getp)(struct m_pool *);
void (*freep)(struct m_pool *, m_addr_t);
......@@ -378,10 +363,6 @@ typedef struct m_pool { /* Memory pool of a given kind */
int nump;
m_vtob_s *(vtob[VTOB_HASH_SIZE]);
struct m_pool *next;
#else
#define M_GETP() __GetFreePages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER)
#define M_FREEP(p) free_pages(p, MEMO_PAGE_ORDER)
#endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1];
} m_pool_s;
......@@ -508,12 +489,6 @@ static void __m_free(m_pool_s *mp, void *ptr, int size, char *name)
* memory accessed by the PCI chip. `mp0' is the default not DMAable pool.
*/
#ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
static m_pool_s mp0;
#else
static m_addr_t ___mp0_getp(m_pool_s *mp)
{
m_addr_t m = GetPages();
......@@ -530,22 +505,10 @@ static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
static m_pool_s mp0 = {0, ___mp0_getp, ___mp0_freep};
#endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
/*
* DMAable pools.
*/
#ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
/* Without pci bus iommu support, all the memory is assumed DMAable */
#define __m_calloc_dma(b, s, n) m_calloc(s, n)
#define __m_free_dma(b, p, s, n) m_free(p, s, n)
#define __vtobus(b, p) virt_to_bus(p)
#else
/*
* With pci bus iommu support, we maintain one pool per pcidev and a
* hashed reverse table for virtual to bus physical address translations.
......@@ -680,8 +643,6 @@ static m_addr_t __vtobus(m_bush_t bush, void *m)
return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
}
#endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
#define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n)
#define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n)
#define m_calloc_dma(s, n) _m_calloc_dma(np, s, n)
......@@ -693,23 +654,6 @@ static m_addr_t __vtobus(m_bush_t bush, void *m)
* Deal with DMA mapping/unmapping.
*/
#ifndef SCSI_NCR_DYNAMIC_DMA_MAPPING
/* Linux versions prior to pci bus iommu kernel interface */
#define __unmap_scsi_data(dev, cmd) do {; } while (0)
#define __map_scsi_single_data(dev, cmd) (__vtobus(dev,(cmd)->request_buffer))
#define __map_scsi_sg_data(dev, cmd) ((cmd)->use_sg)
#define __sync_scsi_data_for_cpu(dev, cmd) do {; } while (0)
#define __sync_scsi_data_for_device(dev, cmd) do {; } while (0)
#define scsi_sg_dma_address(sc) vtobus((sc)->address)
#define scsi_sg_dma_len(sc) ((sc)->length)
#else
/* Linux version with pci bus iommu kernel interface */
/* To keep track of the dma mapping (sg/single) that has been set */
#define __data_mapped SCp.phase
#define __data_mapping SCp.have_data_in
......@@ -800,65 +744,14 @@ static void __sync_scsi_data_for_device(struct device *dev, Scsi_Cmnd *cmd)
#define scsi_sg_dma_address(sc) sg_dma_address(sc)
#define scsi_sg_dma_len(sc) sg_dma_len(sc)
#endif /* SCSI_NCR_DYNAMIC_DMA_MAPPING */
#define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd)
#define map_scsi_single_data(np, cmd) __map_scsi_single_data(np->dev, cmd)
#define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd)
#define sync_scsi_data_for_cpu(np, cmd) __sync_scsi_data_for_cpu(np->dev, cmd)
#define sync_scsi_data_for_device(np, cmd) __sync_scsi_data_for_device(np->dev, cmd)
/*==========================================================
**
** SCSI data transfer direction
**
** Until some linux kernel version near 2.3.40,
** low-level scsi drivers were not told about data
** transfer direction. We check the existence of this
** feature that has been expected for a _long_ time by
** all SCSI driver developers by just testing against
** the definition of SCSI_DATA_UNKNOWN. Indeed this is
** a hack, but testing against a kernel version would
** have been a shame. ;-)
**
**==========================================================
*/
#ifdef SCSI_DATA_UNKNOWN
#define scsi_data_direction(cmd) (cmd->sc_data_direction)
#else
#define SCSI_DATA_UNKNOWN 0
#define SCSI_DATA_WRITE 1
#define SCSI_DATA_READ 2
#define SCSI_DATA_NONE 3
static __inline__ int scsi_data_direction(Scsi_Cmnd *cmd)
{
int direction;
switch((int) cmd->cmnd[0]) {
case 0x08: /* READ(6) 08 */
case 0x28: /* READ(10) 28 */
case 0xA8: /* READ(12) A8 */
direction = SCSI_DATA_READ;
break;
case 0x0A: /* WRITE(6) 0A */
case 0x2A: /* WRITE(10) 2A */
case 0xAA: /* WRITE(12) AA */
direction = SCSI_DATA_WRITE;
break;
default:
direction = SCSI_DATA_UNKNOWN;
break;
}
return direction;
}
#endif /* SCSI_DATA_UNKNOWN */
/*==========================================================
**
** Driver setup.
......@@ -881,602 +774,6 @@ static struct ncr_driver_setup
#define bootverbose (np->verbose)
/*==========================================================
**
** NVRAM detection and reading.
**
** Currently supported:
** - 24C16 EEPROM with both Symbios and Tekram layout.
** - 93C46 EEPROM with Tekram layout.
**
**==========================================================
*/
#ifdef SCSI_NCR_NVRAM_SUPPORT
/*
* 24C16 EEPROM reading.
*
* GPOI0 - data in/data out
* GPIO1 - clock
* Symbios NVRAM wiring now also used by Tekram.
*/
#define SET_BIT 0
#define CLR_BIT 1
#define SET_CLK 2
#define CLR_CLK 3
/*
* Set/clear data/clock bit in GPIO0
*/
static void __init
S24C16_set_bit(ncr_slot *np, u_char write_bit, u_char *gpreg, int bit_mode)
{
UDELAY (5);
switch (bit_mode){
case SET_BIT:
*gpreg |= write_bit;
break;
case CLR_BIT:
*gpreg &= 0xfe;
break;
case SET_CLK:
*gpreg |= 0x02;
break;
case CLR_CLK:
*gpreg &= 0xfd;
break;
}
OUTB (nc_gpreg, *gpreg);
UDELAY (5);
}
/*
* Send START condition to NVRAM to wake it up.
*/
static void __init S24C16_start(ncr_slot *np, u_char *gpreg)
{
S24C16_set_bit(np, 1, gpreg, SET_BIT);
S24C16_set_bit(np, 0, gpreg, SET_CLK);
S24C16_set_bit(np, 0, gpreg, CLR_BIT);
S24C16_set_bit(np, 0, gpreg, CLR_CLK);
}
/*
* Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
*/
static void __init S24C16_stop(ncr_slot *np, u_char *gpreg)
{
S24C16_set_bit(np, 0, gpreg, SET_CLK);
S24C16_set_bit(np, 1, gpreg, SET_BIT);
}
/*
* Read or write a bit to the NVRAM,
* read if GPIO0 input else write if GPIO0 output
*/
static void __init
S24C16_do_bit(ncr_slot *np, u_char *read_bit, u_char write_bit, u_char *gpreg)
{
S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
S24C16_set_bit(np, 0, gpreg, SET_CLK);
if (read_bit)
*read_bit = INB (nc_gpreg);
S24C16_set_bit(np, 0, gpreg, CLR_CLK);
S24C16_set_bit(np, 0, gpreg, CLR_BIT);
}
/*
* Output an ACK to the NVRAM after reading,
* change GPIO0 to output and when done back to an input
*/
static void __init
S24C16_write_ack(ncr_slot *np, u_char write_bit, u_char *gpreg, u_char *gpcntl)
{
OUTB (nc_gpcntl, *gpcntl & 0xfe);
S24C16_do_bit(np, 0, write_bit, gpreg);
OUTB (nc_gpcntl, *gpcntl);
}
/*
* Input an ACK from NVRAM after writing,
* change GPIO0 to input and when done back to an output
*/
static void __init
S24C16_read_ack(ncr_slot *np, u_char *read_bit, u_char *gpreg, u_char *gpcntl)
{
OUTB (nc_gpcntl, *gpcntl | 0x01);
S24C16_do_bit(np, read_bit, 1, gpreg);
OUTB (nc_gpcntl, *gpcntl);
}
/*
* WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
* GPIO0 must already be set as an output
*/
static void __init
S24C16_write_byte(ncr_slot *np, u_char *ack_data, u_char write_data,
u_char *gpreg, u_char *gpcntl)
{
int x;
for (x = 0; x < 8; x++)
S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
S24C16_read_ack(np, ack_data, gpreg, gpcntl);
}
/*
* READ a byte from the NVRAM and then send an ACK to say we have got it,
* GPIO0 must already be set as an input
*/
static void __init
S24C16_read_byte(ncr_slot *np, u_char *read_data, u_char ack_data,
u_char *gpreg, u_char *gpcntl)
{
int x;
u_char read_bit;
*read_data = 0;
for (x = 0; x < 8; x++) {
S24C16_do_bit(np, &read_bit, 1, gpreg);
*read_data |= ((read_bit & 0x01) << (7 - x));
}
S24C16_write_ack(np, ack_data, gpreg, gpcntl);
}
/*
* Read 'len' bytes starting at 'offset'.
*/
static int __init
sym_read_S24C16_nvram (ncr_slot *np, int offset, u_char *data, int len)
{
u_char gpcntl, gpreg;
u_char old_gpcntl, old_gpreg;
u_char ack_data;
int retv = 1;
int x;
/* save current state of GPCNTL and GPREG */
old_gpreg = INB (nc_gpreg);
old_gpcntl = INB (nc_gpcntl);
gpcntl = old_gpcntl & 0x1c;
/* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
OUTB (nc_gpreg, old_gpreg);
OUTB (nc_gpcntl, gpcntl);
/* this is to set NVRAM into a known state with GPIO0/1 both low */
gpreg = old_gpreg;
S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
/* now set NVRAM inactive with GPIO0/1 both high */
S24C16_stop(np, &gpreg);
/* activate NVRAM */
S24C16_start(np, &gpreg);
/* write device code and random address MSB */
S24C16_write_byte(np, &ack_data,
0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
if (ack_data & 0x01)
goto out;
/* write random address LSB */
S24C16_write_byte(np, &ack_data,
offset & 0xff, &gpreg, &gpcntl);
if (ack_data & 0x01)
goto out;
/* regenerate START state to set up for reading */
S24C16_start(np, &gpreg);
/* rewrite device code and address MSB with read bit set (lsb = 0x01) */
S24C16_write_byte(np, &ack_data,
0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
if (ack_data & 0x01)
goto out;
/* now set up GPIO0 for inputting data */
gpcntl |= 0x01;
OUTB (nc_gpcntl, gpcntl);
/* input all requested data - only part of total NVRAM */
for (x = 0; x < len; x++)
S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
/* finally put NVRAM back in inactive mode */
gpcntl &= 0xfe;
OUTB (nc_gpcntl, gpcntl);
S24C16_stop(np, &gpreg);
retv = 0;
out:
/* return GPIO0/1 to original states after having accessed NVRAM */
OUTB (nc_gpcntl, old_gpcntl);
OUTB (nc_gpreg, old_gpreg);
return retv;
}
#undef SET_BIT
#undef CLR_BIT
#undef SET_CLK
#undef CLR_CLK
/*
* Try reading Symbios NVRAM.
* Return 0 if OK.
*/
static int __init sym_read_Symbios_nvram (ncr_slot *np, Symbios_nvram *nvram)
{
static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
u_char *data = (u_char *) nvram;
int len = sizeof(*nvram);
u_short csum;
int x;
/* probe the 24c16 and read the SYMBIOS 24c16 area */
if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
return 1;
/* check valid NVRAM signature, verify byte count and checksum */
if (nvram->type != 0 ||
memcmp(nvram->trailer, Symbios_trailer, 6) ||
nvram->byte_count != len - 12)
return 1;
/* verify checksum */
for (x = 6, csum = 0; x < len - 6; x++)
csum += data[x];
if (csum != nvram->checksum)
return 1;
return 0;
}
/*
* 93C46 EEPROM reading.
*
* GPOI0 - data in
* GPIO1 - data out
* GPIO2 - clock
* GPIO4 - chip select
*
* Used by Tekram.
*/
/*
* Pulse clock bit in GPIO0
*/
static void __init T93C46_Clk(ncr_slot *np, u_char *gpreg)
{
OUTB (nc_gpreg, *gpreg | 0x04);
UDELAY (2);
OUTB (nc_gpreg, *gpreg);
}
/*
* Read bit from NVRAM
*/
static void __init T93C46_Read_Bit(ncr_slot *np, u_char *read_bit, u_char *gpreg)
{
UDELAY (2);
T93C46_Clk(np, gpreg);
*read_bit = INB (nc_gpreg);
}
/*
* Write bit to GPIO0
*/
static void __init T93C46_Write_Bit(ncr_slot *np, u_char write_bit, u_char *gpreg)
{
if (write_bit & 0x01)
*gpreg |= 0x02;
else
*gpreg &= 0xfd;
*gpreg |= 0x10;
OUTB (nc_gpreg, *gpreg);
UDELAY (2);
T93C46_Clk(np, gpreg);
}
/*
* Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
*/
static void __init T93C46_Stop(ncr_slot *np, u_char *gpreg)
{
*gpreg &= 0xef;
OUTB (nc_gpreg, *gpreg);
UDELAY (2);
T93C46_Clk(np, gpreg);
}
/*
* Send read command and address to NVRAM
*/
static void __init
T93C46_Send_Command(ncr_slot *np, u_short write_data,
u_char *read_bit, u_char *gpreg)
{
int x;
/* send 9 bits, start bit (1), command (2), address (6) */
for (x = 0; x < 9; x++)
T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
*read_bit = INB (nc_gpreg);
}
/*
* READ 2 bytes from the NVRAM
*/
static void __init
T93C46_Read_Word(ncr_slot *np, u_short *nvram_data, u_char *gpreg)
{
int x;
u_char read_bit;
*nvram_data = 0;
for (x = 0; x < 16; x++) {
T93C46_Read_Bit(np, &read_bit, gpreg);
if (read_bit & 0x01)
*nvram_data |= (0x01 << (15 - x));
else
*nvram_data &= ~(0x01 << (15 - x));
}
}
/*
* Read Tekram NvRAM data.
*/
static int __init
T93C46_Read_Data(ncr_slot *np, u_short *data,int len,u_char *gpreg)
{
u_char read_bit;
int x;
for (x = 0; x < len; x++) {
/* output read command and address */
T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
if (read_bit & 0x01)
return 1; /* Bad */
T93C46_Read_Word(np, &data[x], gpreg);
T93C46_Stop(np, gpreg);
}
return 0;
}
/*
* Try reading 93C46 Tekram NVRAM.
*/
static int __init
sym_read_T93C46_nvram (ncr_slot *np, Tekram_nvram *nvram)
{
u_char gpcntl, gpreg;
u_char old_gpcntl, old_gpreg;
int retv = 1;
/* save current state of GPCNTL and GPREG */
old_gpreg = INB (nc_gpreg);
old_gpcntl = INB (nc_gpcntl);
/* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
1/2/4 out */
gpreg = old_gpreg & 0xe9;
OUTB (nc_gpreg, gpreg);
gpcntl = (old_gpcntl & 0xe9) | 0x09;
OUTB (nc_gpcntl, gpcntl);
/* input all of NVRAM, 64 words */
retv = T93C46_Read_Data(np, (u_short *) nvram,
sizeof(*nvram) / sizeof(short), &gpreg);
/* return GPIO0/1/2/4 to original states after having accessed NVRAM */
OUTB (nc_gpcntl, old_gpcntl);
OUTB (nc_gpreg, old_gpreg);
return retv;
}
/*
* Try reading Tekram NVRAM.
* Return 0 if OK.
*/
static int __init
sym_read_Tekram_nvram (ncr_slot *np, u_short device_id, Tekram_nvram *nvram)
{
u_char *data = (u_char *) nvram;
int len = sizeof(*nvram);
u_short csum;
int x;
switch (device_id) {
case PCI_DEVICE_ID_NCR_53C885:
case PCI_DEVICE_ID_NCR_53C895:
case PCI_DEVICE_ID_NCR_53C896:
x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
data, len);
break;
case PCI_DEVICE_ID_NCR_53C875:
x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
data, len);
if (!x)
break;
default:
x = sym_read_T93C46_nvram(np, nvram);
break;
}
if (x)
return 1;
/* verify checksum */
for (x = 0, csum = 0; x < len - 1; x += 2)
csum += data[x] + (data[x+1] << 8);
if (csum != 0x1234)
return 1;
return 0;
}
#endif /* SCSI_NCR_NVRAM_SUPPORT */
/*===================================================================
**
** Detect and try to read SYMBIOS and TEKRAM NVRAM.
**
** Data can be used to order booting of boards.
**
** Data is saved in ncr_device structure if NVRAM found. This
** is then used to find drive boot order for ncr_attach().
**
** NVRAM data is passed to Scsi_Host_Template later during
** ncr_attach() for any device set up.
**
**===================================================================
*/
#ifdef SCSI_NCR_NVRAM_SUPPORT
static void __init ncr_get_nvram(struct ncr_device *devp, ncr_nvram *nvp)
{
devp->nvram = nvp;
if (!nvp)
return;
/*
** Get access to chip IO registers
*/
#ifdef SCSI_NCR_IOMAPPED
request_region(devp->slot.io_port, 128, NAME53C8XX);
devp->slot.base_io = devp->slot.io_port;
#else
devp->slot.reg =
(struct ncr_reg *) remap_pci_mem(devp->slot.base_c, 128);
if (!devp->slot.reg)
return;
#endif
/*
** Try to read SYMBIOS nvram.
** Try to read TEKRAM nvram if Symbios nvram not found.
*/
if (!sym_read_Symbios_nvram(&devp->slot, &nvp->data.Symbios))
nvp->type = SCSI_NCR_SYMBIOS_NVRAM;
else if (!sym_read_Tekram_nvram(&devp->slot, devp->chip.device_id,
&nvp->data.Tekram))
nvp->type = SCSI_NCR_TEKRAM_NVRAM;
else {
nvp->type = 0;
devp->nvram = 0;
}
/*
** Release access to chip IO registers
*/
#ifdef SCSI_NCR_IOMAPPED
release_region(devp->slot.base_io, 128);
#else
unmap_pci_mem((u_long) devp->slot.reg, 128ul);
#endif
}
/*===================================================================
**
** Display the content of NVRAM for debugging purpose.
**
**===================================================================
*/
#ifdef SCSI_NCR_DEBUG_NVRAM
static void __init ncr_display_Symbios_nvram(Symbios_nvram *nvram)
{
int i;
/* display Symbios nvram host data */
printk(KERN_DEBUG NAME53C8XX ": HOST ID=%d%s%s%s%s%s\n",
nvram->host_id & 0x0f,
(nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
(nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
(nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
(nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
(nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
/* display Symbios nvram drive data */
for (i = 0 ; i < 15 ; i++) {
struct Symbios_target *tn = &nvram->target[i];
printk(KERN_DEBUG NAME53C8XX
"-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
i,
(tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
(tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
(tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
tn->bus_width,
tn->sync_period / 4,
tn->timeout);
}
}
static u_char Tekram_boot_delay[7] __initdata = {3, 5, 10, 20, 30, 60, 120};
static void __init ncr_display_Tekram_nvram(Tekram_nvram *nvram)
{
int i, tags, boot_delay;
char *rem;
/* display Tekram nvram host data */
tags = 2 << nvram->max_tags_index;
boot_delay = 0;
if (nvram->boot_delay_index < 6)
boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
default:
case 0: rem = ""; break;
case 1: rem = " REMOVABLE=boot device"; break;
case 2: rem = " REMOVABLE=all"; break;
}
printk(KERN_DEBUG NAME53C8XX
": HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
nvram->host_id & 0x0f,
(nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
(nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES":"",
(nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
(nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
(nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
(nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
(nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
(nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
rem, boot_delay, tags);
/* display Tekram nvram drive data */
for (i = 0; i <= 15; i++) {
int sync, j;
struct Tekram_target *tn = &nvram->target[i];
j = tn->sync_index & 0xf;
sync = Tekram_sync[j];
printk(KERN_DEBUG NAME53C8XX "-%d:%s%s%s%s%s%s PERIOD=%d\n",
i,
(tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
(tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
(tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
(tn->flags & TEKRAM_START_CMD) ? " START" : "",
(tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
(tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
sync);
}
}
#endif /* SCSI_NCR_DEBUG_NVRAM */
#endif /* SCSI_NCR_NVRAM_SUPPORT */
/*===================================================================
**
** Utility routines that protperly return data through /proc FS.
......
drivers/scsi/sym53c8xx_defs.h
View file @ a7ed0dc0
......@@ -64,31 +64,9 @@
#ifndef SYM53C8XX_DEFS_H
#define SYM53C8XX_DEFS_H
/*
** Check supported Linux versions
*/
#include <linux/config.h>
/*
* NCR PQS/PDS special device support.
*/
#ifdef CONFIG_SCSI_NCR53C8XX_PQS_PDS
#define SCSI_NCR_PQS_PDS_SUPPORT
#endif
/*
* No more an option, enabled by default.
*/
#ifndef CONFIG_SCSI_NCR53C8XX_NO_NVRAM
# ifndef CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT
# define CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT
# endif
#endif
/*
** These options are not tunable from 'make config'
*/
/* These options are not tunable from 'make config' */
#define SCSI_NCR_PROC_INFO_SUPPORT
/*
......@@ -97,7 +75,6 @@
*/
#define SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT
#define SCSI_NCR_DEBUG_INFO_SUPPORT
#define SCSI_NCR_PCI_FIX_UP_SUPPORT
#ifdef SCSI_NCR_PROC_INFO_SUPPORT
# define SCSI_NCR_USER_COMMAND_SUPPORT
# define SCSI_NCR_USER_INFO_SUPPORT
......@@ -111,18 +88,6 @@
# define SCSI_NCR_ENABLE_INTEGRITY_CHECK
#endif
/*==========================================================
**
** nvram settings - #define SCSI_NCR_NVRAM_SUPPORT to enable
**
**==========================================================
*/
#ifdef CONFIG_SCSI_NCR53C8XX_NVRAM_DETECT
#define SCSI_NCR_NVRAM_SUPPORT
/* #define SCSI_NCR_DEBUG_NVRAM */
#endif
/* ---------------------------------------------------------------------
** Take into account kernel configured parameters.
** Most of these options can be overridden at startup by a command line.
......@@ -171,15 +136,6 @@
#define SCSI_NCR_SETUP_DEFAULT_TAGS (0)
#endif
/*
* Use normal IO if configured. Forced for alpha.
*/
#if defined(CONFIG_SCSI_NCR53C8XX_IOMAPPED)
#define SCSI_NCR_IOMAPPED
#elif defined(__alpha__)
#define SCSI_NCR_IOMAPPED
#endif
/*
* Immediate arbitration
*/
......@@ -331,8 +287,6 @@
#define SCSI_NCR_MAX_LUN (1)
#endif
#ifndef HOSTS_C
/*
** These simple macros limit expression involving
** kernel time values (jiffies) to some that have
......@@ -388,15 +342,6 @@
#define outw_raw outw
#define outl_raw outl
#if defined(__i386__) /* i386 implements full FLAT memory/MMIO model */
#define readb_raw(a) (*(volatile unsigned char *) (a))
#define readw_raw(a) (*(volatile unsigned short *) (a))
#define readl_raw(a) (*(volatile unsigned int *) (a))
#define writeb_raw(b,a) ((*(volatile unsigned char *) (a)) = (b))
#define writew_raw(b,a) ((*(volatile unsigned short *) (a)) = (b))
#define writel_raw(b,a) ((*(volatile unsigned int *) (a)) = (b))
#else /* Other little-endian */
#define readb_raw readb
#define readw_raw readw
#define readl_raw readl
......@@ -404,7 +349,6 @@
#define writew_raw writew
#define writel_raw writel
#endif
#endif
#if !defined(__hppa__) && !defined(__mips__)
......@@ -413,18 +357,6 @@
#endif
#endif
/*
* IA32 architecture does not reorder STORES and prevents
* LOADS from passing STORES. It is called `program order'
* by Intel and allows device drivers to deal with memory
* ordering by only ensuring that the code is not reordered
* by the compiler when ordering is required.
* Other architectures implement a weaker ordering that
* requires memory barriers (and also IO barriers when they
* make sense) to be used.
*/
#define MEMORY_BARRIER() mb()
......@@ -476,13 +408,6 @@
/*
* Access to the controller chip.
*
* If SCSI_NCR_IOMAPPED is defined, the driver will use
* normal IOs instead of the MEMORY MAPPED IO method
* recommended by PCI specifications.
* If all PCI bridges, host brigdes and architectures
* would have been correctly designed for PCI, this
* option would be useless.
*
* If the CPU and the NCR use same endian-ness addressing,
* no byte reordering is needed for accessing chip io
* registers. Functions suffixed by '_raw' are assumed
......@@ -493,42 +418,6 @@
* blah, ...
*/
#if defined(SCSI_NCR_IOMAPPED)
/*
* IO mapped only input / ouput
*/
#define INB_OFF(o) inb (np->base_io + ncr_offb(o))
#define OUTB_OFF(o, val) outb ((val), np->base_io + ncr_offb(o))
#if defined(__BIG_ENDIAN) && !defined(SCSI_NCR_BIG_ENDIAN)
#define INW_OFF(o) inw_l2b (np->base_io + ncr_offw(o))
#define INL_OFF(o) inl_l2b (np->base_io + (o))
#define OUTW_OFF(o, val) outw_b2l ((val), np->base_io + ncr_offw(o))
#define OUTL_OFF(o, val) outl_b2l ((val), np->base_io + (o))
#elif defined(__LITTLE_ENDIAN) && defined(SCSI_NCR_BIG_ENDIAN)
#define INW_OFF(o) inw_b2l (np->base_io + ncr_offw(o))
#define INL_OFF(o) inl_b2l (np->base_io + (o))
#define OUTW_OFF(o, val) outw_l2b ((val), np->base_io + ncr_offw(o))
#define OUTL_OFF(o, val) outl_l2b ((val), np->base_io + (o))
#else
#define INW_OFF(o) inw_raw (np->base_io + ncr_offw(o))
#define INL_OFF(o) inl_raw (np->base_io + (o))
#define OUTW_OFF(o, val) outw_raw ((val), np->base_io + ncr_offw(o))
#define OUTL_OFF(o, val) outl_raw ((val), np->base_io + (o))
#endif /* ENDIANs */
#else /* defined SCSI_NCR_IOMAPPED */
/*
* MEMORY mapped IO input / output
*/
......@@ -572,8 +461,6 @@
#endif
#endif /* defined SCSI_NCR_IOMAPPED */
#define INB(r) INB_OFF (offsetof(struct ncr_reg,r))
#define INW(r) INW_OFF (offsetof(struct ncr_reg,r))
#define INL(r) INL_OFF (offsetof(struct ncr_reg,r))
......@@ -611,86 +498,11 @@
} while (0)
/*
** NCR53C8XX Device Ids
*/
#ifndef PSEUDO_720_ID
#define PSEUDO_720_ID 0x5a00
#endif
#ifndef PCI_DEVICE_ID_NCR_53C810
#define PCI_DEVICE_ID_NCR_53C810 1
#endif
#ifndef PCI_DEVICE_ID_NCR_53C810AP
#define PCI_DEVICE_ID_NCR_53C810AP 5
#endif
#ifndef PCI_DEVICE_ID_NCR_53C815
#define PCI_DEVICE_ID_NCR_53C815 4
#endif
#ifndef PCI_DEVICE_ID_NCR_53C820
#define PCI_DEVICE_ID_NCR_53C820 2
#endif
#ifndef PCI_DEVICE_ID_NCR_53C825
#define PCI_DEVICE_ID_NCR_53C825 3
#endif
#ifndef PCI_DEVICE_ID_NCR_53C860
#define PCI_DEVICE_ID_NCR_53C860 6
#endif
#ifndef PCI_DEVICE_ID_NCR_53C875
#define PCI_DEVICE_ID_NCR_53C875 0xf
#endif
#ifndef PCI_DEVICE_ID_NCR_53C875J
#define PCI_DEVICE_ID_NCR_53C875J 0x8f
#endif
#ifndef PCI_DEVICE_ID_NCR_53C885
#define PCI_DEVICE_ID_NCR_53C885 0xd
#endif
#ifndef PCI_DEVICE_ID_NCR_53C895
#define PCI_DEVICE_ID_NCR_53C895 0xc
#endif
#ifndef PCI_DEVICE_ID_NCR_53C896
#define PCI_DEVICE_ID_NCR_53C896 0xb
#endif
#ifndef PCI_DEVICE_ID_NCR_53C895A
#define PCI_DEVICE_ID_NCR_53C895A 0x12
#endif
#ifndef PCI_DEVICE_ID_NCR_53C875A
#define PCI_DEVICE_ID_NCR_53C875A 0x13
#endif
#ifndef PCI_DEVICE_ID_NCR_53C1510D
#define PCI_DEVICE_ID_NCR_53C1510D 0xa
#endif
#ifndef PCI_DEVICE_ID_LSI_53C1010
#define PCI_DEVICE_ID_LSI_53C1010 0x20
#endif
#ifndef PCI_DEVICE_ID_LSI_53C1010_66
#define PCI_DEVICE_ID_LSI_53C1010_66 0x21
#endif
/*
** NCR53C8XX devices features table.
*/
typedef struct {
unsigned short device_id;
struct ncr_chip {
unsigned short revision_id;
char *name;
unsigned char burst_max; /* log-base-2 of max burst */
unsigned char offset_max;
unsigned char nr_divisor;
......@@ -698,7 +510,6 @@ typedef struct {
#define FE_LED0 (1<<0)
#define FE_WIDE (1<<1) /* Wide data transfers */
#define FE_ULTRA (1<<2) /* Ultra speed 20Mtrans/sec */
#define FE_ULTRA2 (1<<3) /* Ultra 2 - 40 Mtrans/sec */
#define FE_DBLR (1<<4) /* Clock doubler present */
#define FE_QUAD (1<<5) /* Clock quadrupler present */
#define FE_ERL (1<<6) /* Enable read line */
......@@ -717,7 +528,6 @@ typedef struct {
#define FE_NOPM (1<<19) /* Scripts handles phase mismatch */
#define FE_LEDC (1<<20) /* Hardware control of LED */
#define FE_DIFF (1<<21) /* Support Differential SCSI */
#define FE_ULTRA3 (1<<22) /* Ultra-3 80Mtrans/sec */
#define FE_66MHZ (1<<23) /* 66MHz PCI Support */
#define FE_DAC (1<<24) /* Support DAC cycles (64 bit addressing) */
#define FE_ISTAT1 (1<<25) /* Have ISTAT1, MBOX0, MBOX1 registers */
......@@ -727,116 +537,10 @@ typedef struct {
#define FE_EA (1<<29) /* 720: Enable Ack */
#define FE_CACHE_SET (FE_ERL|FE_CLSE|FE_WRIE|FE_ERMP)
#define FE_SCSI_SET (FE_WIDE|FE_ULTRA|FE_ULTRA2|FE_DBLR|FE_QUAD|F_CLK80)
#define FE_SCSI_SET (FE_WIDE|FE_ULTRA|FE_DBLR|FE_QUAD|F_CLK80)
#define FE_SPECIAL_SET (FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM)
} ncr_chip;
/*
** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 3.
** Memory Read transaction terminated by a retry followed by
** Memory Read Line command.
*/
#define FE_CACHE0_SET (FE_CACHE_SET & ~FE_ERL)
/*
** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 5.
** On paper, this errata is harmless. But it is a good reason for
** using a shorter programmed burst length (64 DWORDS instead of 128).
*/
#define SCSI_NCR_CHIP_TABLE \
{ \
{PSEUDO_720_ID, 0x0f, "720", 3, 8, 4, \
FE_WIDE|FE_DIFF|FE_EHP|FE_MUX|FE_EA} \
, \
{PCI_DEVICE_ID_NCR_53C810, 0x0f, "810", 4, 8, 4, \
FE_ERL} \
, \
{PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, \
FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF} \
, \
{PCI_DEVICE_ID_NCR_53C815, 0xff, "815", 4, 8, 4, \
FE_ERL|FE_BOF} \
, \
{PCI_DEVICE_ID_NCR_53C820, 0xff, "820", 4, 8, 4, \
FE_WIDE|FE_ERL} \
, \
{PCI_DEVICE_ID_NCR_53C825, 0x0f, "825", 4, 8, 4, \
FE_WIDE|FE_ERL|FE_BOF|FE_DIFF} \
, \
{PCI_DEVICE_ID_NCR_53C825, 0xff, "825a", 6, 8, 4, \
FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF} \
, \
{PCI_DEVICE_ID_NCR_53C860, 0xff, "860", 4, 8, 5, \
FE_ULTRA|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN} \
, \
{PCI_DEVICE_ID_NCR_53C875, 0x01, "875", 6, 16, 5, \
FE_WIDE|FE_ULTRA|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| \
FE_RAM|FE_DIFF|FE_VARCLK} \
, \
{PCI_DEVICE_ID_NCR_53C875, 0xff, "875", 6, 16, 5, \
FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| \
FE_RAM|FE_DIFF|FE_VARCLK} \
, \
{PCI_DEVICE_ID_NCR_53C875J,0xff, "875J", 6, 16, 5, \
FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| \
FE_RAM|FE_VARCLK} \
, \
{PCI_DEVICE_ID_NCR_53C885, 0xff, "885", 6, 16, 5, \
FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| \
FE_RAM|FE_DIFF|FE_VARCLK} \
, \
{PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, \
FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| \
FE_RAM} \
, \
{PCI_DEVICE_ID_NCR_53C896, 0xff, "896", 6, 31, 7, \
FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| \
FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_ISTAT1} \
, \
{PCI_DEVICE_ID_NCR_53C895A, 0xff, "895a", 6, 31, 7, \
FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| \
FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC} \
, \
{PCI_DEVICE_ID_NCR_53C875A, 0xff, "875a", 6, 31, 7, \
FE_WIDE|FE_ULTRA|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| \
FE_RAM|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC} \
, \
{PCI_DEVICE_ID_NCR_53C1510D, 0xff, "1510D", 7, 31, 7, \
FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| \
FE_RAM|FE_IO256} \
, \
{PCI_DEVICE_ID_LSI_53C1010, 0xff, "1010-33", 6, 62, 7, \
FE_WIDE|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_ISTAT1| \
FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_ULTRA3} \
, \
{PCI_DEVICE_ID_LSI_53C1010_66, 0xff, "1010-66", 6, 62, 7, \
FE_WIDE|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_ISTAT1| \
FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_ULTRA3| \
FE_66MHZ} \
}
};
/*
* List of supported NCR chip ids
*/
#define SCSI_NCR_CHIP_IDS \
{ \
PSEUDO_720_ID, \
PCI_DEVICE_ID_NCR_53C810, \
PCI_DEVICE_ID_NCR_53C815, \
PCI_DEVICE_ID_NCR_53C820, \
PCI_DEVICE_ID_NCR_53C825, \
PCI_DEVICE_ID_NCR_53C860, \
PCI_DEVICE_ID_NCR_53C875, \
PCI_DEVICE_ID_NCR_53C875J, \
PCI_DEVICE_ID_NCR_53C885, \
PCI_DEVICE_ID_NCR_53C895, \
PCI_DEVICE_ID_NCR_53C896, \
PCI_DEVICE_ID_NCR_53C895A, \
PCI_DEVICE_ID_NCR_53C1510D, \
PCI_DEVICE_ID_LSI_53C1010, \
PCI_DEVICE_ID_LSI_53C1010_66 \
}
/*
** Driver setup structure.
......@@ -846,30 +550,30 @@ typedef struct {
*/
#define SCSI_NCR_MAX_EXCLUDES 8
struct ncr_driver_setup {
u_char master_parity;
u_char scsi_parity;
u_char disconnection;
u_char special_features;
u_char force_sync_nego;
u_char reverse_probe;
u_char pci_fix_up;
u_char use_nvram;
u_char verbose;
u_char default_tags;
u_short default_sync;
u_short debug;
u_char burst_max;
u_char led_pin;
u_char max_wide;
u_char settle_delay;
u_char diff_support;
u_char irqm;
u_char bus_check;
u_char optimize;
u_char recovery;
u_char host_id;
u_short iarb;
u_long excludes[SCSI_NCR_MAX_EXCLUDES];
u8 master_parity;
u8 scsi_parity;
u8 disconnection;
u8 special_features;
u8 force_sync_nego;
u8 reverse_probe;
u8 pci_fix_up;
u8 use_nvram;
u8 verbose;
u8 default_tags;
u16 default_sync;
u16 debug;
u8 burst_max;
u8 led_pin;
u8 max_wide;
u8 settle_delay;
u8 diff_support;
u8 irqm;
u8 bus_check;
u8 optimize;
u8 recovery;
u8 host_id;
u16 iarb;
u32 excludes[SCSI_NCR_MAX_EXCLUDES];
char tag_ctrl[100];
};
......@@ -935,136 +639,6 @@ struct ncr_driver_setup {
255 \
}
#ifdef SCSI_NCR_NVRAM_SUPPORT
/*
** Symbios NvRAM data format
*/
#define SYMBIOS_NVRAM_SIZE 368
#define SYMBIOS_NVRAM_ADDRESS 0x100
struct Symbios_nvram {
/* Header 6 bytes */
u_short type; /* 0x0000 */
u_short byte_count; /* excluding header/trailer */
u_short checksum;
/* Controller set up 20 bytes */
u_char v_major; /* 0x00 */
u_char v_minor; /* 0x30 */
u32 boot_crc;
u_short flags;
#define SYMBIOS_SCAM_ENABLE (1)
#define SYMBIOS_PARITY_ENABLE (1<<1)
#define SYMBIOS_VERBOSE_MSGS (1<<2)
#define SYMBIOS_CHS_MAPPING (1<<3)
#define SYMBIOS_NO_NVRAM (1<<3) /* ??? */
u_short flags1;
#define SYMBIOS_SCAN_HI_LO (1)
u_short term_state;
#define SYMBIOS_TERM_CANT_PROGRAM (0)
#define SYMBIOS_TERM_ENABLED (1)
#define SYMBIOS_TERM_DISABLED (2)
u_short rmvbl_flags;
#define SYMBIOS_RMVBL_NO_SUPPORT (0)
#define SYMBIOS_RMVBL_BOOT_DEVICE (1)
#define SYMBIOS_RMVBL_MEDIA_INSTALLED (2)
u_char host_id;
u_char num_hba; /* 0x04 */
u_char num_devices; /* 0x10 */
u_char max_scam_devices; /* 0x04 */
u_char num_valid_scam_devives; /* 0x00 */
u_char rsvd;
/* Boot order 14 bytes * 4 */
struct Symbios_host{
u_short type; /* 4:8xx / 0:nok */
u_short device_id; /* PCI device id */
u_short vendor_id; /* PCI vendor id */
u_char bus_nr; /* PCI bus number */
u_char device_fn; /* PCI device/function number << 3*/
u_short word8;
u_short flags;
#define SYMBIOS_INIT_SCAN_AT_BOOT (1)
u_short io_port; /* PCI io_port address */
} host[4];
/* Targets 8 bytes * 16 */
struct Symbios_target {
u_char flags;
#define SYMBIOS_DISCONNECT_ENABLE (1)
#define SYMBIOS_SCAN_AT_BOOT_TIME (1<<1)
#define SYMBIOS_SCAN_LUNS (1<<2)
#define SYMBIOS_QUEUE_TAGS_ENABLED (1<<3)
u_char rsvd;
u_char bus_width; /* 0x08/0x10 */
u_char sync_offset;
u_short sync_period; /* 4*period factor */
u_short timeout;
} target[16];
/* Scam table 8 bytes * 4 */
struct Symbios_scam {
u_short id;
u_short method;
#define SYMBIOS_SCAM_DEFAULT_METHOD (0)
#define SYMBIOS_SCAM_DONT_ASSIGN (1)
#define SYMBIOS_SCAM_SET_SPECIFIC_ID (2)
#define SYMBIOS_SCAM_USE_ORDER_GIVEN (3)
u_short status;
#define SYMBIOS_SCAM_UNKNOWN (0)
#define SYMBIOS_SCAM_DEVICE_NOT_FOUND (1)
#define SYMBIOS_SCAM_ID_NOT_SET (2)
#define SYMBIOS_SCAM_ID_VALID (3)
u_char target_id;
u_char rsvd;
} scam[4];
u_char spare_devices[15*8];
u_char trailer[6]; /* 0xfe 0xfe 0x00 0x00 0x00 0x00 */
};
typedef struct Symbios_nvram Symbios_nvram;
typedef struct Symbios_host Symbios_host;
typedef struct Symbios_target Symbios_target;
typedef struct Symbios_scam Symbios_scam;
/*
** Tekram NvRAM data format.
*/
#define TEKRAM_NVRAM_SIZE 64
#define TEKRAM_93C46_NVRAM_ADDRESS 0
#define TEKRAM_24C16_NVRAM_ADDRESS 0x40
struct Tekram_nvram {
struct Tekram_target {
u_char flags;
#define TEKRAM_PARITY_CHECK (1)
#define TEKRAM_SYNC_NEGO (1<<1)
#define TEKRAM_DISCONNECT_ENABLE (1<<2)
#define TEKRAM_START_CMD (1<<3)
#define TEKRAM_TAGGED_COMMANDS (1<<4)
#define TEKRAM_WIDE_NEGO (1<<5)
u_char sync_index;
u_short word2;
} target[16];
u_char host_id;
u_char flags;
#define TEKRAM_MORE_THAN_2_DRIVES (1)
#define TEKRAM_DRIVES_SUP_1GB (1<<1)
#define TEKRAM_RESET_ON_POWER_ON (1<<2)
#define TEKRAM_ACTIVE_NEGATION (1<<3)
#define TEKRAM_IMMEDIATE_SEEK (1<<4)
#define TEKRAM_SCAN_LUNS (1<<5)
#define TEKRAM_REMOVABLE_FLAGS (3<<6) /* 0: disable; 1: boot device; 2:all */
u_char boot_delay_index;
u_char max_tags_index;
u_short flags1;
#define TEKRAM_F2_F6_ENABLED (1)
u_short spare[29];
};
typedef struct Tekram_nvram Tekram_nvram;
typedef struct Tekram_target Tekram_target;
#endif /* SCSI_NCR_NVRAM_SUPPORT */
/**************** ORIGINAL CONTENT of ncrreg.h from FreeBSD ******************/
/*-----------------------------------------------------------------
......@@ -1075,38 +649,38 @@ typedef struct Tekram_target Tekram_target;
*/
struct ncr_reg {
/*00*/ u_char nc_scntl0; /* full arb., ena parity, par->ATN */
/*00*/ u8 nc_scntl0; /* full arb., ena parity, par->ATN */
/*01*/ u_char nc_scntl1; /* no reset */
/*01*/ u8 nc_scntl1; /* no reset */
#define ISCON 0x10 /* connected to scsi */
#define CRST 0x08 /* force reset */
#define IARB 0x02 /* immediate arbitration */
/*02*/ u_char nc_scntl2; /* no disconnect expected */
/*02*/ u8 nc_scntl2; /* no disconnect expected */
#define SDU 0x80 /* cmd: disconnect will raise error */
#define CHM 0x40 /* sta: chained mode */
#define WSS 0x08 /* sta: wide scsi send [W]*/
#define WSR 0x01 /* sta: wide scsi received [W]*/
/*03*/ u_char nc_scntl3; /* cnf system clock dependent */
/*03*/ u8 nc_scntl3; /* cnf system clock dependent */
#define EWS 0x08 /* cmd: enable wide scsi [W]*/
#define ULTRA 0x80 /* cmd: ULTRA enable */
/* bits 0-2, 7 rsvd for C1010 */
/*04*/ u_char nc_scid; /* cnf host adapter scsi address */
/*04*/ u8 nc_scid; /* cnf host adapter scsi address */
#define RRE 0x40 /* r/w:e enable response to resel. */
#define SRE 0x20 /* r/w:e enable response to select */
/*05*/ u_char nc_sxfer; /* ### Sync speed and count */
/*05*/ u8 nc_sxfer; /* ### Sync speed and count */
/* bits 6-7 rsvd for C1010 */
/*06*/ u_char nc_sdid; /* ### Destination-ID */
/*06*/ u8 nc_sdid; /* ### Destination-ID */
/*07*/ u_char nc_gpreg; /* ??? IO-Pins */
/*07*/ u8 nc_gpreg; /* ??? IO-Pins */
/*08*/ u_char nc_sfbr; /* ### First byte in phase */
/*08*/ u8 nc_sfbr; /* ### First byte in phase */
/*09*/ u_char nc_socl;
/*09*/ u8 nc_socl;
#define CREQ 0x80 /* r/w: SCSI-REQ */
#define CACK 0x40 /* r/w: SCSI-ACK */
#define CBSY 0x20 /* r/w: SCSI-BSY */
......@@ -1116,11 +690,11 @@ struct ncr_reg {
#define CC_D 0x02 /* r/w: SCSI-C_D */
#define CI_O 0x01 /* r/w: SCSI-I_O */
/*0a*/ u_char nc_ssid;
/*0a*/ u8 nc_ssid;
/*0b*/ u_char nc_sbcl;
/*0b*/ u8 nc_sbcl;
/*0c*/ u_char nc_dstat;
/*0c*/ u8 nc_dstat;
#define DFE 0x80 /* sta: dma fifo empty */
#define MDPE 0x40 /* int: master data parity error */
#define BF 0x20 /* int: script: bus fault */
......@@ -1129,7 +703,7 @@ struct ncr_reg {
#define SIR 0x04 /* int: script: interrupt instruct. */
#define IID 0x01 /* int: script: illegal instruct. */
/*0d*/ u_char nc_sstat0;
/*0d*/ u8 nc_sstat0;
#define ILF 0x80 /* sta: data in SIDL register lsb */
#define ORF 0x40 /* sta: data in SODR register lsb */
#define OLF 0x20 /* sta: data in SODL register lsb */
......@@ -1139,22 +713,22 @@ struct ncr_reg {
#define IRST 0x02 /* sta: scsi reset signal */
#define SDP 0x01 /* sta: scsi parity signal */
/*0e*/ u_char nc_sstat1;
/*0e*/ u8 nc_sstat1;
#define FF3210 0xf0 /* sta: bytes in the scsi fifo */
/*0f*/ u_char nc_sstat2;
/*0f*/ u8 nc_sstat2;
#define ILF1 0x80 /* sta: data in SIDL register msb[W]*/
#define ORF1 0x40 /* sta: data in SODR register msb[W]*/
#define OLF1 0x20 /* sta: data in SODL register msb[W]*/
#define DM 0x04 /* sta: DIFFSENS mismatch (895/6 only) */
#define LDSC 0x02 /* sta: disconnect & reconnect */
/*10*/ u_char nc_dsa; /* --> Base page */
/*11*/ u_char nc_dsa1;
/*12*/ u_char nc_dsa2;
/*13*/ u_char nc_dsa3;
/*10*/ u8 nc_dsa; /* --> Base page */
/*11*/ u8 nc_dsa1;
/*12*/ u8 nc_dsa2;
/*13*/ u8 nc_dsa3;
/*14*/ u_char nc_istat; /* --> Main Command and status */
/*14*/ u8 nc_istat; /* --> Main Command and status */
#define CABRT 0x80 /* cmd: abort current operation */
#define SRST 0x40 /* mod: reset chip */
#define SIGP 0x20 /* r/w: message from host to ncr */
......@@ -1164,23 +738,23 @@ struct ncr_reg {
#define SIP 0x02 /* sta: scsi-interrupt */
#define DIP 0x01 /* sta: host/script interrupt */
/*15*/ u_char nc_istat1; /* 896 and later cores only */
/*15*/ u8 nc_istat1; /* 896 and later cores only */
#define FLSH 0x04 /* sta: chip is flushing */
#define SRUN 0x02 /* sta: scripts are running */
#define SIRQD 0x01 /* r/w: disable INT pin */
/*16*/ u_char nc_mbox0; /* 896 and later cores only */
/*17*/ u_char nc_mbox1; /* 896 and later cores only */
/*16*/ u8 nc_mbox0; /* 896 and later cores only */
/*17*/ u8 nc_mbox1; /* 896 and later cores only */
/*18*/ u_char nc_ctest0;
/*18*/ u8 nc_ctest0;
#define EHP 0x04 /* 720 even host parity */
/*19*/ u_char nc_ctest1;
/*19*/ u8 nc_ctest1;
/*1a*/ u_char nc_ctest2;
/*1a*/ u8 nc_ctest2;
#define CSIGP 0x40
/* bits 0-2,7 rsvd for C1010 */
/*1b*/ u_char nc_ctest3;
/*1b*/ u8 nc_ctest3;
#define FLF 0x08 /* cmd: flush dma fifo */
#define CLF 0x04 /* cmd: clear dma fifo */
#define FM 0x02 /* mod: fetch pin mode */
......@@ -1189,38 +763,38 @@ struct ncr_reg {
/*1c*/ u32 nc_temp; /* ### Temporary stack */
/*20*/ u_char nc_dfifo;
/*21*/ u_char nc_ctest4;
/*20*/ u8 nc_dfifo;
/*21*/ u8 nc_ctest4;
#define MUX 0x80 /* 720 host bus multiplex mode */
#define BDIS 0x80 /* mod: burst disable */
#define MPEE 0x08 /* mod: master parity error enable */
/*22*/ u_char nc_ctest5;
/*22*/ u8 nc_ctest5;
#define DFS 0x20 /* mod: dma fifo size */
/* bits 0-1, 3-7 rsvd for C1010 */
/*23*/ u_char nc_ctest6;
/*23*/ u8 nc_ctest6;
/*24*/ u32 nc_dbc; /* ### Byte count and command */
/*28*/ u32 nc_dnad; /* ### Next command register */
/*2c*/ u32 nc_dsp; /* --> Script Pointer */
/*30*/ u32 nc_dsps; /* --> Script pointer save/opcode#2 */
/*34*/ u_char nc_scratcha; /* Temporary register a */
/*35*/ u_char nc_scratcha1;
/*36*/ u_char nc_scratcha2;
/*37*/ u_char nc_scratcha3;
/*34*/ u8 nc_scratcha; /* Temporary register a */
/*35*/ u8 nc_scratcha1;
/*36*/ u8 nc_scratcha2;
/*37*/ u8 nc_scratcha3;
/*38*/ u_char nc_dmode;
/*38*/ u8 nc_dmode;
#define BL_2 0x80 /* mod: burst length shift value +2 */
#define BL_1 0x40 /* mod: burst length shift value +1 */
#define ERL 0x08 /* mod: enable read line */
#define ERMP 0x04 /* mod: enable read multiple */
#define BOF 0x02 /* mod: burst op code fetch */
/*39*/ u_char nc_dien;
/*3a*/ u_char nc_sbr;
/*39*/ u8 nc_dien;
/*3a*/ u8 nc_sbr;
/*3b*/ u_char nc_dcntl; /* --> Script execution control */
/*3b*/ u8 nc_dcntl; /* --> Script execution control */
#define CLSE 0x80 /* mod: cache line size enable */
#define PFF 0x40 /* cmd: pre-fetch flush */
#define PFEN 0x20 /* mod: pre-fetch enable */
......@@ -1234,8 +808,8 @@ struct ncr_reg {
/*3c*/ u32 nc_adder;
/*40*/ u_short nc_sien; /* -->: interrupt enable */
/*42*/ u_short nc_sist; /* <--: interrupt status */
/*40*/ u16 nc_sien; /* -->: interrupt enable */
/*42*/ u16 nc_sist; /* <--: interrupt status */
#define SBMC 0x1000/* sta: SCSI Bus Mode Change (895/6 only) */
#define STO 0x0400/* sta: timeout (select) */
#define GEN 0x0200/* sta: timeout (general) */
......@@ -1249,34 +823,34 @@ struct ncr_reg {
#define RST 0x02 /* sta: scsi bus reset detected */
#define PAR 0x01 /* sta: scsi parity error */
/*44*/ u_char nc_slpar;
/*45*/ u_char nc_swide;
/*46*/ u_char nc_macntl;
/*47*/ u_char nc_gpcntl;
/*48*/ u_char nc_stime0; /* cmd: timeout for select&handshake*/
/*49*/ u_char nc_stime1; /* cmd: timeout user defined */
/*4a*/ u_short nc_respid; /* sta: Reselect-IDs */
/*44*/ u8 nc_slpar;
/*45*/ u8 nc_swide;
/*46*/ u8 nc_macntl;
/*47*/ u8 nc_gpcntl;
/*48*/ u8 nc_stime0; /* cmd: timeout for select&handshake*/
/*49*/ u8 nc_stime1; /* cmd: timeout user defined */
/*4a*/ u16 nc_respid; /* sta: Reselect-IDs */
/*4c*/ u_char nc_stest0;
/*4c*/ u8 nc_stest0;
/*4d*/ u_char nc_stest1;
/*4d*/ u8 nc_stest1;
#define SCLK 0x80 /* Use the PCI clock as SCSI clock */
#define DBLEN 0x08 /* clock doubler running */
#define DBLSEL 0x04 /* clock doubler selected */
/*4e*/ u_char nc_stest2;
/*4e*/ u8 nc_stest2;
#define ROF 0x40 /* reset scsi offset (after gross error!) */
#define DIF 0x20 /* 720 SCSI differential mode */
#define EXT 0x02 /* extended filtering */
/*4f*/ u_char nc_stest3;
/*4f*/ u8 nc_stest3;
#define TE 0x80 /* c: tolerAnt enable */
#define HSC 0x20 /* c: Halt SCSI Clock */
#define CSF 0x02 /* c: clear scsi fifo */
/*50*/ u_short nc_sidl; /* Lowlevel: latched from scsi data */
/*52*/ u_char nc_stest4;
/*50*/ u16 nc_sidl; /* Lowlevel: latched from scsi data */
/*52*/ u8 nc_stest4;
#define SMODE 0xc0 /* SCSI bus mode (895/6 only) */
#define SMODE_HVD 0x40 /* High Voltage Differential */
#define SMODE_SE 0x80 /* Single Ended */
......@@ -1284,9 +858,9 @@ struct ncr_reg {
#define LCKFRQ 0x20 /* Frequency Lock (895/6 only) */
/* bits 0-5 rsvd for C1010 */
/*53*/ u_char nc_53_;
/*54*/ u_short nc_sodl; /* Lowlevel: data out to scsi data */
/*56*/ u_char nc_ccntl0; /* Chip Control 0 (896) */
/*53*/ u8 nc_53_;
/*54*/ u16 nc_sodl; /* Lowlevel: data out to scsi data */
/*56*/ u8 nc_ccntl0; /* Chip Control 0 (896) */
#define ENPMJ 0x80 /* Enable Phase Mismatch Jump */
#define PMJCTL 0x40 /* Phase Mismatch Jump Control */
#define ENNDJ 0x20 /* Enable Non Data PM Jump */
......@@ -1294,7 +868,7 @@ struct ncr_reg {
#define DILS 0x02 /* Disable Internal Load/Store */
#define DPR 0x01 /* Disable Pipe Req */
/*57*/ u_char nc_ccntl1; /* Chip Control 1 (896) */
/*57*/ u8 nc_ccntl1; /* Chip Control 1 (896) */
#define ZMOD 0x80 /* High Impedance Mode */
#define DIC 0x10 /* Disable Internal Cycles */
#define DDAC 0x08 /* Disable Dual Address Cycle */
......@@ -1302,15 +876,15 @@ struct ncr_reg {
#define EXTIBMV 0x02 /* Enable 64-bit Table Ind. BMOV */
#define EXDBMV 0x01 /* Enable 64-bit Direct BMOV */
/*58*/ u_short nc_sbdl; /* Lowlevel: data from scsi data */
/*5a*/ u_short nc_5a_;
/*58*/ u16 nc_sbdl; /* Lowlevel: data from scsi data */
/*5a*/ u16 nc_5a_;
/*5c*/ u_char nc_scr0; /* Working register B */
/*5d*/ u_char nc_scr1; /* */
/*5e*/ u_char nc_scr2; /* */
/*5f*/ u_char nc_scr3; /* */
/*5c*/ u8 nc_scr0; /* Working register B */
/*5d*/ u8 nc_scr1; /* */
/*5e*/ u8 nc_scr2; /* */
/*5f*/ u8 nc_scr3; /* */
/*60*/ u_char nc_scrx[64]; /* Working register C-R */
/*60*/ u8 nc_scrx[64]; /* Working register C-R */
/*a0*/ u32 nc_mmrs; /* Memory Move Read Selector */
/*a4*/ u32 nc_mmws; /* Memory Move Write Selector */
/*a8*/ u32 nc_sfs; /* Script Fetch Selector */
......@@ -1318,7 +892,7 @@ struct ncr_reg {
/*b0*/ u32 nc_sbms; /* Static Block Move Selector */
/*b4*/ u32 nc_dbms; /* Dynamic Block Move Selector */
/*b8*/ u32 nc_dnad64; /* DMA Next Address 64 */
/*bc*/ u_short nc_scntl4; /* C1010 only */
/*bc*/ u16 nc_scntl4; /* C1010 only */
#define U3EN 0x80 /* Enable Ultra 3 */
#define AIPEN 0x40 /* Allow check upper byte lanes */
#define XCLKH_DT 0x08 /* Extra clock of data hold on DT
......@@ -1326,37 +900,37 @@ struct ncr_reg {
#define XCLKH_ST 0x04 /* Extra clock of data hold on ST
transfer edge */
/*be*/ u_char nc_aipcntl0; /* Epat Control 1 C1010 only */
/*bf*/ u_char nc_aipcntl1; /* AIP Control C1010_66 Only */
/*be*/ u8 nc_aipcntl0; /* Epat Control 1 C1010 only */
/*bf*/ u8 nc_aipcntl1; /* AIP Control C1010_66 Only */
/*c0*/ u32 nc_pmjad1; /* Phase Mismatch Jump Address 1 */
/*c4*/ u32 nc_pmjad2; /* Phase Mismatch Jump Address 2 */
/*c8*/ u_char nc_rbc; /* Remaining Byte Count */
/*c9*/ u_char nc_rbc1; /* */
/*ca*/ u_char nc_rbc2; /* */
/*cb*/ u_char nc_rbc3; /* */
/*cc*/ u_char nc_ua; /* Updated Address */
/*cd*/ u_char nc_ua1; /* */
/*ce*/ u_char nc_ua2; /* */
/*cf*/ u_char nc_ua3; /* */
/*c8*/ u8 nc_rbc; /* Remaining Byte Count */
/*c9*/ u8 nc_rbc1; /* */
/*ca*/ u8 nc_rbc2; /* */
/*cb*/ u8 nc_rbc3; /* */
/*cc*/ u8 nc_ua; /* Updated Address */
/*cd*/ u8 nc_ua1; /* */
/*ce*/ u8 nc_ua2; /* */
/*cf*/ u8 nc_ua3; /* */
/*d0*/ u32 nc_esa; /* Entry Storage Address */
/*d4*/ u_char nc_ia; /* Instruction Address */
/*d5*/ u_char nc_ia1;
/*d6*/ u_char nc_ia2;
/*d7*/ u_char nc_ia3;
/*d4*/ u8 nc_ia; /* Instruction Address */
/*d5*/ u8 nc_ia1;
/*d6*/ u8 nc_ia2;
/*d7*/ u8 nc_ia3;
/*d8*/ u32 nc_sbc; /* SCSI Byte Count (3 bytes only) */
/*dc*/ u32 nc_csbc; /* Cumulative SCSI Byte Count */
/* Following for C1010 only */
/*e0*/ u_short nc_crcpad; /* CRC Value */
/*e2*/ u_char nc_crccntl0; /* CRC control register */
/*e0*/ u16 nc_crcpad; /* CRC Value */
/*e2*/ u8 nc_crccntl0; /* CRC control register */
#define SNDCRC 0x10 /* Send CRC Request */
/*e3*/ u_char nc_crccntl1; /* CRC control register */
/*e3*/ u8 nc_crccntl1; /* CRC control register */
/*e4*/ u32 nc_crcdata; /* CRC data register */
/*e8*/ u32 nc_e8_; /* rsvd */
/*ec*/ u32 nc_ec_; /* rsvd */
/*f0*/ u_short nc_dfbc; /* DMA FIFO byte count */
/*f0*/ u16 nc_dfbc; /* DMA FIFO byte count */
};
......@@ -1449,17 +1023,17 @@ struct scr_tblmove {
#ifdef SCSI_NCR_BIG_ENDIAN
struct scr_tblsel {
u_char sel_scntl3;
u_char sel_id;
u_char sel_sxfer;
u_char sel_scntl4;
u8 sel_scntl3;
u8 sel_id;
u8 sel_sxfer;
u8 sel_scntl4;
};
#else
struct scr_tblsel {
u_char sel_scntl4;
u_char sel_sxfer;
u_char sel_id;
u_char sel_scntl3;
u8 sel_scntl4;
u8 sel_sxfer;
u8 sel_id;
u8 sel_scntl3;
};
#endif
......@@ -1763,6 +1337,4 @@ struct scr_tblsel {
* End of ncrreg from FreeBSD
*/
#endif /* !defined HOSTS_C */
#endif /* defined SYM53C8XX_DEFS_H */
drivers/scsi/zalon.c
View file @ a7ed0dc0
......@@ -4,27 +4,13 @@
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/stat.h>
#include <linux/mm.h>
#include <linux/blkdev.h>
#include <linux/sched.h>
#include <linux/version.h>
#include <linux/config.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <scsi/scsicam.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <linux/types.h>
#include <asm/hardware.h>
#include <asm/delay.h>
#include <asm/io.h>
#include "../parisc/gsc.h"
#include "scsi.h"
#include <scsi/scsi_host.h>
#include "ncr53c8xx.h"
......@@ -50,10 +36,8 @@ MODULE_LICENSE("GPL");
#define CMD_RESET 5
static ncr_chip zalon720_chip __initdata = {
.device_id = PSEUDO_720_ID,
static struct ncr_chip zalon720_chip __initdata = {
.revision_id = 0x0f,
.name = "720",
.burst_max = 3,
.offset_max = 8,
.nr_divisor = 4,
......@@ -93,7 +77,7 @@ lasi_scsi_clock(void * hpa, int defaultclock)
}
#endif
static Scsi_Host_Template zalon7xx_template = {
static struct scsi_host_template zalon7xx_template = {
.module = THIS_MODULE,
.proc_name = "zalon7xx",
};
......
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