Commit a8d331b7 authored by Nicolas Pitre's avatar Nicolas Pitre Committed by Russell King

[ARM PATCH] 2109/1: fix PCMCIA on Mainstone/PXA270

Patch from Nicolas Pitre

Let's move GPIO setup into the board specific hw init functions.

The PXA2xx often has many different GPIOs that can be used for
a given alternate function and the good one to use is hardware
dependent.  For example, Lubbock and Mainstone are not using all
the same GPIOs for PCMCIA signals.

Signed-off-by: Nicolas Pitre 
parent ef565c19
No related merge requests found
...@@ -178,39 +178,6 @@ int pxa2xx_drv_pcmcia_probe(struct device *dev) ...@@ -178,39 +178,6 @@ int pxa2xx_drv_pcmcia_probe(struct device *dev)
first = ops->first; first = ops->first;
nr = ops->nr; nr = ops->nr;
/* Setup GPIOs for PCMCIA/CF alternate function mode.
*
* It would be nice if set_GPIO_mode included support
* for driving GPIO outputs to default high/low state
* before programming GPIOs as outputs. Setting GPIO
* outputs to default high/low state via GPSR/GPCR
* before defining them as outputs should reduce
* the possibility of glitching outputs during GPIO
* setup. This of course assumes external terminators
* are present to hold GPIOs in a defined state.
*
* In the meantime, setup default state of GPIO
* outputs before we enable them as outputs.
*/
GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
GPIO_bit(GPIO49_nPWE) |
GPIO_bit(GPIO50_nPIOR) |
GPIO_bit(GPIO51_nPIOW) |
GPIO_bit(GPIO52_nPCE_1) |
GPIO_bit(GPIO53_nPCE_2);
pxa_gpio_mode(GPIO48_nPOE_MD);
pxa_gpio_mode(GPIO49_nPWE_MD);
pxa_gpio_mode(GPIO50_nPIOR_MD);
pxa_gpio_mode(GPIO51_nPIOW_MD);
pxa_gpio_mode(GPIO52_nPCE_1_MD);
pxa_gpio_mode(GPIO53_nPCE_2_MD);
pxa_gpio_mode(GPIO54_pSKTSEL_MD); /* REVISIT: s/b dependent on num sockets */
pxa_gpio_mode(GPIO55_nPREG_MD);
pxa_gpio_mode(GPIO56_nPWAIT_MD);
pxa_gpio_mode(GPIO57_nIOIS16_MD);
/* Provide our PXA2xx specific timing routines. */ /* Provide our PXA2xx specific timing routines. */
ops->set_timing = pxa2xx_pcmcia_set_timing; ops->set_timing = pxa2xx_pcmcia_set_timing;
#ifdef CONFIG_CPU_FREQ #ifdef CONFIG_CPU_FREQ
......
...@@ -29,6 +29,35 @@ ...@@ -29,6 +29,35 @@
#include "sa1111_generic.h" #include "sa1111_generic.h"
static int
lubbock_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
{
/*
* Setup default state of GPIO outputs
* before we enable them as outputs.
*/
GPSR(GPIO48_nPOE) =
GPIO_bit(GPIO48_nPOE) |
GPIO_bit(GPIO49_nPWE) |
GPIO_bit(GPIO50_nPIOR) |
GPIO_bit(GPIO51_nPIOW) |
GPIO_bit(GPIO52_nPCE_1) |
GPIO_bit(GPIO53_nPCE_2);
pxa_gpio_mode(GPIO48_nPOE_MD);
pxa_gpio_mode(GPIO49_nPWE_MD);
pxa_gpio_mode(GPIO50_nPIOR_MD);
pxa_gpio_mode(GPIO51_nPIOW_MD);
pxa_gpio_mode(GPIO52_nPCE_1_MD);
pxa_gpio_mode(GPIO53_nPCE_2_MD);
pxa_gpio_mode(GPIO54_pSKTSEL_MD);
pxa_gpio_mode(GPIO55_nPREG_MD);
pxa_gpio_mode(GPIO56_nPWAIT_MD);
pxa_gpio_mode(GPIO57_nIOIS16_MD);
return sa1111_pcmcia_hw_init(skt);
}
static int static int
lubbock_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, lubbock_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
const socket_state_t *state) const socket_state_t *state)
...@@ -201,7 +230,7 @@ lubbock_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, ...@@ -201,7 +230,7 @@ lubbock_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
static struct pcmcia_low_level lubbock_pcmcia_ops = { static struct pcmcia_low_level lubbock_pcmcia_ops = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.hw_init = sa1111_pcmcia_hw_init, .hw_init = lubbock_pcmcia_hw_init,
.hw_shutdown = sa1111_pcmcia_hw_shutdown, .hw_shutdown = sa1111_pcmcia_hw_shutdown,
.socket_state = sa1111_pcmcia_socket_state, .socket_state = sa1111_pcmcia_socket_state,
.configure_socket = lubbock_pcmcia_configure_socket, .configure_socket = lubbock_pcmcia_configure_socket,
......
...@@ -38,6 +38,29 @@ static struct pcmcia_irqs irqs[] = { ...@@ -38,6 +38,29 @@ static struct pcmcia_irqs irqs[] = {
static int mst_pcmcia_hw_init(struct soc_pcmcia_socket *skt) static int mst_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
{ {
/*
* Setup default state of GPIO outputs
* before we enable them as outputs.
*/
GPSR(GPIO48_nPOE) =
GPIO_bit(GPIO48_nPOE) |
GPIO_bit(GPIO49_nPWE) |
GPIO_bit(GPIO50_nPIOR) |
GPIO_bit(GPIO51_nPIOW) |
GPIO_bit(GPIO85_nPCE_1) |
GPIO_bit(GPIO54_nPCE_2);
pxa_gpio_mode(GPIO48_nPOE_MD);
pxa_gpio_mode(GPIO49_nPWE_MD);
pxa_gpio_mode(GPIO50_nPIOR_MD);
pxa_gpio_mode(GPIO51_nPIOW_MD);
pxa_gpio_mode(GPIO85_nPCE_1_MD);
pxa_gpio_mode(GPIO54_nPCE_2_MD);
pxa_gpio_mode(GPIO79_pSKTSEL_MD);
pxa_gpio_mode(GPIO55_nPREG_MD);
pxa_gpio_mode(GPIO56_nPWAIT_MD);
pxa_gpio_mode(GPIO57_nIOIS16_MD);
skt->irq = (skt->nr == 0) ? MAINSTONE_S0_IRQ : MAINSTONE_S1_IRQ; skt->irq = (skt->nr == 0) ? MAINSTONE_S0_IRQ : MAINSTONE_S1_IRQ;
return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs)); return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
} }
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment