Commit a950cb74 authored by Linus Walleij's avatar Linus Walleij

pinctrl/abx500: adjust offset for get_mode()

The set_mode() and get_mode() functions in the abx500 were
not mirrored, leading to the wrong GPIO control bits being
read out.

Cc: Lee Jones <lee.jones@linaro.org>
Reported-by: default avatarPatrice Chotard <patrice.chotard@st.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent f30a3839
...@@ -401,6 +401,8 @@ static u8 abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, ...@@ -401,6 +401,8 @@ static u8 abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
bool alt_bit2; bool alt_bit2;
struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
struct alternate_functions af = pct->soc->alternate_functions[gpio]; struct alternate_functions af = pct->soc->alternate_functions[gpio];
/* on ABx5xx, there is no GPIO0, so adjust the offset */
unsigned offset = gpio - 1;
/* /*
* if gpiosel_bit is set to unused, * if gpiosel_bit is set to unused,
...@@ -410,7 +412,7 @@ static u8 abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, ...@@ -410,7 +412,7 @@ static u8 abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
return ABX500_DEFAULT; return ABX500_DEFAULT;
/* read GpioSelx register */ /* read GpioSelx register */
abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (gpio / 8), abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
af.gpiosel_bit, &bit_mode); af.gpiosel_bit, &bit_mode);
mode = bit_mode; mode = bit_mode;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment