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Commit ad1987d6 authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Kalle Valo
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brcmsmac: reindent split functions 

In the previous commit I left the indentation alone to help reviewing
the patch, this one now runs the three new functions through 'indent -kr -8'
with some manual fixups to avoid silliness.

No changes other than whitespace are intended here.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarArend van Spriel <arend.vanspriel@broadcom.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
parent 0425f079
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Showing with 697 additions and 810 deletions
drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c
View file @ ad1987d6
......@@ -16074,7 +16074,8 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
NPHY_REV3_RFSEQ_CMD_INT_PA_PU,
NPHY_REV3_RFSEQ_CMD_END
};
static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };
static const u8 rfseq_rx2tx_dlys_rev3_ipa[] =
{ 8, 6, 6, 4, 4, 16, 43, 1, 1 };
static const u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f };
u32 leg_data_weights;
u8 chan_freq_range = 0;
......@@ -16155,8 +16156,7 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
1, 0, 32, &leg_data_weights);
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ,
2, 0x15e, 16,
rfseq_rx2tx_dacbufpu_rev7);
2, 0x15e, 16, rfseq_rx2tx_dacbufpu_rev7);
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x16e, 16,
rfseq_rx2tx_dacbufpu_rev7);
......@@ -16164,7 +16164,8 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX,
rfseq_rx2tx_events_rev3_ipa,
rfseq_rx2tx_dlys_rev3_ipa,
ARRAY_SIZE(rfseq_rx2tx_events_rev3_ipa));
ARRAY_SIZE
(rfseq_rx2tx_events_rev3_ipa));
mod_phy_reg(pi, 0x299, (0x3 << 14), (0x1 << 14));
mod_phy_reg(pi, 0x29d, (0x3 << 14), (0x1 << 14));
......@@ -16181,13 +16182,9 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
|| (pi->pubpi.radiorev == 8)) {
rccal_bcap_val =
read_radio_reg(
pi,
RADIO_2057_RCCAL_BCAP_VAL);
read_radio_reg(pi, RADIO_2057_RCCAL_BCAP_VAL);
rccal_scap_val =
read_radio_reg(
pi,
RADIO_2057_RCCAL_SCAP_VAL);
read_radio_reg(pi, RADIO_2057_RCCAL_SCAP_VAL);
rccal_tx20_11b_bcap = rccal_bcap_val;
rccal_tx20_11b_scap = rccal_scap_val;
......@@ -16232,13 +16229,9 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
tx_lpf_bw_ofdm_40mhz = 3;
rccal_bcap_val =
read_radio_reg(
pi,
RADIO_2057_RCCAL_BCAP_VAL);
read_radio_reg(pi, RADIO_2057_RCCAL_BCAP_VAL);
rccal_scap_val =
read_radio_reg(
pi,
RADIO_2057_RCCAL_SCAP_VAL);
read_radio_reg(pi, RADIO_2057_RCCAL_SCAP_VAL);
rccal_tx20_11b_bcap = rccal_bcap_val;
rccal_tx20_11b_scap = rccal_scap_val;
......@@ -16256,80 +16249,49 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
rx2tx_lpf_rc_lut_tx20_11b =
(rccal_tx20_11b_bcap << 8) |
(rccal_tx20_11b_scap << 3) |
tx_lpf_bw_11b;
(rccal_tx20_11b_scap << 3) | tx_lpf_bw_11b;
rx2tx_lpf_rc_lut_tx20_11n =
(rccal_tx20_11n_bcap << 8) |
(rccal_tx20_11n_scap << 3) |
tx_lpf_bw_ofdm_20mhz;
(rccal_tx20_11n_scap << 3) | tx_lpf_bw_ofdm_20mhz;
rx2tx_lpf_rc_lut_tx40_11n =
(rccal_tx40_11n_bcap << 8) |
(rccal_tx40_11n_scap << 3) |
tx_lpf_bw_ofdm_40mhz;
(rccal_tx40_11n_scap << 3) | tx_lpf_bw_ofdm_40mhz;
for (coreNum = 0; coreNum <= 1; coreNum++) {
wlc_phy_table_write_nphy(
pi, NPHY_TBL_ID_RFSEQ,
1,
0x152 + coreNum * 0x10,
16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1,
0x152 + coreNum * 0x10, 16,
&rx2tx_lpf_rc_lut_tx20_11b);
wlc_phy_table_write_nphy(
pi, NPHY_TBL_ID_RFSEQ,
1,
0x153 + coreNum * 0x10,
16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1,
0x153 + coreNum * 0x10, 16,
&rx2tx_lpf_rc_lut_tx20_11n);
wlc_phy_table_write_nphy(
pi, NPHY_TBL_ID_RFSEQ,
1,
0x154 + coreNum * 0x10,
16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1,
0x154 + coreNum * 0x10, 16,
&rx2tx_lpf_rc_lut_tx20_11n);
wlc_phy_table_write_nphy(
pi, NPHY_TBL_ID_RFSEQ,
1,
0x155 + coreNum * 0x10,
16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1,
0x155 + coreNum * 0x10, 16,
&rx2tx_lpf_rc_lut_tx40_11n);
wlc_phy_table_write_nphy(
pi, NPHY_TBL_ID_RFSEQ,
1,
0x156 + coreNum * 0x10,
16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1,
0x156 + coreNum * 0x10, 16,
&rx2tx_lpf_rc_lut_tx40_11n);
wlc_phy_table_write_nphy(
pi, NPHY_TBL_ID_RFSEQ,
1,
0x157 + coreNum * 0x10,
16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1,
0x157 + coreNum * 0x10, 16,
&rx2tx_lpf_rc_lut_tx40_11n);
wlc_phy_table_write_nphy(
pi, NPHY_TBL_ID_RFSEQ,
1,
0x158 + coreNum * 0x10,
16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1,
0x158 + coreNum * 0x10, 16,
&rx2tx_lpf_rc_lut_tx40_11n);
wlc_phy_table_write_nphy(
pi, NPHY_TBL_ID_RFSEQ,
1,
0x159 + coreNum * 0x10,
16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1,
0x159 + coreNum * 0x10, 16,
&rx2tx_lpf_rc_lut_tx40_11n);
}
wlc_phy_rfctrl_override_nphy_rev7(
pi, (0x1 << 4),
1, 0x3, 0,
wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 1, 0x3, 0,
NPHY_REV7_RFCTRLOVERRIDE_ID2);
}
write_phy_reg(pi, 0x32f, 0x3);
if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6))
wlc_phy_rfctrl_override_nphy_rev7(
pi, (0x1 << 2),
1, 0x3, 0,
wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 0x3, 0,
NPHY_REV7_RFCTRLOVERRIDE_ID0);
if ((pi->pubpi.radiorev == 3) || (pi->pubpi.radiorev == 4) ||
......@@ -16339,17 +16301,11 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
ipalvlshift_3p3_war_en = 1;
if (ipalvlshift_3p3_war_en) {
write_radio_reg(pi, RADIO_2057_GPAIO_CONFIG,
0x5);
write_radio_reg(pi, RADIO_2057_GPAIO_SEL1,
0x30);
write_radio_reg(pi, RADIO_2057_GPAIO_CONFIG, 0x5);
write_radio_reg(pi, RADIO_2057_GPAIO_SEL1, 0x30);
write_radio_reg(pi, RADIO_2057_GPAIO_SEL0, 0x0);
or_radio_reg(pi,
RADIO_2057_RXTXBIAS_CONFIG_CORE0,
0x1);
or_radio_reg(pi,
RADIO_2057_RXTXBIAS_CONFIG_CORE1,
0x1);
or_radio_reg(pi, RADIO_2057_RXTXBIAS_CONFIG_CORE0, 0x1);
or_radio_reg(pi, RADIO_2057_RXTXBIAS_CONFIG_CORE1, 0x1);
ipa2g_mainbias = 0x1f;
......@@ -16390,17 +16346,14 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
for (coreNum = 0; coreNum <= 1; coreNum++) {
if (txgm_idac_bleed != 0)
WRITE_RADIO_REG4(
pi, RADIO_2057,
WRITE_RADIO_REG4(pi, RADIO_2057,
CORE, coreNum,
TXGM_IDAC_BLEED,
txgm_idac_bleed);
}
if (pi->pubpi.radiorev == 5) {
for (coreNum = 0; coreNum <= 1;
coreNum++) {
for (coreNum = 0; coreNum <= 1; coreNum++) {
WRITE_RADIO_REG4(pi, RADIO_2057,
CORE, coreNum,
IPA2G_CASCONV,
......@@ -16409,8 +16362,7 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
CORE, coreNum,
IPA2G_IMAIN,
0x1f);
WRITE_RADIO_REG4(
pi, RADIO_2057,
WRITE_RADIO_REG4(pi, RADIO_2057,
CORE, coreNum,
IPA2G_BIAS_FILTER,
0xee);
......@@ -16418,72 +16370,55 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
CORE, coreNum,
PAD2G_IDACS,
0x8a);
WRITE_RADIO_REG4(
pi, RADIO_2057,
WRITE_RADIO_REG4(pi, RADIO_2057,
CORE, coreNum,
PAD_BIAS_FILTER_BWS,
0x3e);
}
} else if ((pi->pubpi.radiorev == 7) ||
(pi->pubpi.radiorev == 8)) {
} else if ((pi->pubpi.radiorev == 7)
|| (pi->pubpi.radiorev == 8)) {
if (CHSPEC_IS40(pi->radio_chanspec) ==
0) {
WRITE_RADIO_REG4(pi, RADIO_2057,
CORE, 0,
IPA2G_IMAIN,
0x14);
WRITE_RADIO_REG4(pi, RADIO_2057,
CORE, 1,
IPA2G_IMAIN,
0x12);
if (CHSPEC_IS40(pi->radio_chanspec) == 0) {
WRITE_RADIO_REG4(pi, RADIO_2057, CORE,
0, IPA2G_IMAIN, 0x14);
WRITE_RADIO_REG4(pi, RADIO_2057, CORE,
1, IPA2G_IMAIN, 0x12);
} else {
WRITE_RADIO_REG4(pi, RADIO_2057,
CORE, 0,
IPA2G_IMAIN,
0x16);
WRITE_RADIO_REG4(pi, RADIO_2057,
CORE, 1,
IPA2G_IMAIN,
0x16);
WRITE_RADIO_REG4(pi, RADIO_2057, CORE,
0, IPA2G_IMAIN, 0x16);
WRITE_RADIO_REG4(pi, RADIO_2057, CORE,
1, IPA2G_IMAIN, 0x16);
}
}
} else {
freq = CHAN5G_FREQ(CHSPEC_CHANNEL(
pi->radio_chanspec));
freq =
CHAN5G_FREQ(CHSPEC_CHANNEL
(pi->radio_chanspec));
if (((freq >= 5180) && (freq <= 5230))
|| ((freq >= 5745) && (freq <= 5805))) {
WRITE_RADIO_REG4(pi, RADIO_2057, CORE,
0, IPA5G_BIAS_FILTER,
0xff);
0, IPA5G_BIAS_FILTER, 0xff);
WRITE_RADIO_REG4(pi, RADIO_2057, CORE,
1, IPA5G_BIAS_FILTER,
0xff);
1, IPA5G_BIAS_FILTER, 0xff);
}
}
} else {
if (pi->pubpi.radiorev != 5) {
for (coreNum = 0; coreNum <= 1; coreNum++) {
WRITE_RADIO_REG4(pi, RADIO_2057, CORE,
coreNum,
TXMIX2G_TUNE_BOOST_PU,
0x61);
WRITE_RADIO_REG4(pi, RADIO_2057, CORE,
coreNum,
WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum,
TXMIX2G_TUNE_BOOST_PU, 0x61);
WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum,
TXGM_IDAC_BLEED, 0x70);
}
}
}
if (pi->pubpi.radiorev == 4) {
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1,
0x05, 16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x05, 16,
&afectrl_adc_ctrl1_rev7);
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1,
0x15, 16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x15, 16,
&afectrl_adc_ctrl1_rev7);
for (coreNum = 0; coreNum <= 1; coreNum++) {
......@@ -16505,11 +16440,9 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
mod_phy_reg(pi, 0xa7, (0x1 << 0), 0);
mod_phy_reg(pi, 0xa5, (0x1 << 0), (0x1 << 0));
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1,
0x05, 16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x05, 16,
&afectrl_adc_ctrl2_rev7);
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1,
0x15, 16,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x15, 16,
&afectrl_adc_ctrl2_rev7);
mod_phy_reg(pi, 0xa6, (0x1 << 2), 0);
......@@ -16558,13 +16491,11 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
wlc_phy_workarounds_nphy_gainctrl(pi);
pdetrange =
(CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g.
pdetrange : pi->srom_fem2g.pdetrange;
pdetrange = (CHSPEC_IS5G(pi->radio_chanspec)) ?
pi->srom_fem5g.pdetrange : pi->srom_fem2g.pdetrange;
if (pdetrange == 0) {
chan_freq_range =
wlc_phy_get_chan_freq_range_nphy(pi, 0);
chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0);
if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) {
aux_adc_vmid_rev7_core0[3] = 0x70;
aux_adc_vmid_rev7_core1[3] = 0x70;
......@@ -16591,16 +16522,12 @@ static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi)
|| (pi->pubpi.radiorev == 8)) {
if (chan_freq_range ==
WL_CHAN_FREQ_RANGE_2G) {
aux_adc_vmid_rev7_core0[3] =
0x8c;
aux_adc_vmid_rev7_core1[3] =
0x8c;
aux_adc_vmid_rev7_core0[3] = 0x8c;
aux_adc_vmid_rev7_core1[3] = 0x8c;
aux_adc_gain_rev7[3] = 0;
} else {
aux_adc_vmid_rev7_core0[3] =
0x96;
aux_adc_vmid_rev7_core1[3] =
0x96;
aux_adc_vmid_rev7_core0[3] = 0x96;
aux_adc_vmid_rev7_core1[3] = 0x96;
aux_adc_gain_rev7[3] = 0;
}
}
......@@ -16672,7 +16599,8 @@ static void wlc_phy_workarounds_nphy_rev3(struct brcms_phy *pi)
NPHY_REV3_RFSEQ_CMD_INT_PA_PU,
NPHY_REV3_RFSEQ_CMD_END
};
static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };
static const u8 rfseq_rx2tx_dlys_rev3_ipa[] =
{ 8, 6, 6, 4, 4, 16, 43, 1, 1 };
s16 alpha0, alpha1, alpha2;
s16 beta0, beta1, beta2;
u32 leg_data_weights, ht_data_weights, nss1_data_weights,
......@@ -16725,7 +16653,7 @@ static void wlc_phy_workarounds_nphy_rev3(struct brcms_phy *pi)
wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX,
rfseq_rx2tx_events_rev3_ipa,
rfseq_rx2tx_dlys_rev3_ipa,
ARRAY_SIZE(rfseq_rx2tx_events_rev3_ipa));
ARRAY_SIZE (rfseq_rx2tx_events_rev3_ipa));
if ((pi->sh->hw_phyrxchain != 0x3) &&
(pi->sh->hw_phyrxchain != pi->sh->hw_phytxchain)) {
......@@ -16733,15 +16661,13 @@ static void wlc_phy_workarounds_nphy_rev3(struct brcms_phy *pi)
if (PHY_IPA(pi)) {
rfseq_rx2tx_dlys_rev3[5] = 59;
rfseq_rx2tx_dlys_rev3[6] = 1;
rfseq_rx2tx_events_rev3[7] =
NPHY_REV3_RFSEQ_CMD_END;
rfseq_rx2tx_events_rev3[7] = NPHY_REV3_RFSEQ_CMD_END;
}
wlc_phy_set_rfseq_nphy(
pi, NPHY_RFSEQ_RX2TX,
wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX,
rfseq_rx2tx_events_rev3,
rfseq_rx2tx_dlys_rev3,
ARRAY_SIZE(rfseq_rx2tx_events_rev3));
ARRAY_SIZE (rfseq_rx2tx_events_rev3));
}
if (CHSPEC_IS2G(pi->radio_chanspec))
......@@ -16773,9 +16699,8 @@ static void wlc_phy_workarounds_nphy_rev3(struct brcms_phy *pi)
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16,
&dac_control);
pdetrange =
(CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g.
pdetrange : pi->srom_fem2g.pdetrange;
pdetrange = (CHSPEC_IS5G(pi->radio_chanspec)) ?
pi->srom_fem5g.pdetrange : pi->srom_fem2g.pdetrange;
if (pdetrange == 0) {
if (NREV_GE(pi->pubpi.phy_rev, 4)) {
......@@ -16785,8 +16710,7 @@ static void wlc_phy_workarounds_nphy_rev3(struct brcms_phy *pi)
aux_adc_vmid = aux_adc_vmid_rev3;
aux_adc_gain = aux_adc_gain_rev3;
}
chan_freq_range =
wlc_phy_get_chan_freq_range_nphy(pi, 0);
chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0);
if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) {
switch (chan_freq_range) {
case WL_CHAN_FREQ_RANGE_5GL:
......@@ -16851,29 +16775,19 @@ static void wlc_phy_workarounds_nphy_rev3(struct brcms_phy *pi)
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4,
0x1c, 16, bcm_adc_gain);
} else if (pdetrange == 3) {
chan_freq_range =
wlc_phy_get_chan_freq_range_nphy(pi, 0);
if ((NREV_GE(pi->pubpi.phy_rev, 4))
&& (chan_freq_range == WL_CHAN_FREQ_RANGE_2G)) {
u16 auxadc_vmid[] = {
0xa2, 0xb4, 0xb4, 0x270
};
u16 auxadc_gain[] = {
0x02, 0x02, 0x02, 0x00
};
chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0);
if ((NREV_GE(pi->pubpi.phy_rev, 4)) &&
(chan_freq_range == WL_CHAN_FREQ_RANGE_2G)) {
u16 auxadc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x270 };
u16 auxadc_gain[] = { 0x02, 0x02, 0x02, 0x00 };
wlc_phy_table_write_nphy(pi,
NPHY_TBL_ID_AFECTRL, 4,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4,
0x08, 16, auxadc_vmid);
wlc_phy_table_write_nphy(pi,
NPHY_TBL_ID_AFECTRL, 4,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4,
0x18, 16, auxadc_vmid);
wlc_phy_table_write_nphy(pi,
NPHY_TBL_ID_AFECTRL, 4,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4,
0x0c, 16, auxadc_gain);
wlc_phy_table_write_nphy(pi,
NPHY_TBL_ID_AFECTRL, 4,
wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4,
0x1c, 16, auxadc_gain);
}
} else if ((pdetrange == 4) || (pdetrange == 5)) {
......@@ -16881,8 +16795,7 @@ static void wlc_phy_workarounds_nphy_rev3(struct brcms_phy *pi)
u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x0 };
u16 Vmid[2], Av[2];
chan_freq_range =
wlc_phy_get_chan_freq_range_nphy(pi, 0);
chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0);
if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) {
Vmid[0] = (pdetrange == 4) ? 0x8e : 0x89;
Vmid[1] = (pdetrange == 4) ? 0x96 : 0x89;
......@@ -16910,51 +16823,26 @@ static void wlc_phy_workarounds_nphy_rev3(struct brcms_phy *pi)
0x1c, 16, bcm_adc_gain);
}
write_radio_reg(pi,
(RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX0),
0x0);
write_radio_reg(pi,
(RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX1),
0x0);
write_radio_reg(pi, (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX0), 0x0);
write_radio_reg(pi, (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX1), 0x0);
write_radio_reg(pi,
(RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX0),
0x6);
write_radio_reg(pi,
(RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX1),
0x6);
write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX0), 0x6);
write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX1), 0x6);
write_radio_reg(pi,
(RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX0),
0x7);
write_radio_reg(pi,
(RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX1),
0x7);
write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX0), 0x7);
write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX1), 0x7);
write_radio_reg(pi,
(RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX0),
0x88);
write_radio_reg(pi,
(RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX1),
0x88);
write_radio_reg(pi, (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX0), 0x88);
write_radio_reg(pi, (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX1), 0x88);
write_radio_reg(pi,
(RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX0),
0x0);
write_radio_reg(pi,
(RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX1),
0x0);
write_radio_reg(pi, (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX0), 0x0);
write_radio_reg(pi, (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX1), 0x0);
write_radio_reg(pi,
(RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX0),
0x0);
write_radio_reg(pi,
(RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX1),
0x0);
write_radio_reg(pi, (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX0), 0x0);
write_radio_reg(pi, (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX1), 0x0);
triso =
(CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g.
triso : pi->srom_fem2g.triso;
triso = (CHSPEC_IS5G(pi->radio_chanspec)) ?
pi->srom_fem5g.triso : pi->srom_fem2g.triso;
if (triso == 7) {
wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0);
wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1);
......@@ -17103,8 +16991,7 @@ void wlc_phy_workarounds_nphy_rev1(struct brcms_phy *pi)
if (read_phy_reg(pi, 0xa0) & NPHY_MLenable)
wlapi_bmac_mhf(pi->sh->physhim, MHF3,
MHF3_NPHY_MLADV_WAR,
MHF3_NPHY_MLADV_WAR,
BRCM_BAND_ALL);
MHF3_NPHY_MLADV_WAR, BRCM_BAND_ALL);
} else if (NREV_IS(pi->pubpi.phy_rev, 2)) {
write_phy_reg(pi, 0x1e3, 0x0);
......
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