Commit aeee3d9c authored by Fabrizio Castro's avatar Fabrizio Castro Committed by Simon Horman

arm64: dts: renesas: r8a774a1: Replace power magic numbers

Now that include/dt-bindings/power/r8a774a1-sysc.h is in Linus'
master branch we can replace power related magic numbers with
the corresponding labels.
Signed-off-by: default avatarFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent da90dd84
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/renesas-cpg-mssr.h> #include <dt-bindings/clock/renesas-cpg-mssr.h>
#include <dt-bindings/power/r8a774a1-sysc.h>
/ { / {
compatible = "renesas,r8a774a1"; compatible = "renesas,r8a774a1";
...@@ -63,7 +64,7 @@ a57_0: cpu@0 { ...@@ -63,7 +64,7 @@ a57_0: cpu@0 {
compatible = "arm,cortex-a57", "arm,armv8"; compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x0>; reg = <0x0>;
device_type = "cpu"; device_type = "cpu";
power-domains = <&sysc 0>; power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
next-level-cache = <&L2_CA57>; next-level-cache = <&L2_CA57>;
enable-method = "psci"; enable-method = "psci";
clocks = <&cpg CPG_CORE 0>; clocks = <&cpg CPG_CORE 0>;
...@@ -73,7 +74,7 @@ a57_1: cpu@1 { ...@@ -73,7 +74,7 @@ a57_1: cpu@1 {
compatible = "arm,cortex-a57", "arm,armv8"; compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x1>; reg = <0x1>;
device_type = "cpu"; device_type = "cpu";
power-domains = <&sysc 1>; power-domains = <&sysc R8A774A1_PD_CA57_CPU1>;
next-level-cache = <&L2_CA57>; next-level-cache = <&L2_CA57>;
enable-method = "psci"; enable-method = "psci";
clocks = <&cpg CPG_CORE 0>; clocks = <&cpg CPG_CORE 0>;
...@@ -83,7 +84,7 @@ a53_0: cpu@100 { ...@@ -83,7 +84,7 @@ a53_0: cpu@100 {
compatible = "arm,cortex-a53", "arm,armv8"; compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x100>; reg = <0x100>;
device_type = "cpu"; device_type = "cpu";
power-domains = <&sysc 5>; power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
next-level-cache = <&L2_CA53>; next-level-cache = <&L2_CA53>;
enable-method = "psci"; enable-method = "psci";
clocks =<&cpg CPG_CORE 1>; clocks =<&cpg CPG_CORE 1>;
...@@ -93,7 +94,7 @@ a53_1: cpu@101 { ...@@ -93,7 +94,7 @@ a53_1: cpu@101 {
compatible = "arm,cortex-a53", "arm,armv8"; compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x101>; reg = <0x101>;
device_type = "cpu"; device_type = "cpu";
power-domains = <&sysc 6>; power-domains = <&sysc R8A774A1_PD_CA53_CPU1>;
next-level-cache = <&L2_CA53>; next-level-cache = <&L2_CA53>;
enable-method = "psci"; enable-method = "psci";
clocks =<&cpg CPG_CORE 1>; clocks =<&cpg CPG_CORE 1>;
...@@ -103,7 +104,7 @@ a53_2: cpu@102 { ...@@ -103,7 +104,7 @@ a53_2: cpu@102 {
compatible = "arm,cortex-a53", "arm,armv8"; compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x102>; reg = <0x102>;
device_type = "cpu"; device_type = "cpu";
power-domains = <&sysc 7>; power-domains = <&sysc R8A774A1_PD_CA53_CPU2>;
next-level-cache = <&L2_CA53>; next-level-cache = <&L2_CA53>;
enable-method = "psci"; enable-method = "psci";
clocks =<&cpg CPG_CORE 1>; clocks =<&cpg CPG_CORE 1>;
...@@ -113,7 +114,7 @@ a53_3: cpu@103 { ...@@ -113,7 +114,7 @@ a53_3: cpu@103 {
compatible = "arm,cortex-a53", "arm,armv8"; compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x103>; reg = <0x103>;
device_type = "cpu"; device_type = "cpu";
power-domains = <&sysc 8>; power-domains = <&sysc R8A774A1_PD_CA53_CPU3>;
next-level-cache = <&L2_CA53>; next-level-cache = <&L2_CA53>;
enable-method = "psci"; enable-method = "psci";
clocks =<&cpg CPG_CORE 1>; clocks =<&cpg CPG_CORE 1>;
...@@ -121,14 +122,14 @@ a53_3: cpu@103 { ...@@ -121,14 +122,14 @@ a53_3: cpu@103 {
L2_CA57: cache-controller-0 { L2_CA57: cache-controller-0 {
compatible = "cache"; compatible = "cache";
power-domains = <&sysc 12>; power-domains = <&sysc R8A774A1_PD_CA57_SCU>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
}; };
L2_CA53: cache-controller-1 { L2_CA53: cache-controller-1 {
compatible = "cache"; compatible = "cache";
power-domains = <&sysc 21>; power-domains = <&sysc R8A774A1_PD_CA53_SCU>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
}; };
...@@ -195,7 +196,7 @@ rwdt: watchdog@e6020000 { ...@@ -195,7 +196,7 @@ rwdt: watchdog@e6020000 {
"renesas,rcar-gen3-wdt"; "renesas,rcar-gen3-wdt";
reg = <0 0xe6020000 0 0x0c>; reg = <0 0xe6020000 0 0x0c>;
clocks = <&cpg CPG_MOD 402>; clocks = <&cpg CPG_MOD 402>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 402>; resets = <&cpg 402>;
status = "disabled"; status = "disabled";
}; };
...@@ -211,7 +212,7 @@ gpio0: gpio@e6050000 { ...@@ -211,7 +212,7 @@ gpio0: gpio@e6050000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
clocks = <&cpg CPG_MOD 912>; clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 912>; resets = <&cpg 912>;
}; };
...@@ -226,7 +227,7 @@ gpio1: gpio@e6051000 { ...@@ -226,7 +227,7 @@ gpio1: gpio@e6051000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
clocks = <&cpg CPG_MOD 911>; clocks = <&cpg CPG_MOD 911>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 911>; resets = <&cpg 911>;
}; };
...@@ -241,7 +242,7 @@ gpio2: gpio@e6052000 { ...@@ -241,7 +242,7 @@ gpio2: gpio@e6052000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
clocks = <&cpg CPG_MOD 910>; clocks = <&cpg CPG_MOD 910>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 910>; resets = <&cpg 910>;
}; };
...@@ -256,7 +257,7 @@ gpio3: gpio@e6053000 { ...@@ -256,7 +257,7 @@ gpio3: gpio@e6053000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
clocks = <&cpg CPG_MOD 909>; clocks = <&cpg CPG_MOD 909>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 909>; resets = <&cpg 909>;
}; };
...@@ -271,7 +272,7 @@ gpio4: gpio@e6054000 { ...@@ -271,7 +272,7 @@ gpio4: gpio@e6054000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
clocks = <&cpg CPG_MOD 908>; clocks = <&cpg CPG_MOD 908>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 908>; resets = <&cpg 908>;
}; };
...@@ -286,7 +287,7 @@ gpio5: gpio@e6055000 { ...@@ -286,7 +287,7 @@ gpio5: gpio@e6055000 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
clocks = <&cpg CPG_MOD 907>; clocks = <&cpg CPG_MOD 907>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 907>; resets = <&cpg 907>;
}; };
...@@ -301,7 +302,7 @@ gpio6: gpio@e6055400 { ...@@ -301,7 +302,7 @@ gpio6: gpio@e6055400 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
clocks = <&cpg CPG_MOD 906>; clocks = <&cpg CPG_MOD 906>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 906>; resets = <&cpg 906>;
}; };
...@@ -316,7 +317,7 @@ gpio7: gpio@e6055800 { ...@@ -316,7 +317,7 @@ gpio7: gpio@e6055800 {
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupt-controller; interrupt-controller;
clocks = <&cpg CPG_MOD 905>; clocks = <&cpg CPG_MOD 905>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 905>; resets = <&cpg 905>;
}; };
...@@ -355,7 +356,7 @@ tsc: thermal@e6198000 { ...@@ -355,7 +356,7 @@ tsc: thermal@e6198000 {
<GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>; clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 522>; resets = <&cpg 522>;
#thermal-sensor-cells = <1>; #thermal-sensor-cells = <1>;
}; };
...@@ -372,7 +373,7 @@ GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH ...@@ -372,7 +373,7 @@ GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>; clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 407>; resets = <&cpg 407>;
}; };
...@@ -384,7 +385,7 @@ i2c0: i2c@e6500000 { ...@@ -384,7 +385,7 @@ i2c0: i2c@e6500000 {
reg = <0 0xe6500000 0 0x40>; reg = <0 0xe6500000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>; clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 931>; resets = <&cpg 931>;
dmas = <&dmac1 0x91>, <&dmac1 0x90>, dmas = <&dmac1 0x91>, <&dmac1 0x90>,
<&dmac2 0x91>, <&dmac2 0x90>; <&dmac2 0x91>, <&dmac2 0x90>;
...@@ -401,7 +402,7 @@ i2c1: i2c@e6508000 { ...@@ -401,7 +402,7 @@ i2c1: i2c@e6508000 {
reg = <0 0xe6508000 0 0x40>; reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>; clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 930>; resets = <&cpg 930>;
dmas = <&dmac1 0x93>, <&dmac1 0x92>, dmas = <&dmac1 0x93>, <&dmac1 0x92>,
<&dmac2 0x93>, <&dmac2 0x92>; <&dmac2 0x93>, <&dmac2 0x92>;
...@@ -418,7 +419,7 @@ i2c2: i2c@e6510000 { ...@@ -418,7 +419,7 @@ i2c2: i2c@e6510000 {
reg = <0 0xe6510000 0 0x40>; reg = <0 0xe6510000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>; clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 929>; resets = <&cpg 929>;
dmas = <&dmac1 0x95>, <&dmac1 0x94>, dmas = <&dmac1 0x95>, <&dmac1 0x94>,
<&dmac2 0x95>, <&dmac2 0x94>; <&dmac2 0x95>, <&dmac2 0x94>;
...@@ -435,7 +436,7 @@ i2c3: i2c@e66d0000 { ...@@ -435,7 +436,7 @@ i2c3: i2c@e66d0000 {
reg = <0 0xe66d0000 0 0x40>; reg = <0 0xe66d0000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>; clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 928>; resets = <&cpg 928>;
dmas = <&dmac0 0x97>, <&dmac0 0x96>; dmas = <&dmac0 0x97>, <&dmac0 0x96>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
...@@ -451,7 +452,7 @@ i2c4: i2c@e66d8000 { ...@@ -451,7 +452,7 @@ i2c4: i2c@e66d8000 {
reg = <0 0xe66d8000 0 0x40>; reg = <0 0xe66d8000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>; clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 927>; resets = <&cpg 927>;
dmas = <&dmac0 0x99>, <&dmac0 0x98>; dmas = <&dmac0 0x99>, <&dmac0 0x98>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
...@@ -467,7 +468,7 @@ i2c5: i2c@e66e0000 { ...@@ -467,7 +468,7 @@ i2c5: i2c@e66e0000 {
reg = <0 0xe66e0000 0 0x40>; reg = <0 0xe66e0000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 919>; clocks = <&cpg CPG_MOD 919>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 919>; resets = <&cpg 919>;
dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
...@@ -483,7 +484,7 @@ i2c6: i2c@e66e8000 { ...@@ -483,7 +484,7 @@ i2c6: i2c@e66e8000 {
reg = <0 0xe66e8000 0 0x40>; reg = <0 0xe66e8000 0 0x40>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 918>; clocks = <&cpg CPG_MOD 918>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 918>; resets = <&cpg 918>;
dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
...@@ -500,7 +501,7 @@ i2c_dvfs: i2c@e60b0000 { ...@@ -500,7 +501,7 @@ i2c_dvfs: i2c@e60b0000 {
reg = <0 0xe60b0000 0 0x425>; reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 926>; clocks = <&cpg CPG_MOD 926>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 926>; resets = <&cpg 926>;
dmas = <&dmac0 0x11>, <&dmac0 0x10>; dmas = <&dmac0 0x11>, <&dmac0 0x10>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
...@@ -520,7 +521,7 @@ hscif0: serial@e6540000 { ...@@ -520,7 +521,7 @@ hscif0: serial@e6540000 {
dmas = <&dmac1 0x31>, <&dmac1 0x30>, dmas = <&dmac1 0x31>, <&dmac1 0x30>,
<&dmac2 0x31>, <&dmac2 0x30>; <&dmac2 0x31>, <&dmac2 0x30>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 520>; resets = <&cpg 520>;
status = "disabled"; status = "disabled";
}; };
...@@ -538,7 +539,7 @@ hscif1: serial@e6550000 { ...@@ -538,7 +539,7 @@ hscif1: serial@e6550000 {
dmas = <&dmac1 0x33>, <&dmac1 0x32>, dmas = <&dmac1 0x33>, <&dmac1 0x32>,
<&dmac2 0x33>, <&dmac2 0x32>; <&dmac2 0x33>, <&dmac2 0x32>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 519>; resets = <&cpg 519>;
status = "disabled"; status = "disabled";
}; };
...@@ -556,7 +557,7 @@ hscif2: serial@e6560000 { ...@@ -556,7 +557,7 @@ hscif2: serial@e6560000 {
dmas = <&dmac1 0x35>, <&dmac1 0x34>, dmas = <&dmac1 0x35>, <&dmac1 0x34>,
<&dmac2 0x35>, <&dmac2 0x34>; <&dmac2 0x35>, <&dmac2 0x34>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 518>; resets = <&cpg 518>;
status = "disabled"; status = "disabled";
}; };
...@@ -573,7 +574,7 @@ hscif3: serial@e66a0000 { ...@@ -573,7 +574,7 @@ hscif3: serial@e66a0000 {
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x37>, <&dmac0 0x36>; dmas = <&dmac0 0x37>, <&dmac0 0x36>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 517>; resets = <&cpg 517>;
status = "disabled"; status = "disabled";
}; };
...@@ -590,7 +591,7 @@ hscif4: serial@e66b0000 { ...@@ -590,7 +591,7 @@ hscif4: serial@e66b0000 {
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x38>; dmas = <&dmac0 0x39>, <&dmac0 0x38>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 516>; resets = <&cpg 516>;
status = "disabled"; status = "disabled";
}; };
...@@ -607,7 +608,7 @@ hsusb: usb@e6590000 { ...@@ -607,7 +608,7 @@ hsusb: usb@e6590000 {
renesas,buswait = <11>; renesas,buswait = <11>;
phys = <&usb2_phy0>; phys = <&usb2_phy0>;
phy-names = "usb"; phy-names = "usb";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 704>; resets = <&cpg 704>;
status = "disabled"; status = "disabled";
}; };
...@@ -620,7 +621,7 @@ usb_dmac0: dma-controller@e65a0000 { ...@@ -620,7 +621,7 @@ usb_dmac0: dma-controller@e65a0000 {
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1"; interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 330>; clocks = <&cpg CPG_MOD 330>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 330>; resets = <&cpg 330>;
#dma-cells = <1>; #dma-cells = <1>;
dma-channels = <2>; dma-channels = <2>;
...@@ -634,7 +635,7 @@ usb_dmac1: dma-controller@e65b0000 { ...@@ -634,7 +635,7 @@ usb_dmac1: dma-controller@e65b0000 {
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1"; interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 331>; clocks = <&cpg CPG_MOD 331>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 331>; resets = <&cpg 331>;
#dma-cells = <1>; #dma-cells = <1>;
dma-channels = <2>; dma-channels = <2>;
...@@ -647,7 +648,7 @@ usb3_phy0: usb-phy@e65ee000 { ...@@ -647,7 +648,7 @@ usb3_phy0: usb-phy@e65ee000 {
clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
<&usb_extal_clk>; <&usb_extal_clk>;
clock-names = "usb3-if", "usb3s_clk", "usb_extal"; clock-names = "usb3-if", "usb3s_clk", "usb_extal";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 328>; resets = <&cpg 328>;
#phy-cells = <0>; #phy-cells = <0>;
status = "disabled"; status = "disabled";
...@@ -681,7 +682,7 @@ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH ...@@ -681,7 +682,7 @@ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
"ch12", "ch13", "ch14", "ch15"; "ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 219>; clocks = <&cpg CPG_MOD 219>;
clock-names = "fck"; clock-names = "fck";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 219>; resets = <&cpg 219>;
#dma-cells = <1>; #dma-cells = <1>;
dma-channels = <16>; dma-channels = <16>;
...@@ -715,7 +716,7 @@ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH ...@@ -715,7 +716,7 @@ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
"ch12", "ch13", "ch14", "ch15"; "ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 218>; clocks = <&cpg CPG_MOD 218>;
clock-names = "fck"; clock-names = "fck";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 218>; resets = <&cpg 218>;
#dma-cells = <1>; #dma-cells = <1>;
dma-channels = <16>; dma-channels = <16>;
...@@ -749,7 +750,7 @@ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH ...@@ -749,7 +750,7 @@ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
"ch12", "ch13", "ch14", "ch15"; "ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 217>; clocks = <&cpg CPG_MOD 217>;
clock-names = "fck"; clock-names = "fck";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 217>; resets = <&cpg 217>;
#dma-cells = <1>; #dma-cells = <1>;
dma-channels = <16>; dma-channels = <16>;
...@@ -759,7 +760,7 @@ ipmmu_ds0: mmu@e6740000 { ...@@ -759,7 +760,7 @@ ipmmu_ds0: mmu@e6740000 {
compatible = "renesas,ipmmu-r8a774a1"; compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xe6740000 0 0x1000>; reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>; renesas,ipmmu-main = <&ipmmu_mm 0>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
...@@ -767,7 +768,7 @@ ipmmu_ds1: mmu@e7740000 { ...@@ -767,7 +768,7 @@ ipmmu_ds1: mmu@e7740000 {
compatible = "renesas,ipmmu-r8a774a1"; compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xe7740000 0 0x1000>; reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>; renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
...@@ -775,7 +776,7 @@ ipmmu_hc: mmu@e6570000 { ...@@ -775,7 +776,7 @@ ipmmu_hc: mmu@e6570000 {
compatible = "renesas,ipmmu-r8a774a1"; compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xe6570000 0 0x1000>; reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>; renesas,ipmmu-main = <&ipmmu_mm 2>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
...@@ -784,7 +785,7 @@ ipmmu_mm: mmu@e67b0000 { ...@@ -784,7 +785,7 @@ ipmmu_mm: mmu@e67b0000 {
reg = <0 0xe67b0000 0 0x1000>; reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
...@@ -792,7 +793,7 @@ ipmmu_mp: mmu@ec670000 { ...@@ -792,7 +793,7 @@ ipmmu_mp: mmu@ec670000 {
compatible = "renesas,ipmmu-r8a774a1"; compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xec670000 0 0x1000>; reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>; renesas,ipmmu-main = <&ipmmu_mm 4>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
...@@ -800,7 +801,7 @@ ipmmu_pv0: mmu@fd800000 { ...@@ -800,7 +801,7 @@ ipmmu_pv0: mmu@fd800000 {
compatible = "renesas,ipmmu-r8a774a1"; compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xfd800000 0 0x1000>; reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 5>; renesas,ipmmu-main = <&ipmmu_mm 5>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
...@@ -808,7 +809,7 @@ ipmmu_pv1: mmu@fd950000 { ...@@ -808,7 +809,7 @@ ipmmu_pv1: mmu@fd950000 {
compatible = "renesas,ipmmu-r8a774a1"; compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xfd950000 0 0x1000>; reg = <0 0xfd950000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>; renesas,ipmmu-main = <&ipmmu_mm 6>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
...@@ -816,7 +817,7 @@ ipmmu_vc0: mmu@fe6b0000 { ...@@ -816,7 +817,7 @@ ipmmu_vc0: mmu@fe6b0000 {
compatible = "renesas,ipmmu-r8a774a1"; compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xfe6b0000 0 0x1000>; reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 8>; renesas,ipmmu-main = <&ipmmu_mm 8>;
power-domains = <&sysc 14>; power-domains = <&sysc R8A774A1_PD_A3VC>;
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
...@@ -824,7 +825,7 @@ ipmmu_vi0: mmu@febd0000 { ...@@ -824,7 +825,7 @@ ipmmu_vi0: mmu@febd0000 {
compatible = "renesas,ipmmu-r8a774a1"; compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xfebd0000 0 0x1000>; reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 9>; renesas,ipmmu-main = <&ipmmu_mm 9>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
#iommu-cells = <1>; #iommu-cells = <1>;
}; };
...@@ -865,7 +866,7 @@ avb: ethernet@e6800000 { ...@@ -865,7 +866,7 @@ avb: ethernet@e6800000 {
"ch20", "ch21", "ch22", "ch23", "ch20", "ch21", "ch22", "ch23",
"ch24"; "ch24";
clocks = <&cpg CPG_MOD 812>; clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 812>; resets = <&cpg 812>;
phy-mode = "rgmii"; phy-mode = "rgmii";
#address-cells = <1>; #address-cells = <1>;
...@@ -880,7 +881,7 @@ can0: can@e6c30000 { ...@@ -880,7 +881,7 @@ can0: can@e6c30000 {
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>, <&can_clk>; clocks = <&cpg CPG_MOD 916>, <&can_clk>;
clock-names = "clkp1", "can_clk"; clock-names = "clkp1", "can_clk";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 916>; resets = <&cpg 916>;
status = "disabled"; status = "disabled";
}; };
...@@ -892,7 +893,7 @@ can1: can@e6c38000 { ...@@ -892,7 +893,7 @@ can1: can@e6c38000 {
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>, <&can_clk>; clocks = <&cpg CPG_MOD 915>, <&can_clk>;
clock-names = "clkp1", "can_clk"; clock-names = "clkp1", "can_clk";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 915>; resets = <&cpg 915>;
status = "disabled"; status = "disabled";
}; };
...@@ -903,7 +904,7 @@ pwm0: pwm@e6e30000 { ...@@ -903,7 +904,7 @@ pwm0: pwm@e6e30000 {
#pwm-cells = <2>; #pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>; clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>; resets = <&cpg 523>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
status = "disabled"; status = "disabled";
}; };
...@@ -913,7 +914,7 @@ pwm1: pwm@e6e31000 { ...@@ -913,7 +914,7 @@ pwm1: pwm@e6e31000 {
#pwm-cells = <2>; #pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>; clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>; resets = <&cpg 523>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
status = "disabled"; status = "disabled";
}; };
...@@ -923,7 +924,7 @@ pwm2: pwm@e6e32000 { ...@@ -923,7 +924,7 @@ pwm2: pwm@e6e32000 {
#pwm-cells = <2>; #pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>; clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>; resets = <&cpg 523>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
status = "disabled"; status = "disabled";
}; };
...@@ -933,7 +934,7 @@ pwm3: pwm@e6e33000 { ...@@ -933,7 +934,7 @@ pwm3: pwm@e6e33000 {
#pwm-cells = <2>; #pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>; clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>; resets = <&cpg 523>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
status = "disabled"; status = "disabled";
}; };
...@@ -943,7 +944,7 @@ pwm4: pwm@e6e34000 { ...@@ -943,7 +944,7 @@ pwm4: pwm@e6e34000 {
#pwm-cells = <2>; #pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>; clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>; resets = <&cpg 523>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
status = "disabled"; status = "disabled";
}; };
...@@ -953,7 +954,7 @@ pwm5: pwm@e6e35000 { ...@@ -953,7 +954,7 @@ pwm5: pwm@e6e35000 {
#pwm-cells = <2>; #pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>; clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>; resets = <&cpg 523>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
status = "disabled"; status = "disabled";
}; };
...@@ -963,7 +964,7 @@ pwm6: pwm@e6e36000 { ...@@ -963,7 +964,7 @@ pwm6: pwm@e6e36000 {
#pwm-cells = <2>; #pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>; clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>; resets = <&cpg 523>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
status = "disabled"; status = "disabled";
}; };
...@@ -979,7 +980,7 @@ scif0: serial@e6e60000 { ...@@ -979,7 +980,7 @@ scif0: serial@e6e60000 {
dmas = <&dmac1 0x51>, <&dmac1 0x50>, dmas = <&dmac1 0x51>, <&dmac1 0x50>,
<&dmac2 0x51>, <&dmac2 0x50>; <&dmac2 0x51>, <&dmac2 0x50>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 207>; resets = <&cpg 207>;
status = "disabled"; status = "disabled";
}; };
...@@ -996,7 +997,7 @@ scif1: serial@e6e68000 { ...@@ -996,7 +997,7 @@ scif1: serial@e6e68000 {
dmas = <&dmac1 0x53>, <&dmac1 0x52>, dmas = <&dmac1 0x53>, <&dmac1 0x52>,
<&dmac2 0x53>, <&dmac2 0x52>; <&dmac2 0x53>, <&dmac2 0x52>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 206>; resets = <&cpg 206>;
status = "disabled"; status = "disabled";
}; };
...@@ -1010,7 +1011,7 @@ scif2: serial@e6e88000 { ...@@ -1010,7 +1011,7 @@ scif2: serial@e6e88000 {
<&cpg CPG_CORE 19>, <&cpg CPG_CORE 19>,
<&scif_clk>; <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 310>; resets = <&cpg 310>;
status = "disabled"; status = "disabled";
}; };
...@@ -1026,7 +1027,7 @@ scif3: serial@e6c50000 { ...@@ -1026,7 +1027,7 @@ scif3: serial@e6c50000 {
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x57>, <&dmac0 0x56>; dmas = <&dmac0 0x57>, <&dmac0 0x56>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 204>; resets = <&cpg 204>;
status = "disabled"; status = "disabled";
}; };
...@@ -1042,7 +1043,7 @@ scif4: serial@e6c40000 { ...@@ -1042,7 +1043,7 @@ scif4: serial@e6c40000 {
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x59>, <&dmac0 0x58>; dmas = <&dmac0 0x59>, <&dmac0 0x58>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 203>; resets = <&cpg 203>;
status = "disabled"; status = "disabled";
}; };
...@@ -1059,7 +1060,7 @@ scif5: serial@e6f30000 { ...@@ -1059,7 +1060,7 @@ scif5: serial@e6f30000 {
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
<&dmac2 0x5b>, <&dmac2 0x5a>; <&dmac2 0x5b>, <&dmac2 0x5a>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 202>; resets = <&cpg 202>;
status = "disabled"; status = "disabled";
}; };
...@@ -1073,7 +1074,7 @@ msiof0: spi@e6e90000 { ...@@ -1073,7 +1074,7 @@ msiof0: spi@e6e90000 {
dmas = <&dmac1 0x41>, <&dmac1 0x40>, dmas = <&dmac1 0x41>, <&dmac1 0x40>,
<&dmac2 0x41>, <&dmac2 0x40>; <&dmac2 0x41>, <&dmac2 0x40>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 211>; resets = <&cpg 211>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -1089,7 +1090,7 @@ msiof1: spi@e6ea0000 { ...@@ -1089,7 +1090,7 @@ msiof1: spi@e6ea0000 {
dmas = <&dmac1 0x43>, <&dmac1 0x42>, dmas = <&dmac1 0x43>, <&dmac1 0x42>,
<&dmac2 0x43>, <&dmac2 0x42>; <&dmac2 0x43>, <&dmac2 0x42>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 210>; resets = <&cpg 210>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -1104,7 +1105,7 @@ msiof2: spi@e6c00000 { ...@@ -1104,7 +1105,7 @@ msiof2: spi@e6c00000 {
clocks = <&cpg CPG_MOD 209>; clocks = <&cpg CPG_MOD 209>;
dmas = <&dmac0 0x45>, <&dmac0 0x44>; dmas = <&dmac0 0x45>, <&dmac0 0x44>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 209>; resets = <&cpg 209>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -1119,7 +1120,7 @@ msiof3: spi@e6c10000 { ...@@ -1119,7 +1120,7 @@ msiof3: spi@e6c10000 {
clocks = <&cpg CPG_MOD 208>; clocks = <&cpg CPG_MOD 208>;
dmas = <&dmac0 0x47>, <&dmac0 0x46>; dmas = <&dmac0 0x47>, <&dmac0 0x46>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 208>; resets = <&cpg 208>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -1131,7 +1132,7 @@ vin0: video@e6ef0000 { ...@@ -1131,7 +1132,7 @@ vin0: video@e6ef0000 {
reg = <0 0xe6ef0000 0 0x1000>; reg = <0 0xe6ef0000 0 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>; clocks = <&cpg CPG_MOD 811>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 811>; resets = <&cpg 811>;
renesas,id = <0>; renesas,id = <0>;
status = "disabled"; status = "disabled";
...@@ -1163,7 +1164,7 @@ vin1: video@e6ef1000 { ...@@ -1163,7 +1164,7 @@ vin1: video@e6ef1000 {
reg = <0 0xe6ef1000 0 0x1000>; reg = <0 0xe6ef1000 0 0x1000>;
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>; clocks = <&cpg CPG_MOD 810>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 810>; resets = <&cpg 810>;
renesas,id = <1>; renesas,id = <1>;
status = "disabled"; status = "disabled";
...@@ -1195,7 +1196,7 @@ vin2: video@e6ef2000 { ...@@ -1195,7 +1196,7 @@ vin2: video@e6ef2000 {
reg = <0 0xe6ef2000 0 0x1000>; reg = <0 0xe6ef2000 0 0x1000>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 809>; clocks = <&cpg CPG_MOD 809>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 809>; resets = <&cpg 809>;
renesas,id = <2>; renesas,id = <2>;
status = "disabled"; status = "disabled";
...@@ -1227,7 +1228,7 @@ vin3: video@e6ef3000 { ...@@ -1227,7 +1228,7 @@ vin3: video@e6ef3000 {
reg = <0 0xe6ef3000 0 0x1000>; reg = <0 0xe6ef3000 0 0x1000>;
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 808>; clocks = <&cpg CPG_MOD 808>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 808>; resets = <&cpg 808>;
renesas,id = <3>; renesas,id = <3>;
status = "disabled"; status = "disabled";
...@@ -1259,7 +1260,7 @@ vin4: video@e6ef4000 { ...@@ -1259,7 +1260,7 @@ vin4: video@e6ef4000 {
reg = <0 0xe6ef4000 0 0x1000>; reg = <0 0xe6ef4000 0 0x1000>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 807>; clocks = <&cpg CPG_MOD 807>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 807>; resets = <&cpg 807>;
renesas,id = <4>; renesas,id = <4>;
status = "disabled"; status = "disabled";
...@@ -1291,7 +1292,7 @@ vin5: video@e6ef5000 { ...@@ -1291,7 +1292,7 @@ vin5: video@e6ef5000 {
reg = <0 0xe6ef5000 0 0x1000>; reg = <0 0xe6ef5000 0 0x1000>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 806>; clocks = <&cpg CPG_MOD 806>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 806>; resets = <&cpg 806>;
renesas,id = <5>; renesas,id = <5>;
status = "disabled"; status = "disabled";
...@@ -1323,7 +1324,7 @@ vin6: video@e6ef6000 { ...@@ -1323,7 +1324,7 @@ vin6: video@e6ef6000 {
reg = <0 0xe6ef6000 0 0x1000>; reg = <0 0xe6ef6000 0 0x1000>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 805>; clocks = <&cpg CPG_MOD 805>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 805>; resets = <&cpg 805>;
renesas,id = <6>; renesas,id = <6>;
status = "disabled"; status = "disabled";
...@@ -1355,7 +1356,7 @@ vin7: video@e6ef7000 { ...@@ -1355,7 +1356,7 @@ vin7: video@e6ef7000 {
reg = <0 0xe6ef7000 0 0x1000>; reg = <0 0xe6ef7000 0 0x1000>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 804>; clocks = <&cpg CPG_MOD 804>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 804>; resets = <&cpg 804>;
renesas,id = <7>; renesas,id = <7>;
status = "disabled"; status = "disabled";
...@@ -1431,7 +1432,7 @@ rcar_sound: sound@ec500000 { ...@@ -1431,7 +1432,7 @@ rcar_sound: sound@ec500000 {
"ctu.1", "ctu.0", "ctu.1", "ctu.0",
"dvc.0", "dvc.1", "dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i"; "clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 1005>, resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>, <&cpg 1006>, <&cpg 1007>,
<&cpg 1008>, <&cpg 1009>, <&cpg 1008>, <&cpg 1009>,
...@@ -1617,7 +1618,7 @@ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH ...@@ -1617,7 +1618,7 @@ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
"ch12", "ch13", "ch14", "ch15"; "ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 502>; clocks = <&cpg CPG_MOD 502>;
clock-names = "fck"; clock-names = "fck";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 502>; resets = <&cpg 502>;
#dma-cells = <1>; #dma-cells = <1>;
dma-channels = <16>; dma-channels = <16>;
...@@ -1651,7 +1652,7 @@ GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH ...@@ -1651,7 +1652,7 @@ GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
"ch12", "ch13", "ch14", "ch15"; "ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 501>; clocks = <&cpg CPG_MOD 501>;
clock-names = "fck"; clock-names = "fck";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 501>; resets = <&cpg 501>;
#dma-cells = <1>; #dma-cells = <1>;
dma-channels = <16>; dma-channels = <16>;
...@@ -1663,7 +1664,7 @@ xhci0: usb@ee000000 { ...@@ -1663,7 +1664,7 @@ xhci0: usb@ee000000 {
reg = <0 0xee000000 0 0xc00>; reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>; clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 328>; resets = <&cpg 328>;
status = "disabled"; status = "disabled";
}; };
...@@ -1674,7 +1675,7 @@ usb3_peri0: usb@ee020000 { ...@@ -1674,7 +1675,7 @@ usb3_peri0: usb@ee020000 {
reg = <0 0xee020000 0 0x400>; reg = <0 0xee020000 0 0x400>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>; clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 328>; resets = <&cpg 328>;
status = "disabled"; status = "disabled";
}; };
...@@ -1686,7 +1687,7 @@ ohci0: usb@ee080000 { ...@@ -1686,7 +1687,7 @@ ohci0: usb@ee080000 {
clocks = <&cpg CPG_MOD 703>; clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>; phys = <&usb2_phy0>;
phy-names = "usb"; phy-names = "usb";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 703>; resets = <&cpg 703>;
status = "disabled"; status = "disabled";
}; };
...@@ -1698,7 +1699,7 @@ ohci1: usb@ee0a0000 { ...@@ -1698,7 +1699,7 @@ ohci1: usb@ee0a0000 {
clocks = <&cpg CPG_MOD 702>; clocks = <&cpg CPG_MOD 702>;
phys = <&usb2_phy1>; phys = <&usb2_phy1>;
phy-names = "usb"; phy-names = "usb";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 702>; resets = <&cpg 702>;
status = "disabled"; status = "disabled";
}; };
...@@ -1711,7 +1712,7 @@ ehci0: usb@ee080100 { ...@@ -1711,7 +1712,7 @@ ehci0: usb@ee080100 {
phys = <&usb2_phy0>; phys = <&usb2_phy0>;
phy-names = "usb"; phy-names = "usb";
companion = <&ohci0>; companion = <&ohci0>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 703>; resets = <&cpg 703>;
status = "disabled"; status = "disabled";
}; };
...@@ -1724,7 +1725,7 @@ ehci1: usb@ee0a0100 { ...@@ -1724,7 +1725,7 @@ ehci1: usb@ee0a0100 {
phys = <&usb2_phy1>; phys = <&usb2_phy1>;
phy-names = "usb"; phy-names = "usb";
companion = <&ohci1>; companion = <&ohci1>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 702>; resets = <&cpg 702>;
status = "disabled"; status = "disabled";
}; };
...@@ -1735,7 +1736,7 @@ usb2_phy0: usb-phy@ee080200 { ...@@ -1735,7 +1736,7 @@ usb2_phy0: usb-phy@ee080200 {
reg = <0 0xee080200 0 0x700>; reg = <0 0xee080200 0 0x700>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>; clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 703>; resets = <&cpg 703>;
#phy-cells = <0>; #phy-cells = <0>;
status = "disabled"; status = "disabled";
...@@ -1746,7 +1747,7 @@ usb2_phy1: usb-phy@ee0a0200 { ...@@ -1746,7 +1747,7 @@ usb2_phy1: usb-phy@ee0a0200 {
"renesas,rcar-gen3-usb2-phy"; "renesas,rcar-gen3-usb2-phy";
reg = <0 0xee0a0200 0 0x700>; reg = <0 0xee0a0200 0 0x700>;
clocks = <&cpg CPG_MOD 702>; clocks = <&cpg CPG_MOD 702>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 702>; resets = <&cpg 702>;
#phy-cells = <0>; #phy-cells = <0>;
status = "disabled"; status = "disabled";
...@@ -1759,7 +1760,7 @@ sdhi0: sd@ee100000 { ...@@ -1759,7 +1760,7 @@ sdhi0: sd@ee100000 {
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>; clocks = <&cpg CPG_MOD 314>;
max-frequency = <200000000>; max-frequency = <200000000>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 314>; resets = <&cpg 314>;
status = "disabled"; status = "disabled";
}; };
...@@ -1771,7 +1772,7 @@ sdhi1: sd@ee120000 { ...@@ -1771,7 +1772,7 @@ sdhi1: sd@ee120000 {
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 313>; clocks = <&cpg CPG_MOD 313>;
max-frequency = <200000000>; max-frequency = <200000000>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 313>; resets = <&cpg 313>;
status = "disabled"; status = "disabled";
}; };
...@@ -1783,7 +1784,7 @@ sdhi2: sd@ee140000 { ...@@ -1783,7 +1784,7 @@ sdhi2: sd@ee140000 {
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>; clocks = <&cpg CPG_MOD 312>;
max-frequency = <200000000>; max-frequency = <200000000>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 312>; resets = <&cpg 312>;
status = "disabled"; status = "disabled";
}; };
...@@ -1795,7 +1796,7 @@ sdhi3: sd@ee160000 { ...@@ -1795,7 +1796,7 @@ sdhi3: sd@ee160000 {
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>; clocks = <&cpg CPG_MOD 311>;
max-frequency = <200000000>; max-frequency = <200000000>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 311>; resets = <&cpg 311>;
status = "disabled"; status = "disabled";
}; };
...@@ -1813,7 +1814,7 @@ gic: interrupt-controller@f1010000 { ...@@ -1813,7 +1814,7 @@ gic: interrupt-controller@f1010000 {
(GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>; clocks = <&cpg CPG_MOD 408>;
clock-names = "clk"; clock-names = "clk";
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 408>; resets = <&cpg 408>;
}; };
...@@ -1821,7 +1822,7 @@ fcpf0: fcp@fe950000 { ...@@ -1821,7 +1822,7 @@ fcpf0: fcp@fe950000 {
compatible = "renesas,fcpf"; compatible = "renesas,fcpf";
reg = <0 0xfe950000 0 0x200>; reg = <0 0xfe950000 0 0x200>;
clocks = <&cpg CPG_MOD 615>; clocks = <&cpg CPG_MOD 615>;
power-domains = <&sysc 14>; power-domains = <&sysc R8A774A1_PD_A3VC>;
resets = <&cpg 615>; resets = <&cpg 615>;
}; };
...@@ -1829,7 +1830,7 @@ fcpvb0: fcp@fe96f000 { ...@@ -1829,7 +1830,7 @@ fcpvb0: fcp@fe96f000 {
compatible = "renesas,fcpv"; compatible = "renesas,fcpv";
reg = <0 0xfe96f000 0 0x200>; reg = <0 0xfe96f000 0 0x200>;
clocks = <&cpg CPG_MOD 607>; clocks = <&cpg CPG_MOD 607>;
power-domains = <&sysc 14>; power-domains = <&sysc R8A774A1_PD_A3VC>;
resets = <&cpg 607>; resets = <&cpg 607>;
}; };
...@@ -1837,7 +1838,7 @@ fcpvd0: fcp@fea27000 { ...@@ -1837,7 +1838,7 @@ fcpvd0: fcp@fea27000 {
compatible = "renesas,fcpv"; compatible = "renesas,fcpv";
reg = <0 0xfea27000 0 0x200>; reg = <0 0xfea27000 0 0x200>;
clocks = <&cpg CPG_MOD 603>; clocks = <&cpg CPG_MOD 603>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 603>; resets = <&cpg 603>;
iommus = <&ipmmu_vi0 8>; iommus = <&ipmmu_vi0 8>;
}; };
...@@ -1846,7 +1847,7 @@ fcpvd1: fcp@fea2f000 { ...@@ -1846,7 +1847,7 @@ fcpvd1: fcp@fea2f000 {
compatible = "renesas,fcpv"; compatible = "renesas,fcpv";
reg = <0 0xfea2f000 0 0x200>; reg = <0 0xfea2f000 0 0x200>;
clocks = <&cpg CPG_MOD 602>; clocks = <&cpg CPG_MOD 602>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 602>; resets = <&cpg 602>;
iommus = <&ipmmu_vi0 9>; iommus = <&ipmmu_vi0 9>;
}; };
...@@ -1855,7 +1856,7 @@ fcpvd2: fcp@fea37000 { ...@@ -1855,7 +1856,7 @@ fcpvd2: fcp@fea37000 {
compatible = "renesas,fcpv"; compatible = "renesas,fcpv";
reg = <0 0xfea37000 0 0x200>; reg = <0 0xfea37000 0 0x200>;
clocks = <&cpg CPG_MOD 601>; clocks = <&cpg CPG_MOD 601>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 601>; resets = <&cpg 601>;
iommus = <&ipmmu_vi0 10>; iommus = <&ipmmu_vi0 10>;
}; };
...@@ -1864,7 +1865,7 @@ fcpvi0: fcp@fe9af000 { ...@@ -1864,7 +1865,7 @@ fcpvi0: fcp@fe9af000 {
compatible = "renesas,fcpv"; compatible = "renesas,fcpv";
reg = <0 0xfe9af000 0 0x200>; reg = <0 0xfe9af000 0 0x200>;
clocks = <&cpg CPG_MOD 611>; clocks = <&cpg CPG_MOD 611>;
power-domains = <&sysc 14>; power-domains = <&sysc R8A774A1_PD_A3VC>;
resets = <&cpg 611>; resets = <&cpg 611>;
iommus = <&ipmmu_vc0 19>; iommus = <&ipmmu_vc0 19>;
}; };
...@@ -1874,7 +1875,7 @@ csi20: csi2@fea80000 { ...@@ -1874,7 +1875,7 @@ csi20: csi2@fea80000 {
reg = <0 0xfea80000 0 0x10000>; reg = <0 0xfea80000 0 0x10000>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 714>; clocks = <&cpg CPG_MOD 714>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 714>; resets = <&cpg 714>;
status = "disabled"; status = "disabled";
...@@ -1929,7 +1930,7 @@ csi40: csi2@feaa0000 { ...@@ -1929,7 +1930,7 @@ csi40: csi2@feaa0000 {
reg = <0 0xfeaa0000 0 0x10000>; reg = <0 0xfeaa0000 0 0x10000>;
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 716>; clocks = <&cpg CPG_MOD 716>;
power-domains = <&sysc 32>; power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 716>; resets = <&cpg 716>;
status = "disabled"; status = "disabled";
......
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