Commit af4aeadd authored by Stephane Eranian's avatar Stephane Eranian Committed by Arnaldo Carvalho de Melo

perf tools: Fix link time error with sample_reg_masks on non x86

This patch makes perf compile on non x86 platforms by defining a weak
symbol for sample_reg_masks[] in util/perf_regs.c.

The patch also moves the REG() and REG_END() macros into the
util/per_regs.h header file. The macros are renamed to
SMPL_REG/SMPL_REG_END to avoid clashes with other header files.
Signed-off-by: default avatarStephane Eranian <eranian@google.com>
Acked-by: default avatarJiri Olsa <jolsa@kernel.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1441099814-26783-1-git-send-email-eranian@google.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 04aa90b5
#include "../../perf.h" #include "../../perf.h"
#include "../../util/perf_regs.h" #include "../../util/perf_regs.h"
#define REG(n, b) { .name = #n, .mask = 1ULL << (b) }
#define REG_END { .name = NULL }
const struct sample_reg sample_reg_masks[] = { const struct sample_reg sample_reg_masks[] = {
REG(AX, PERF_REG_X86_AX), SMPL_REG(AX, PERF_REG_X86_AX),
REG(BX, PERF_REG_X86_BX), SMPL_REG(BX, PERF_REG_X86_BX),
REG(CX, PERF_REG_X86_CX), SMPL_REG(CX, PERF_REG_X86_CX),
REG(DX, PERF_REG_X86_DX), SMPL_REG(DX, PERF_REG_X86_DX),
REG(SI, PERF_REG_X86_SI), SMPL_REG(SI, PERF_REG_X86_SI),
REG(DI, PERF_REG_X86_DI), SMPL_REG(DI, PERF_REG_X86_DI),
REG(BP, PERF_REG_X86_BP), SMPL_REG(BP, PERF_REG_X86_BP),
REG(SP, PERF_REG_X86_SP), SMPL_REG(SP, PERF_REG_X86_SP),
REG(IP, PERF_REG_X86_IP), SMPL_REG(IP, PERF_REG_X86_IP),
REG(FLAGS, PERF_REG_X86_FLAGS), SMPL_REG(FLAGS, PERF_REG_X86_FLAGS),
REG(CS, PERF_REG_X86_CS), SMPL_REG(CS, PERF_REG_X86_CS),
REG(SS, PERF_REG_X86_SS), SMPL_REG(SS, PERF_REG_X86_SS),
#ifdef HAVE_ARCH_X86_64_SUPPORT #ifdef HAVE_ARCH_X86_64_SUPPORT
REG(R8, PERF_REG_X86_R8), SMPL_REG(R8, PERF_REG_X86_R8),
REG(R9, PERF_REG_X86_R9), SMPL_REG(R9, PERF_REG_X86_R9),
REG(R10, PERF_REG_X86_R10), SMPL_REG(R10, PERF_REG_X86_R10),
REG(R11, PERF_REG_X86_R11), SMPL_REG(R11, PERF_REG_X86_R11),
REG(R12, PERF_REG_X86_R12), SMPL_REG(R12, PERF_REG_X86_R12),
REG(R13, PERF_REG_X86_R13), SMPL_REG(R13, PERF_REG_X86_R13),
REG(R14, PERF_REG_X86_R14), SMPL_REG(R14, PERF_REG_X86_R14),
REG(R15, PERF_REG_X86_R15), SMPL_REG(R15, PERF_REG_X86_R15),
#endif #endif
REG_END SMPL_REG_END
}; };
...@@ -2,6 +2,10 @@ ...@@ -2,6 +2,10 @@
#include "perf_regs.h" #include "perf_regs.h"
#include "event.h" #include "event.h"
const struct sample_reg __weak sample_reg_masks[] = {
SMPL_REG_END
};
int perf_reg_value(u64 *valp, struct regs_dump *regs, int id) int perf_reg_value(u64 *valp, struct regs_dump *regs, int id)
{ {
int i, idx = 0; int i, idx = 0;
......
...@@ -9,6 +9,8 @@ struct sample_reg { ...@@ -9,6 +9,8 @@ struct sample_reg {
const char *name; const char *name;
uint64_t mask; uint64_t mask;
}; };
#define SMPL_REG(n, b) { .name = #n, .mask = 1ULL << (b) }
#define SMPL_REG_END { .name = NULL }
extern const struct sample_reg sample_reg_masks[]; extern const struct sample_reg sample_reg_masks[];
......
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