Commit b1e47472 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Get rid of the "sizes are 0 based" stuff

Replace the "sizes are 0 based" stuff with just straight
up -1 where needed. Less confusing all around.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211201152552.7821-4-ville.syrjala@linux.intel.comReviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
parent 812e3386
...@@ -431,10 +431,6 @@ vlv_sprite_update_noarm(struct intel_plane *plane, ...@@ -431,10 +431,6 @@ vlv_sprite_update_noarm(struct intel_plane *plane,
u32 crtc_h = drm_rect_height(&plane_state->uapi.dst); u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
unsigned long irqflags; unsigned long irqflags;
/* Sizes are 0 based */
crtc_w--;
crtc_h--;
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPSTRIDE(pipe, plane_id), intel_de_write_fw(dev_priv, SPSTRIDE(pipe, plane_id),
...@@ -442,7 +438,7 @@ vlv_sprite_update_noarm(struct intel_plane *plane, ...@@ -442,7 +438,7 @@ vlv_sprite_update_noarm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, SPPOS(pipe, plane_id), intel_de_write_fw(dev_priv, SPPOS(pipe, plane_id),
(crtc_y << 16) | crtc_x); (crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, SPSIZE(pipe, plane_id), intel_de_write_fw(dev_priv, SPSIZE(pipe, plane_id),
(crtc_h << 16) | crtc_w); ((crtc_h - 1) << 16) | (crtc_w - 1));
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
} }
...@@ -866,21 +862,15 @@ ivb_sprite_update_noarm(struct intel_plane *plane, ...@@ -866,21 +862,15 @@ ivb_sprite_update_noarm(struct intel_plane *plane,
u32 sprscale = 0; u32 sprscale = 0;
unsigned long irqflags; unsigned long irqflags;
/* Sizes are 0 based */
src_w--;
src_h--;
crtc_w--;
crtc_h--;
if (crtc_w != src_w || crtc_h != src_h) if (crtc_w != src_w || crtc_h != src_h)
sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h; sprscale = SPRITE_SCALE_ENABLE | ((src_w - 1) << 16) | (src_h - 1);
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPRSTRIDE(pipe), intel_de_write_fw(dev_priv, SPRSTRIDE(pipe),
plane_state->view.color_plane[0].mapping_stride); plane_state->view.color_plane[0].mapping_stride);
intel_de_write_fw(dev_priv, SPRPOS(pipe), (crtc_y << 16) | crtc_x); intel_de_write_fw(dev_priv, SPRPOS(pipe), (crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, SPRSIZE(pipe), (crtc_h << 16) | crtc_w); intel_de_write_fw(dev_priv, SPRSIZE(pipe), ((crtc_h - 1) << 16) | (crtc_w - 1));
if (IS_IVYBRIDGE(dev_priv)) if (IS_IVYBRIDGE(dev_priv))
intel_de_write_fw(dev_priv, SPRSCALE(pipe), sprscale); intel_de_write_fw(dev_priv, SPRSCALE(pipe), sprscale);
...@@ -1208,21 +1198,15 @@ g4x_sprite_update_noarm(struct intel_plane *plane, ...@@ -1208,21 +1198,15 @@ g4x_sprite_update_noarm(struct intel_plane *plane,
u32 dvsscale = 0; u32 dvsscale = 0;
unsigned long irqflags; unsigned long irqflags;
/* Sizes are 0 based */
src_w--;
src_h--;
crtc_w--;
crtc_h--;
if (crtc_w != src_w || crtc_h != src_h) if (crtc_w != src_w || crtc_h != src_h)
dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h; dvsscale = DVS_SCALE_ENABLE | ((src_w - 1) << 16) | (src_h - 1);
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DVSSTRIDE(pipe), intel_de_write_fw(dev_priv, DVSSTRIDE(pipe),
plane_state->view.color_plane[0].mapping_stride); plane_state->view.color_plane[0].mapping_stride);
intel_de_write_fw(dev_priv, DVSPOS(pipe), (crtc_y << 16) | crtc_x); intel_de_write_fw(dev_priv, DVSPOS(pipe), (crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, DVSSIZE(pipe), (crtc_h << 16) | crtc_w); intel_de_write_fw(dev_priv, DVSSIZE(pipe), ((crtc_h - 1) << 16) | (crtc_w - 1));
intel_de_write_fw(dev_priv, DVSSCALE(pipe), dvsscale); intel_de_write_fw(dev_priv, DVSSCALE(pipe), dvsscale);
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
......
...@@ -1033,10 +1033,6 @@ skl_program_plane_noarm(struct intel_plane *plane, ...@@ -1033,10 +1033,6 @@ skl_program_plane_noarm(struct intel_plane *plane,
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16; u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
unsigned long irqflags; unsigned long irqflags;
/* Sizes are 0 based */
src_w--;
src_h--;
/* The scaler will handle the output position */ /* The scaler will handle the output position */
if (plane_state->scaler_id >= 0) { if (plane_state->scaler_id >= 0) {
crtc_x = 0; crtc_x = 0;
...@@ -1056,7 +1052,7 @@ skl_program_plane_noarm(struct intel_plane *plane, ...@@ -1056,7 +1052,7 @@ skl_program_plane_noarm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id), intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
(crtc_y << 16) | crtc_x); (crtc_y << 16) | crtc_x);
intel_de_write_fw(dev_priv, PLANE_SIZE(pipe, plane_id), intel_de_write_fw(dev_priv, PLANE_SIZE(pipe, plane_id),
(src_h << 16) | src_w); ((src_h - 1) << 16) | (src_w - 1));
if (intel_fb_is_rc_ccs_cc_modifier(fb->modifier)) { if (intel_fb_is_rc_ccs_cc_modifier(fb->modifier)) {
intel_de_write_fw(dev_priv, PLANE_CC_VAL(pipe, plane_id, 0), intel_de_write_fw(dev_priv, PLANE_CC_VAL(pipe, plane_id, 0),
......
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