Commit b29895e1 authored by Christian König's avatar Christian König

dma-buf: add DMA_RESV_USAGE_KERNEL v3

Add an usage for kernel submissions. Waiting for those are mandatory for
dynamic DMA-bufs.

As a precaution this patch also changes all occurrences where fences are
added as part of memory management in TTM, VMWGFX and i915 to use the
new value because it now becomes possible for drivers to ignore fences
with the WRITE usage.

v2: use "must" in documentation, fix whitespaces
v3: separate out some driver changes and better document why some
    changes should still be part of this patch.
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20220407085946.744568-5-christian.koenig@amd.com
parent 047a1b87
...@@ -726,7 +726,7 @@ EXPORT_SYMBOL_GPL(dma_resv_test_signaled); ...@@ -726,7 +726,7 @@ EXPORT_SYMBOL_GPL(dma_resv_test_signaled);
*/ */
void dma_resv_describe(struct dma_resv *obj, struct seq_file *seq) void dma_resv_describe(struct dma_resv *obj, struct seq_file *seq)
{ {
static const char *usage[] = { "write", "read" }; static const char *usage[] = { "kernel", "write", "read" };
struct dma_resv_iter cursor; struct dma_resv_iter cursor;
struct dma_fence *fence; struct dma_fence *fence;
......
...@@ -296,7 +296,7 @@ int dma_resv(void) ...@@ -296,7 +296,7 @@ int dma_resv(void)
int r; int r;
spin_lock_init(&fence_lock); spin_lock_init(&fence_lock);
for (usage = DMA_RESV_USAGE_WRITE; usage <= DMA_RESV_USAGE_READ; for (usage = DMA_RESV_USAGE_KERNEL; usage <= DMA_RESV_USAGE_READ;
++usage) { ++usage) {
r = subtests(tests, (void *)(unsigned long)usage); r = subtests(tests, (void *)(unsigned long)usage);
if (r) if (r)
......
...@@ -117,7 +117,7 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj, ...@@ -117,7 +117,7 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
i915_fence_timeout(i915), i915_fence_timeout(i915),
I915_FENCE_GFP); I915_FENCE_GFP);
dma_resv_add_fence(obj->base.resv, &clflush->base.dma, dma_resv_add_fence(obj->base.resv, &clflush->base.dma,
DMA_RESV_USAGE_WRITE); DMA_RESV_USAGE_KERNEL);
dma_fence_work_commit(&clflush->base); dma_fence_work_commit(&clflush->base);
/* /*
* We must have successfully populated the pages(since we are * We must have successfully populated the pages(since we are
......
...@@ -739,7 +739,7 @@ static int ttm_bo_add_move_fence(struct ttm_buffer_object *bo, ...@@ -739,7 +739,7 @@ static int ttm_bo_add_move_fence(struct ttm_buffer_object *bo,
return ret; return ret;
} }
dma_resv_add_fence(bo->base.resv, fence, DMA_RESV_USAGE_WRITE); dma_resv_add_fence(bo->base.resv, fence, DMA_RESV_USAGE_KERNEL);
ret = dma_resv_reserve_fences(bo->base.resv, 1); ret = dma_resv_reserve_fences(bo->base.resv, 1);
if (unlikely(ret)) { if (unlikely(ret)) {
......
...@@ -508,7 +508,7 @@ static int ttm_bo_move_to_ghost(struct ttm_buffer_object *bo, ...@@ -508,7 +508,7 @@ static int ttm_bo_move_to_ghost(struct ttm_buffer_object *bo,
return ret; return ret;
dma_resv_add_fence(&ghost_obj->base._resv, fence, dma_resv_add_fence(&ghost_obj->base._resv, fence,
DMA_RESV_USAGE_WRITE); DMA_RESV_USAGE_KERNEL);
/** /**
* If we're not moving to fixed memory, the TTM object * If we're not moving to fixed memory, the TTM object
...@@ -562,7 +562,7 @@ int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo, ...@@ -562,7 +562,7 @@ int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
struct ttm_resource_manager *man = ttm_manager_type(bdev, new_mem->mem_type); struct ttm_resource_manager *man = ttm_manager_type(bdev, new_mem->mem_type);
int ret = 0; int ret = 0;
dma_resv_add_fence(bo->base.resv, fence, DMA_RESV_USAGE_WRITE); dma_resv_add_fence(bo->base.resv, fence, DMA_RESV_USAGE_KERNEL);
if (!evict) if (!evict)
ret = ttm_bo_move_to_ghost(bo, fence, man->use_tt); ret = ttm_bo_move_to_ghost(bo, fence, man->use_tt);
else if (!from->use_tt && pipeline) else if (!from->use_tt && pipeline)
......
...@@ -759,7 +759,7 @@ void vmw_bo_fence_single(struct ttm_buffer_object *bo, ...@@ -759,7 +759,7 @@ void vmw_bo_fence_single(struct ttm_buffer_object *bo,
ret = dma_resv_reserve_fences(bo->base.resv, 1); ret = dma_resv_reserve_fences(bo->base.resv, 1);
if (!ret) if (!ret)
dma_resv_add_fence(bo->base.resv, &fence->base, dma_resv_add_fence(bo->base.resv, &fence->base,
DMA_RESV_USAGE_WRITE); DMA_RESV_USAGE_KERNEL);
else else
/* Last resort fallback when we are OOM */ /* Last resort fallback when we are OOM */
dma_fence_wait(&fence->base, false); dma_fence_wait(&fence->base, false);
......
...@@ -55,11 +55,29 @@ struct dma_resv_list; ...@@ -55,11 +55,29 @@ struct dma_resv_list;
* This enum describes the different use cases for a dma_resv object and * This enum describes the different use cases for a dma_resv object and
* controls which fences are returned when queried. * controls which fences are returned when queried.
* *
* An important fact is that there is the order WRITE<READ and when the * An important fact is that there is the order KERNEL<WRITE<READ and
* dma_resv object is asked for fences for one use case the fences for the * when the dma_resv object is asked for fences for one use case the fences
* lower use case are returned as well. * for the lower use case are returned as well.
*
* For example when asking for WRITE fences then the KERNEL fences are returned
* as well. Similar when asked for READ fences then both WRITE and KERNEL
* fences are returned as well.
*/ */
enum dma_resv_usage { enum dma_resv_usage {
/**
* @DMA_RESV_USAGE_KERNEL: For in kernel memory management only.
*
* This should only be used for things like copying or clearing memory
* with a DMA hardware engine for the purpose of kernel memory
* management.
*
* Drivers *always* must wait for those fences before accessing the
* resource protected by the dma_resv object. The only exception for
* that is when the resource is known to be locked down in place by
* pinning it previously.
*/
DMA_RESV_USAGE_KERNEL,
/** /**
* @DMA_RESV_USAGE_WRITE: Implicit write synchronization. * @DMA_RESV_USAGE_WRITE: Implicit write synchronization.
* *
......
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