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Commit b4aa4876 authored by Paul Cercueil's avatar Paul Cercueil Committed by Linus Walleij
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pinctrl: ingenic: Rename registers from JZ4760_GPIO_* to JZ4770_GPIO_* 

Now that JZ4760 support has been fixed, it looks wrong to have
JZ4760_GPIO_* registers being written if the SoC is a JZ4770 or later.
Signed-off-by: default avatarPaul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20201211232810.261565-2-paul@crapouillou.netSigned-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 9a85c09a
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Showing with 27 additions and 27 deletions
drivers/pinctrl/pinctrl-ingenic.c
View file @ b4aa4876
...@@ -37,11 +37,11 @@ ...@@ -37,11 +37,11 @@
#define JZ4740_GPIO_TRIG 0x70 #define JZ4740_GPIO_TRIG 0x70
#define JZ4740_GPIO_FLAG 0x80 #define JZ4740_GPIO_FLAG 0x80
#define JZ4760_GPIO_INT 0x10 #define JZ4770_GPIO_INT 0x10
#define JZ4760_GPIO_PAT1 0x30 #define JZ4770_GPIO_PAT1 0x30
#define JZ4760_GPIO_PAT0 0x40 #define JZ4770_GPIO_PAT0 0x40
#define JZ4760_GPIO_FLAG 0x50 #define JZ4770_GPIO_FLAG 0x50
#define JZ4760_GPIO_PEN 0x70 #define JZ4770_GPIO_PEN 0x70
#define X1830_GPIO_PEL 0x110 #define X1830_GPIO_PEL 0x110
#define X1830_GPIO_PEH 0x120 #define X1830_GPIO_PEH 0x120
...@@ -1689,7 +1689,7 @@ static void ingenic_gpio_set_value(struct ingenic_gpio_chip *jzgc, ...@@ -1689,7 +1689,7 @@ static void ingenic_gpio_set_value(struct ingenic_gpio_chip *jzgc,
u8 offset, int value) u8 offset, int value)
{ {
if (jzgc->jzpc->info->version >= ID_JZ4770) if (jzgc->jzpc->info->version >= ID_JZ4770)
ingenic_gpio_set_bit(jzgc, JZ4760_GPIO_PAT0, offset, !!value); ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_PAT0, offset, !!value);
else else
ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_DATA, offset, !!value); ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_DATA, offset, !!value);
} }
...@@ -1719,8 +1719,8 @@ static void irq_set_type(struct ingenic_gpio_chip *jzgc, ...@@ -1719,8 +1719,8 @@ static void irq_set_type(struct ingenic_gpio_chip *jzgc,
} }
if (jzgc->jzpc->info->version >= ID_JZ4770) { if (jzgc->jzpc->info->version >= ID_JZ4770) {
reg1 = JZ4760_GPIO_PAT1; reg1 = JZ4770_GPIO_PAT1;
reg2 = JZ4760_GPIO_PAT0; reg2 = JZ4770_GPIO_PAT0;
} else { } else {
reg1 = JZ4740_GPIO_TRIG; reg1 = JZ4740_GPIO_TRIG;
reg2 = JZ4740_GPIO_DIR; reg2 = JZ4740_GPIO_DIR;
...@@ -1759,7 +1759,7 @@ static void ingenic_gpio_irq_enable(struct irq_data *irqd) ...@@ -1759,7 +1759,7 @@ static void ingenic_gpio_irq_enable(struct irq_data *irqd)
int irq = irqd->hwirq; int irq = irqd->hwirq;
if (jzgc->jzpc->info->version >= ID_JZ4770) if (jzgc->jzpc->info->version >= ID_JZ4770)
ingenic_gpio_set_bit(jzgc, JZ4760_GPIO_INT, irq, true); ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_INT, irq, true);
else else
ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, true); ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, true);
...@@ -1775,7 +1775,7 @@ static void ingenic_gpio_irq_disable(struct irq_data *irqd) ...@@ -1775,7 +1775,7 @@ static void ingenic_gpio_irq_disable(struct irq_data *irqd)
ingenic_gpio_irq_mask(irqd); ingenic_gpio_irq_mask(irqd);
if (jzgc->jzpc->info->version >= ID_JZ4770) if (jzgc->jzpc->info->version >= ID_JZ4770)
ingenic_gpio_set_bit(jzgc, JZ4760_GPIO_INT, irq, false); ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_INT, irq, false);
else else
ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, false); ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_SELECT, irq, false);
} }
...@@ -1800,7 +1800,7 @@ static void ingenic_gpio_irq_ack(struct irq_data *irqd) ...@@ -1800,7 +1800,7 @@ static void ingenic_gpio_irq_ack(struct irq_data *irqd)
} }
if (jzgc->jzpc->info->version >= ID_JZ4770) if (jzgc->jzpc->info->version >= ID_JZ4770)
ingenic_gpio_set_bit(jzgc, JZ4760_GPIO_FLAG, irq, false); ingenic_gpio_set_bit(jzgc, JZ4770_GPIO_FLAG, irq, false);
else else
ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_DATA, irq, true); ingenic_gpio_set_bit(jzgc, JZ4740_GPIO_DATA, irq, true);
} }
...@@ -1857,7 +1857,7 @@ static void ingenic_gpio_irq_handler(struct irq_desc *desc) ...@@ -1857,7 +1857,7 @@ static void ingenic_gpio_irq_handler(struct irq_desc *desc)
chained_irq_enter(irq_chip, desc); chained_irq_enter(irq_chip, desc);
if (jzgc->jzpc->info->version >= ID_JZ4770) if (jzgc->jzpc->info->version >= ID_JZ4770)
flag = ingenic_gpio_read_reg(jzgc, JZ4760_GPIO_FLAG); flag = ingenic_gpio_read_reg(jzgc, JZ4770_GPIO_FLAG);
else else
flag = ingenic_gpio_read_reg(jzgc, JZ4740_GPIO_FLAG); flag = ingenic_gpio_read_reg(jzgc, JZ4740_GPIO_FLAG);
...@@ -1939,8 +1939,8 @@ static int ingenic_gpio_get_direction(struct gpio_chip *gc, unsigned int offset) ...@@ -1939,8 +1939,8 @@ static int ingenic_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
unsigned int pin = gc->base + offset; unsigned int pin = gc->base + offset;
if (jzpc->info->version >= ID_JZ4770) { if (jzpc->info->version >= ID_JZ4770) {
if (ingenic_get_pin_config(jzpc, pin, JZ4760_GPIO_INT) || if (ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_INT) ||
ingenic_get_pin_config(jzpc, pin, JZ4760_GPIO_PAT1)) ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_PAT1))
return GPIO_LINE_DIRECTION_IN; return GPIO_LINE_DIRECTION_IN;
return GPIO_LINE_DIRECTION_OUT; return GPIO_LINE_DIRECTION_OUT;
} }
...@@ -1991,16 +1991,16 @@ static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc, ...@@ -1991,16 +1991,16 @@ static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc,
'A' + offt, idx, func); 'A' + offt, idx, func);
if (jzpc->info->version >= ID_X1000) { if (jzpc->info->version >= ID_X1000) {
ingenic_shadow_config_pin(jzpc, pin, JZ4760_GPIO_INT, false); ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
ingenic_shadow_config_pin(jzpc, pin, GPIO_MSK, false); ingenic_shadow_config_pin(jzpc, pin, GPIO_MSK, false);
ingenic_shadow_config_pin(jzpc, pin, JZ4760_GPIO_PAT1, func & 0x2); ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, func & 0x2);
ingenic_shadow_config_pin(jzpc, pin, JZ4760_GPIO_PAT0, func & 0x1); ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_PAT0, func & 0x1);
ingenic_shadow_config_pin_load(jzpc, pin); ingenic_shadow_config_pin_load(jzpc, pin);
} else if (jzpc->info->version >= ID_JZ4770) { } else if (jzpc->info->version >= ID_JZ4770) {
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_INT, false); ingenic_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
ingenic_config_pin(jzpc, pin, GPIO_MSK, false); ingenic_config_pin(jzpc, pin, GPIO_MSK, false);
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PAT1, func & 0x2); ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, func & 0x2);
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PAT0, func & 0x1); ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT0, func & 0x1);
} else { } else {
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_FUNC, true); ingenic_config_pin(jzpc, pin, JZ4740_GPIO_FUNC, true);
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_TRIG, func & 0x2); ingenic_config_pin(jzpc, pin, JZ4740_GPIO_TRIG, func & 0x2);
...@@ -2057,14 +2057,14 @@ static int ingenic_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, ...@@ -2057,14 +2057,14 @@ static int ingenic_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
'A' + offt, idx, input ? "in" : "out"); 'A' + offt, idx, input ? "in" : "out");
if (jzpc->info->version >= ID_X1000) { if (jzpc->info->version >= ID_X1000) {
ingenic_shadow_config_pin(jzpc, pin, JZ4760_GPIO_INT, false); ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
ingenic_shadow_config_pin(jzpc, pin, GPIO_MSK, true); ingenic_shadow_config_pin(jzpc, pin, GPIO_MSK, true);
ingenic_shadow_config_pin(jzpc, pin, JZ4760_GPIO_PAT1, input); ingenic_shadow_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, input);
ingenic_shadow_config_pin_load(jzpc, pin); ingenic_shadow_config_pin_load(jzpc, pin);
} else if (jzpc->info->version >= ID_JZ4770) { } else if (jzpc->info->version >= ID_JZ4770) {
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_INT, false); ingenic_config_pin(jzpc, pin, JZ4770_GPIO_INT, false);
ingenic_config_pin(jzpc, pin, GPIO_MSK, true); ingenic_config_pin(jzpc, pin, GPIO_MSK, true);
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PAT1, input); ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, input);
} else { } else {
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_SELECT, false); ingenic_config_pin(jzpc, pin, JZ4740_GPIO_SELECT, false);
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DIR, !input); ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DIR, !input);
...@@ -2092,7 +2092,7 @@ static int ingenic_pinconf_get(struct pinctrl_dev *pctldev, ...@@ -2092,7 +2092,7 @@ static int ingenic_pinconf_get(struct pinctrl_dev *pctldev,
bool pull; bool pull;
if (jzpc->info->version >= ID_JZ4770) if (jzpc->info->version >= ID_JZ4770)
pull = !ingenic_get_pin_config(jzpc, pin, JZ4760_GPIO_PEN); pull = !ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_PEN);
else else
pull = !ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_PULL_DIS); pull = !ingenic_get_pin_config(jzpc, pin, JZ4740_GPIO_PULL_DIS);
...@@ -2142,7 +2142,7 @@ static void ingenic_set_bias(struct ingenic_pinctrl *jzpc, ...@@ -2142,7 +2142,7 @@ static void ingenic_set_bias(struct ingenic_pinctrl *jzpc,
} }
} else if (jzpc->info->version >= ID_JZ4770) { } else if (jzpc->info->version >= ID_JZ4770) {
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PEN, !bias); ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PEN, !bias);
} else { } else {
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_PULL_DIS, !bias); ingenic_config_pin(jzpc, pin, JZ4740_GPIO_PULL_DIS, !bias);
} }
...@@ -2152,7 +2152,7 @@ static void ingenic_set_output_level(struct ingenic_pinctrl *jzpc, ...@@ -2152,7 +2152,7 @@ static void ingenic_set_output_level(struct ingenic_pinctrl *jzpc,
unsigned int pin, bool high) unsigned int pin, bool high)
{ {
if (jzpc->info->version >= ID_JZ4770) if (jzpc->info->version >= ID_JZ4770)
ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PAT0, high); ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT0, high);
else else
ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DATA, high); ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DATA, high);
} }
......
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