Commit b9e23f32 authored by Vignesh R's avatar Vignesh R Committed by Paul Walmsley

ARM: OMAP2+: DRA7: clockdomain: change l4per2_7xx_clkdm to SW_WKUP

Legacy IPs like PWMSS, present under l4per2_7xx_clkdm, cannot support
smart-idle when its clock domain is in HW_AUTO on DRA7 SoCs. Hence,
program clock domain to SW_WKUP.
Signed-off-by: default avatarVignesh R <vigneshr@ti.com>
Acked-by: default avatarTero Kristo <t-kristo@ti.com>
Reviewed-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Cc: <stable@vger.kernel.org>
parent d770e558
...@@ -331,7 +331,7 @@ static struct clockdomain l4per2_7xx_clkdm = { ...@@ -331,7 +331,7 @@ static struct clockdomain l4per2_7xx_clkdm = {
.dep_bit = DRA7XX_L4PER2_STATDEP_SHIFT, .dep_bit = DRA7XX_L4PER2_STATDEP_SHIFT,
.wkdep_srcs = l4per2_wkup_sleep_deps, .wkdep_srcs = l4per2_wkup_sleep_deps,
.sleepdep_srcs = l4per2_wkup_sleep_deps, .sleepdep_srcs = l4per2_wkup_sleep_deps,
.flags = CLKDM_CAN_HWSUP_SWSUP, .flags = CLKDM_CAN_SWSUP,
}; };
static struct clockdomain mpu0_7xx_clkdm = { static struct clockdomain mpu0_7xx_clkdm = {
......
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