Commit bb4b6201 authored by Shunqian Zheng's avatar Shunqian Zheng Committed by Heiko Stuebner

arm64: dts: rockchip: set to CCI clock of RK3399 to 600M

Per testing, this can reduce the memory latency and d8 gets
better scores.
Signed-off-by: default avatarShunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 0895b3a8
......@@ -935,7 +935,7 @@ cru: clock-controller@ff760000 {
<&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
<&cru PCLK_PERIHP>,
<&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
<&cru PCLK_PERILP0>,
<&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
assigned-clock-rates =
<594000000>, <800000000>,
......@@ -943,7 +943,7 @@ cru: clock-controller@ff760000 {
<150000000>, <75000000>,
<37500000>,
<100000000>, <100000000>,
<50000000>,
<50000000>, <600000000>,
<100000000>, <50000000>;
};
......
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