Commit bcfc2ab7 authored by Jarkko Nikula's avatar Jarkko Nikula Committed by Wolfram Sang

i2c: i801: Add support for Intel Meteor Lake PCH-S

Add SMBus PCI ID on Intel Meteor Lake PCH-S.
Signed-off-by: default avatarJarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@kernel.org>
Reviewed-by: default avatarJean Delvare <jdelvare@suse.de>
Signed-off-by: default avatarWolfram Sang <wsa@kernel.org>
parent e755ef00
...@@ -46,7 +46,7 @@ Supported adapters: ...@@ -46,7 +46,7 @@ Supported adapters:
* Intel Emmitsburg (PCH) * Intel Emmitsburg (PCH)
* Intel Alder Lake (PCH) * Intel Alder Lake (PCH)
* Intel Raptor Lake (PCH) * Intel Raptor Lake (PCH)
* Intel Meteor Lake (SOC) * Intel Meteor Lake (SOC and PCH)
Datasheets: Publicly available at the Intel website Datasheets: Publicly available at the Intel website
......
...@@ -157,7 +157,7 @@ config I2C_I801 ...@@ -157,7 +157,7 @@ config I2C_I801
Emmitsburg (PCH) Emmitsburg (PCH)
Alder Lake (PCH) Alder Lake (PCH)
Raptor Lake (PCH) Raptor Lake (PCH)
Meteor Lake (SOC) Meteor Lake (SOC and PCH)
This driver can also be built as a module. If so, the module This driver can also be built as a module. If so, the module
will be called i2c-i801. will be called i2c-i801.
......
...@@ -78,6 +78,7 @@ ...@@ -78,6 +78,7 @@
* Raptor Lake-S (PCH) 0x7a23 32 hard yes yes yes * Raptor Lake-S (PCH) 0x7a23 32 hard yes yes yes
* Meteor Lake-P (SOC) 0x7e22 32 hard yes yes yes * Meteor Lake-P (SOC) 0x7e22 32 hard yes yes yes
* Meteor Lake SoC-S (SOC) 0xae22 32 hard yes yes yes * Meteor Lake SoC-S (SOC) 0xae22 32 hard yes yes yes
* Meteor Lake PCH-S (PCH) 0x7f23 32 hard yes yes yes
* *
* Features supported by this driver: * Features supported by this driver:
* Software PEC no * Software PEC no
...@@ -234,6 +235,7 @@ ...@@ -234,6 +235,7 @@
#define PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_S_SMBUS 0x7a23 #define PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_S_SMBUS 0x7a23
#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS 0x7aa3 #define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS 0x7aa3
#define PCI_DEVICE_ID_INTEL_METEOR_LAKE_P_SMBUS 0x7e22 #define PCI_DEVICE_ID_INTEL_METEOR_LAKE_P_SMBUS 0x7e22
#define PCI_DEVICE_ID_INTEL_METEOR_LAKE_PCH_S_SMBUS 0x7f23
#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22
#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS 0x8ca2 #define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS 0x8ca2
#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS 0x8d22 #define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS 0x8d22
...@@ -1041,6 +1043,7 @@ static const struct pci_device_id i801_ids[] = { ...@@ -1041,6 +1043,7 @@ static const struct pci_device_id i801_ids[] = {
{ PCI_DEVICE_DATA(INTEL, RAPTOR_LAKE_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, { PCI_DEVICE_DATA(INTEL, RAPTOR_LAKE_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
{ PCI_DEVICE_DATA(INTEL, METEOR_LAKE_P_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, { PCI_DEVICE_DATA(INTEL, METEOR_LAKE_P_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
{ PCI_DEVICE_DATA(INTEL, METEOR_LAKE_SOC_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) }, { PCI_DEVICE_DATA(INTEL, METEOR_LAKE_SOC_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
{ PCI_DEVICE_DATA(INTEL, METEOR_LAKE_PCH_S_SMBUS, FEATURES_ICH5 | FEATURE_TCO_CNL) },
{ 0, } { 0, }
}; };
......
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