Commit c1609946 authored by David S. Miller's avatar David S. Miller

Merge branch 'qed-Fix-series'

Sudarsana Reddy Kalluru says:

====================
qed* Fix series.

The patch series addresses couple of issues in the recent commits.
Patch (1) populates the actual dump-size of config attribute instead of
providing a fixed size value.
Patch(2) updates frame format of flash config buffer as required by
management FW (MFW).

Please consider applying it to net-next.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 2f2fa16e 2da244a5
...@@ -2240,12 +2240,13 @@ static int qed_nvm_flash_image_validate(struct qed_dev *cdev, ...@@ -2240,12 +2240,13 @@ static int qed_nvm_flash_image_validate(struct qed_dev *cdev,
/* Binary file format - /* Binary file format -
* /----------------------------------------------------------------------\ * /----------------------------------------------------------------------\
* 0B | 0x5 [command index] | * 0B | 0x5 [command index] |
* 4B | Entity ID | Reserved | Number of config attributes | * 4B | Number of config attributes | Reserved |
* 8B | Config ID | Length | Value | * 4B | Config ID | Entity ID | Length |
* 4B | Value |
* | | * | |
* \----------------------------------------------------------------------/ * \----------------------------------------------------------------------/
* There can be several cfg_id-Length-Value sets as specified by 'Number of...'. * There can be several cfg_id-entity_id-Length-Value sets as specified by
* Entity ID - A non zero entity value for which the config need to be updated. * 'Number of config attributes'.
* *
* The API parses config attributes from the user provided buffer and flashes * The API parses config attributes from the user provided buffer and flashes
* them to the respective NVM path using Management FW inerface. * them to the respective NVM path using Management FW inerface.
...@@ -2265,18 +2266,17 @@ static int qed_nvm_flash_cfg_write(struct qed_dev *cdev, const u8 **data) ...@@ -2265,18 +2266,17 @@ static int qed_nvm_flash_cfg_write(struct qed_dev *cdev, const u8 **data)
/* NVM CFG ID attribute header */ /* NVM CFG ID attribute header */
*data += 4; *data += 4;
entity_id = **data;
*data += 2;
count = *((u16 *)*data); count = *((u16 *)*data);
*data += 2; *data += 4;
DP_VERBOSE(cdev, NETIF_MSG_DRV, DP_VERBOSE(cdev, NETIF_MSG_DRV,
"Read config ids: entity id %02x num _attrs = %0d\n", "Read config ids: num_attrs = %0d\n", count);
entity_id, count);
/* NVM CFG ID attributes */ /* NVM CFG ID attributes */
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
cfg_id = *((u16 *)*data); cfg_id = *((u16 *)*data);
*data += 2; *data += 2;
entity_id = **data;
(*data)++;
len = **data; len = **data;
(*data)++; (*data)++;
memcpy(buf, *data, len); memcpy(buf, *data, len);
...@@ -2286,7 +2286,8 @@ static int qed_nvm_flash_cfg_write(struct qed_dev *cdev, const u8 **data) ...@@ -2286,7 +2286,8 @@ static int qed_nvm_flash_cfg_write(struct qed_dev *cdev, const u8 **data)
QED_NVM_CFG_SET_FLAGS; QED_NVM_CFG_SET_FLAGS;
DP_VERBOSE(cdev, NETIF_MSG_DRV, DP_VERBOSE(cdev, NETIF_MSG_DRV,
"cfg_id = %d len = %d\n", cfg_id, len); "cfg_id = %d entity = %d len = %d\n", cfg_id,
entity_id, len);
rc = qed_mcp_nvm_set_cfg(hwfn, ptt, cfg_id, entity_id, flags, rc = qed_mcp_nvm_set_cfg(hwfn, ptt, cfg_id, entity_id, flags,
buf, len); buf, len);
if (rc) { if (rc) {
...@@ -2300,6 +2301,31 @@ static int qed_nvm_flash_cfg_write(struct qed_dev *cdev, const u8 **data) ...@@ -2300,6 +2301,31 @@ static int qed_nvm_flash_cfg_write(struct qed_dev *cdev, const u8 **data)
return rc; return rc;
} }
#define QED_MAX_NVM_BUF_LEN 32
static int qed_nvm_flash_cfg_len(struct qed_dev *cdev, u32 cmd)
{
struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
u8 buf[QED_MAX_NVM_BUF_LEN];
struct qed_ptt *ptt;
u32 len;
int rc;
ptt = qed_ptt_acquire(hwfn);
if (!ptt)
return QED_MAX_NVM_BUF_LEN;
rc = qed_mcp_nvm_get_cfg(hwfn, ptt, cmd, 0, QED_NVM_CFG_GET_FLAGS, buf,
&len);
if (rc || !len) {
DP_ERR(cdev, "Error %d reading %d\n", rc, cmd);
len = QED_MAX_NVM_BUF_LEN;
}
qed_ptt_release(hwfn, ptt);
return len;
}
static int qed_nvm_flash_cfg_read(struct qed_dev *cdev, u8 **data, static int qed_nvm_flash_cfg_read(struct qed_dev *cdev, u8 **data,
u32 cmd, u32 entity_id) u32 cmd, u32 entity_id)
{ {
...@@ -2657,6 +2683,7 @@ const struct qed_common_ops qed_common_ops_pass = { ...@@ -2657,6 +2683,7 @@ const struct qed_common_ops qed_common_ops_pass = {
.read_module_eeprom = &qed_read_module_eeprom, .read_module_eeprom = &qed_read_module_eeprom,
.get_affin_hwfn_idx = &qed_get_affin_hwfn_idx, .get_affin_hwfn_idx = &qed_get_affin_hwfn_idx,
.read_nvm_cfg = &qed_nvm_flash_cfg_read, .read_nvm_cfg = &qed_nvm_flash_cfg_read,
.read_nvm_cfg_len = &qed_nvm_flash_cfg_len,
.set_grc_config = &qed_set_grc_config, .set_grc_config = &qed_set_grc_config,
}; };
......
...@@ -49,7 +49,6 @@ ...@@ -49,7 +49,6 @@
#define QEDE_SELFTEST_POLL_COUNT 100 #define QEDE_SELFTEST_POLL_COUNT 100
#define QEDE_DUMP_VERSION 0x1 #define QEDE_DUMP_VERSION 0x1
#define QEDE_DUMP_NVM_BUF_LEN 32
#define QEDE_DUMP_NVM_ARG_COUNT 2 #define QEDE_DUMP_NVM_ARG_COUNT 2
static const struct { static const struct {
...@@ -2026,7 +2025,8 @@ static int qede_get_dump_flag(struct net_device *dev, ...@@ -2026,7 +2025,8 @@ static int qede_get_dump_flag(struct net_device *dev,
switch (edev->dump_info.cmd) { switch (edev->dump_info.cmd) {
case QEDE_DUMP_CMD_NVM_CFG: case QEDE_DUMP_CMD_NVM_CFG:
dump->flag = QEDE_DUMP_CMD_NVM_CFG; dump->flag = QEDE_DUMP_CMD_NVM_CFG;
dump->len = QEDE_DUMP_NVM_BUF_LEN; dump->len = edev->ops->common->read_nvm_cfg_len(edev->cdev,
edev->dump_info.args[0]);
break; break;
case QEDE_DUMP_CMD_GRCDUMP: case QEDE_DUMP_CMD_GRCDUMP:
dump->flag = QEDE_DUMP_CMD_GRCDUMP; dump->flag = QEDE_DUMP_CMD_GRCDUMP;
...@@ -2051,9 +2051,8 @@ static int qede_get_dump_data(struct net_device *dev, ...@@ -2051,9 +2051,8 @@ static int qede_get_dump_data(struct net_device *dev,
if (!edev->ops || !edev->ops->common) { if (!edev->ops || !edev->ops->common) {
DP_ERR(edev, "Edev ops not populated\n"); DP_ERR(edev, "Edev ops not populated\n");
edev->dump_info.cmd = QEDE_DUMP_CMD_NONE; rc = -EINVAL;
edev->dump_info.num_args = 0; goto err;
return -EINVAL;
} }
switch (edev->dump_info.cmd) { switch (edev->dump_info.cmd) {
...@@ -2062,7 +2061,8 @@ static int qede_get_dump_data(struct net_device *dev, ...@@ -2062,7 +2061,8 @@ static int qede_get_dump_data(struct net_device *dev,
DP_ERR(edev, "Arg count = %d required = %d\n", DP_ERR(edev, "Arg count = %d required = %d\n",
edev->dump_info.num_args, edev->dump_info.num_args,
QEDE_DUMP_NVM_ARG_COUNT); QEDE_DUMP_NVM_ARG_COUNT);
return -EINVAL; rc = -EINVAL;
goto err;
} }
rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf, rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf,
edev->dump_info.args[0], edev->dump_info.args[0],
...@@ -2078,8 +2078,10 @@ static int qede_get_dump_data(struct net_device *dev, ...@@ -2078,8 +2078,10 @@ static int qede_get_dump_data(struct net_device *dev,
break; break;
} }
err:
edev->dump_info.cmd = QEDE_DUMP_CMD_NONE; edev->dump_info.cmd = QEDE_DUMP_CMD_NONE;
edev->dump_info.num_args = 0; edev->dump_info.num_args = 0;
memset(edev->dump_info.args, 0, sizeof(edev->dump_info.args));
return rc; return rc;
} }
......
...@@ -1143,6 +1143,14 @@ struct qed_common_ops { ...@@ -1143,6 +1143,14 @@ struct qed_common_ops {
*/ */
int (*read_nvm_cfg)(struct qed_dev *cdev, u8 **buf, u32 cmd, int (*read_nvm_cfg)(struct qed_dev *cdev, u8 **buf, u32 cmd,
u32 entity_id); u32 entity_id);
/**
* @brief read_nvm_cfg - Read NVM config attribute value.
* @param cdev
* @param cmd - NVM CFG command id
*
* @return config id length, 0 on error.
*/
int (*read_nvm_cfg_len)(struct qed_dev *cdev, u32 cmd);
/** /**
* @brief set_grc_config - Configure value for grc config id. * @brief set_grc_config - Configure value for grc config id.
......
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