Commit c1fcc4c9 authored by Martyn Welch's avatar Martyn Welch Committed by Greg Kroah-Hartman

Staging: VME: PIO2: Correct irq reset

The loop used to reset the interrupt masks has faulty logic. There are 4
banks of 8 I/O, however each mask is comprised of 2 bits and thus there are
8 sets of registers to clear. Driver was wrongly equating this with 8 banks
leading to a us writing past the end of the "bank" array (used to store mask
configuration as these registers are write only) and thus causing memory
corruption. Clear both registers of masks for each bank and half iterations.
Reported-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: default avatarMartyn Welch <martyn.welch@ge.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 6d3ff1cc
......@@ -159,9 +159,14 @@ int pio2_gpio_reset(struct pio2_card *card)
}
/* Set input interrupt masks */
for (i = 0; i < 8; i++) {
for (i = 0; i < 4; i++) {
retval = vme_master_write(card->window, &data, 1,
PIO2_REGS_INT_MASK[i * 2]);
if (retval < 0)
return retval;
retval = vme_master_write(card->window, &data, 1,
PIO2_REGS_INT_MASK[i]);
PIO2_REGS_INT_MASK[(i * 2) + 1]);
if (retval < 0)
return retval;
......
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