Commit c2065272 authored by James Simmons's avatar James Simmons

I810 fbdev updates. Cursor fix for ati mach 64 cards on big endian machines....

I810 fbdev updates. Cursor fix for ati mach 64 cards on big endian machines. Buffer over flow fix for fbcon putcs function. C99 initializers for the STI console drivers.Voodoo 1/2 and NVIDIA driver updates.
parent 10d43ec6
......@@ -2605,8 +2605,8 @@ void cleanup_module(void)
if (info->screen_base)
iounmap((void *) info->screen_base);
#ifdef __BIG_ENDIAN
if (info->cursor && info->cursor->ram)
iounmap(info->cursor->ram);
if (info->cursor && par->cursor->ram)
iounmap(par->cursor->ram);
#endif
#endif
if (info->cursor)
......
......@@ -378,6 +378,7 @@ void accel_clear(struct vc_data *vc, struct display *p, int sy,
info->fbops->fb_fillrect(info, &region);
}
#define FB_PIXMAPSIZE 8192
void accel_putcs(struct vc_data *vc, struct display *p,
const unsigned short *s, int count, int yy, int xx)
{
......@@ -387,7 +388,7 @@ void accel_putcs(struct vc_data *vc, struct display *p,
unsigned int cellsize = vc->vc_font.height * width;
struct fb_image image;
u16 c = scr_readw(s);
static u8 pixmap[8192];
static u8 pixmap[FB_PIXMAPSIZE];
image.fg_color = attr_fgcol(p, c);
image.bg_color = attr_bgcol(p, c);
......@@ -396,19 +397,24 @@ void accel_putcs(struct vc_data *vc, struct display *p,
image.height = vc->vc_font.height;
image.depth = 1;
/* pixmap = kmalloc((info->var.bits_per_pixel + 7) >> 3 *
vc->vc_font.height, GFP_KERNEL);
*/
if (!(vc->vc_font.width & 7) && pixmap != NULL) {
unsigned int pitch = width * count, i, j;
if (!(vc->vc_font.width & 7)) {
unsigned int pitch, cnt, i, j, k;
unsigned int maxcnt = FB_PIXMAPSIZE/(vc->vc_font.height * width);
char *src, *dst, *dst0;
dst0 = pixmap;
image.width = vc->vc_font.width * count;
image.data = pixmap;
while (count--) {
src = p->fontdata + (scr_readw(s++) & charmask) * cellsize;
while (count) {
if (count > maxcnt)
cnt = k = maxcnt;
else
cnt = k = count;
dst0 = pixmap;
pitch = width * cnt;
image.width = vc->vc_font.width * cnt;
while (k--) {
src = p->fontdata + (scr_readw(s++)&charmask)*
cellsize;
dst = dst0;
for (i = image.height; i--; ) {
for (j = 0; j < width; j++)
......@@ -417,22 +423,21 @@ void accel_putcs(struct vc_data *vc, struct display *p,
}
dst0 += width;
}
info->fbops->fb_imageblit(info, &image);
if (info->fbops->fb_sync)
info->fbops->fb_sync(info);
image.dx += cnt * vc->vc_font.width;
count -= cnt;
}
} else {
image.width = vc->vc_font.width;
while (count--) {
image.data = p->fontdata +
(scr_readw(s++) & charmask) * vc->vc_font.height * width;
(scr_readw(s++) & charmask) *
vc->vc_font.height * width;
info->fbops->fb_imageblit(info, &image);
image.dx += vc->vc_font.width;
}
}
/*
if (pixmap);
kfree(pixmap);
*/
}
void accel_clear_margins(struct vc_data *vc, struct display *p,
......@@ -1271,16 +1276,9 @@ static int scrollback_current = 0;
int update_var(int con, struct fb_info *info)
{
int err;
if (con == info->currcon)
return fb_pan_display(&info->var, info);
if (con == info->currcon) {
if (info->fbops->fb_pan_display) {
if ((err =
info->fbops->fb_pan_display(&info->var,
info)))
return err;
}
}
return 0;
}
......
......@@ -365,26 +365,26 @@ void sticon_save_screen(struct vc_data *conp)
}
struct consw sti_con = {
con_startup: sticon_startup,
con_init: sticon_init,
con_deinit: sticon_deinit,
con_clear: sticon_clear,
con_putc: sticon_putc,
con_putcs: sticon_putcs,
con_cursor: sticon_cursor,
con_scroll: sticon_scroll,
con_bmove: sticon_bmove,
con_switch: sticon_switch,
con_blank: sticon_blank,
con_font_op: sticon_font_op,
con_set_palette: sticon_set_palette,
con_scrolldelta: sticon_scrolldelta,
con_set_origin: sticon_set_origin,
con_save_screen: sticon_save_screen,
con_build_attr: sticon_build_attr,
con_invert_region: sticon_invert_region,
con_screen_pos: sticon_screen_pos,
con_getxy: sticon_getxy,
.con_startup = sticon_startup,
.con_init = sticon_init,
.con_deinit = sticon_deinit,
.con_clear = sticon_clear,
.con_putc = sticon_putc,
.con_putcs = sticon_putcs,
.con_cursor = sticon_cursor,
.con_scroll = sticon_scroll,
.con_bmove = sticon_bmove,
.con_switch = sticon_switch,
.con_blank = sticon_blank,
.con_font_op = sticon_font_op,
.con_set_palette = sticon_set_palette,
.con_scrolldelta = sticon_scrolldelta,
.con_set_origin = sticon_set_origin,
.con_save_screen = sticon_save_screen,
.con_build_attr = sticon_build_attr,
.con_invert_region = sticon_invert_region,
.con_screen_pos = sticon_screen_pos,
.con_getxy = sticon_getxy,
};
......
......@@ -97,8 +97,8 @@ sti_init_graph(struct sti_struct *sti)
}
static const struct sti_conf_flags default_conf_flags = {
wait: STI_WAIT,
};
.wait = STI_WAIT,
};
void
sti_inq_conf(struct sti_struct *sti)
......@@ -118,8 +118,8 @@ sti_inq_conf(struct sti_struct *sti)
}
static const struct sti_font_flags default_font_flags = {
wait: STI_WAIT,
non_text: 0,
.wait = STI_WAIT,
.non_text = 0,
};
void
......
......@@ -1189,5 +1189,6 @@ EXPORT_SYMBOL(registered_fb);
EXPORT_SYMBOL(fb_show_logo);
EXPORT_SYMBOL(fb_set_var);
EXPORT_SYMBOL(fb_blank);
EXPORT_SYMBOL(fb_pan_display);
MODULE_LICENSE("GPL");
......@@ -212,9 +212,7 @@
struct gtt_data {
agp_memory *i810_fb_memory;
agp_memory *i810_iring_memory;
agp_memory *i810_cursor_memory;
agp_memory *i810_pixmap_memory;
};
struct mode_registers {
......
......@@ -27,7 +27,6 @@ static u32 i810fb_rop[] = {
}
extern inline void flush_cache(void);
extern int reinit_agp(struct fb_info *info);
/************************************************************/
......@@ -394,11 +393,6 @@ void i810fb_copyarea(struct fb_info *p, struct fb_copyarea *region)
PAT_COPY_ROP, par->blit_bpp, par);
}
/*
* Blitting is done at 8x8 pixel-array at a time. If map is not
* monochrome or not a multiple of 8x8 pixels, cfb_imageblit will
* be called instead.
*/
void i810fb_imageblit(struct fb_info *p, struct fb_image *image)
{
struct i810fb_par *par = (struct i810fb_par *) p->par;
......@@ -422,9 +416,6 @@ void i810fb_imageblit(struct fb_info *p, struct fb_image *image)
bg = image->bg_color;
break;
case 16:
fg = ((u32 *)(p->pseudo_palette))[image->fg_color];
bg = ((u32 *)(p->pseudo_palette))[image->bg_color];
break;
case 24:
fg = ((u32 *)(p->pseudo_palette))[image->fg_color];
bg = ((u32 *)(p->pseudo_palette))[image->bg_color];
......
......@@ -1221,7 +1221,7 @@ static int encode_fix(struct fb_fix_screeninfo *fix, struct fb_info *info)
memset(fix, 0, sizeof(struct fb_fix_screeninfo));
strcpy(fix->id, i810fb_name);
strcpy(fix->id, "I810");
fix->smem_start = par->fb.physical;
fix->smem_len = par->fb.size;
fix->type = FB_TYPE_PACKED_PIXELS;
......@@ -1519,15 +1519,9 @@ static int i810fb_pan_display(struct fb_var_screeninfo *var,
struct i810fb_par *par = (struct i810fb_par *) info->par;
u32 total;
u8 *mmio = par->mmio_start_virtual;
int xoffset = var->xoffset, yoffset = var->yoffset;
if (xoffset < 0 ||
xoffset+var->xres > var->xres_virtual ||
yoffset < 0 ||
yoffset+var->yres > var->yres_virtual)
return -EINVAL;
total = xoffset * par->depth + yoffset * info->fix.line_length;
total = var->xoffset * par->depth +
var->yoffset * info->fix.line_length;
i810_writel(DPLYBASE, mmio, par->fb.physical + total);
return 0;
......@@ -1575,6 +1569,7 @@ static int i810fb_set_par(struct fb_info *info)
{
struct i810fb_par *par = (struct i810fb_par *) info->par;
decode_var(&info->var, par, info);
i810_load_regs(par);
i810_init_cursor(par);
par->cursor_reset = 1;
......@@ -1586,7 +1581,6 @@ static int i810fb_set_par(struct fb_info *info)
static int i810fb_check_var(struct fb_var_screeninfo *var,
struct fb_info *info)
{
struct i810fb_par *par = (struct i810fb_par *) info->par;
int err;
if (IS_DVT) {
......@@ -1604,7 +1598,6 @@ static int i810fb_check_var(struct fb_var_screeninfo *var,
i810fb_fill_var_timings(var);
set_color_bitfields(var);
decode_var(&info->var, par, info);
return 0;
}
......@@ -1699,13 +1692,14 @@ static struct fb_ops i810fb_ops __initdata = {
.fb_copyarea = i810fb_copyarea,
.fb_imageblit = i810fb_imageblit,
.fb_cursor = i810fb_cursor,
.fb_sync = i810fb_sync,
};
/***********************************************************************
* AGP resource allocation *
***********************************************************************/
static void __devinit i810_fix_pointers(struct i810fb_par *par)
static void __init i810_fix_pointers(struct i810fb_par *par)
{
par->fb.physical = par->aperture.physical+(par->fb.offset << 12);
par->fb.virtual = par->aperture.virtual+(par->fb.offset << 12);
......@@ -1721,7 +1715,7 @@ static void __devinit i810_fix_pointers(struct i810fb_par *par)
(par->pixmap.offset << 12);
}
static void __devinit i810_fix_offsets(struct i810fb_par *par)
static void __init i810_fix_offsets(struct i810fb_par *par)
{
if (vram + 1 > par->aperture.size >> 20)
vram = (par->aperture.size >> 20) - 1;
......@@ -1744,7 +1738,7 @@ static void __devinit i810_fix_offsets(struct i810fb_par *par)
par->cursor_heap.size = 4096;
}
static int __devinit i810_alloc_agp_mem(struct fb_info *info)
static int __init i810_alloc_agp_mem(struct fb_info *info)
{
struct i810fb_par *par = (struct i810fb_par *) info->par;
int size;
......@@ -1809,7 +1803,7 @@ static int __devinit i810_alloc_agp_mem(struct fb_info *info)
* Sets the the user monitor's horizontal and vertical
* frequency limits
*/
static void __devinit i810_init_monspecs(struct fb_info *info)
static void __init i810_init_monspecs(struct fb_info *info)
{
if (!hsync1)
hsync1 = HFMIN;
......@@ -1837,7 +1831,7 @@ static void __devinit i810_init_monspecs(struct fb_info *info)
* @par: pointer to i810fb_par structure
* @info: pointer to current fb_info structure
*/
static void __devinit i810_init_defaults(struct i810fb_par *par,
static void __init i810_init_defaults(struct i810fb_par *par,
struct fb_info *info)
{
if (voffset) {
......@@ -1866,16 +1860,16 @@ static void __devinit i810_init_defaults(struct i810fb_par *par,
vyres = (vram << 20)/(xres*bpp >> 3);
par->i810fb_ops = i810fb_ops;
i810fb_default.xres = xres;
i810fb_default.yres = yres;
i810fb_default.yres_virtual = vyres;
i810fb_default.bits_per_pixel = bpp;
info->var.xres = xres;
info->var.yres = yres;
info->var.yres_virtual = vyres;
info->var.bits_per_pixel = bpp;
if (dcolor)
i810fb_default.nonstd = 1;
info->var.nonstd = 1;
if (par->dev_flags & HAS_ACCELERATION)
i810fb_default.accel_flags = 1;
info->var.accel_flags = 1;
i810_init_monspecs(info);
}
......@@ -1884,7 +1878,7 @@ static void __devinit i810_init_defaults(struct i810fb_par *par,
* i810_init_device - initialize device
* @par: pointer to i810fb_par structure
*/
static void __devinit i810_init_device(struct i810fb_par *par)
static void __init i810_init_device(struct i810fb_par *par)
{
u8 reg, *mmio = par->mmio_start_virtual;
......@@ -1905,7 +1899,7 @@ static void __devinit i810_init_device(struct i810fb_par *par)
i810fb_init_ringbuffer(par);
}
static int __devinit
static int __init
i810_allocate_pci_resource(struct i810fb_par *par,
const struct pci_device_id *entry)
{
......@@ -2014,7 +2008,7 @@ int __init i810fb_setup(char *options)
return 0;
}
static int __devinit i810fb_init_pci (struct pci_dev *dev,
static int __init i810fb_init_pci (struct pci_dev *dev,
const struct pci_device_id *entry)
{
struct fb_info *info;
......@@ -2061,7 +2055,6 @@ static int __devinit i810fb_init_pci (struct pci_dev *dev,
fb_alloc_cmap(&info->cmap, 256, 0);
info->var = i810fb_default;
if ((err = info->fbops->fb_check_var(&info->var, info))) {
i810fb_release_resource(info, par);
return err;
......@@ -2082,6 +2075,7 @@ static int __devinit i810fb_init_pci (struct pci_dev *dev,
info->var.hsync_len + info->var.right_margin);
vfreq = hfreq/(info->var.yres + info->var.upper_margin +
info->var.vsync_len + info->var.lower_margin);
printk("fb: %s v%d.%d.%d%s, Tony Daplas\n"
" Video RAM : %dK\n"
" Mode : %dx%d-%dbpp@%dHz\n"
......@@ -2098,7 +2092,6 @@ static int __devinit i810fb_init_pci (struct pci_dev *dev,
(ext_vga) ? "en" : "dis", (IS_DVT) ?
"Intel(R) DVT" : "VESA GTF (US)");
return 0;
}
......@@ -2144,7 +2137,7 @@ static void i810fb_release_resource(struct fb_info *info,
kfree(info);
}
static void __devexit i810fb_remove_pci(struct pci_dev *dev)
static void __exit i810fb_remove_pci(struct pci_dev *dev)
{
struct fb_info *info = pci_get_drvdata(dev);
struct i810fb_par *par = (struct i810fb_par *) info->par;
......
......@@ -14,9 +14,8 @@
#ifndef __I810_MAIN_H__
#define __I810_MAIN_H__
/* PCI */
static const char *i810_pci_list[] __devinitdata = {
static const char *i810_pci_list[] __initdata = {
"Intel(R) 810 Framebuffer Device" ,
"Intel(R) 810-DC100 Framebuffer Device" ,
"Intel(R) 810E Framebuffer Device" ,
......@@ -25,7 +24,7 @@ static const char *i810_pci_list[] __devinitdata = {
"Intel(R) 815 (Internal Graphics with AGP) Framebuffer Device"
};
static struct pci_device_id i810fb_pci_tbl[] __devinitdata = {
static struct pci_device_id i810fb_pci_tbl[] __initdata = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG1,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG3,
......@@ -41,64 +40,32 @@ static struct pci_device_id i810fb_pci_tbl[] __devinitdata = {
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 }
};
static int __devinit i810fb_init_pci (struct pci_dev *dev,
static int __init i810fb_init_pci (struct pci_dev *dev,
const struct pci_device_id *entry);
static void __devexit i810fb_remove_pci(struct pci_dev *dev);
static void __exit i810fb_remove_pci(struct pci_dev *dev);
static struct pci_driver i810fb_driver = {
.name = "i810fb",
.id_table = i810fb_pci_tbl,
.probe = i810fb_init_pci,
.remove = __devexit_p(i810fb_remove_pci),
.remove = __exit_p(i810fb_remove_pci),
};
static int i810_init __devinitdata = 0;
static int vram __devinitdata = 4;
static int bpp __devinitdata = 8;
static int mtrr __devinitdata = 0;
static int accel __devinitdata = 0;
static int hsync1 __devinitdata = 0;
static int hsync2 __devinitdata = 0;
static int vsync1 __devinitdata = 0;
static int vsync2 __devinitdata = 0;
static int xres __devinitdata = 640;
static int yres __devinitdata = 480;
static int vyres __devinitdata = 0;
static int sync __devinitdata = 0;
static int ext_vga __devinitdata = 0;
static int dcolor __devinitdata = 0;
/* "use once" vars */
static char i810fb_name[16] = "i810fb";
static struct fb_var_screeninfo i810fb_default __devinitdata = {
/* 640x480, 8 bpp */
.xres = 640,
.yres = 480,
.xres_virtual = 640,
.yres_virtual = 480,
.xoffset = 0,
.yoffset = 0,
.bits_per_pixel = 8,
.grayscale = 0,
.red = {0, 8, 0},
.green = {0, 8, 0},
.blue = {0, 8, 0},
.transp = {0, 0, 0},
.nonstd = 0,
.activate = 0,
.height = -1,
.width = -1,
.accel_flags = 0,
.pixclock = 20000,
.left_margin = 64,
.right_margin = 64,
.upper_margin = 32,
.lower_margin = 32,
.hsync_len = 64,
.vsync_len = 2,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED
};
static int i810_init __initdata = 0;
static int vram __initdata = 4;
static int bpp __initdata = 8;
static int mtrr __initdata = 0;
static int accel __initdata = 0;
static int hsync1 __initdata = 0;
static int hsync2 __initdata = 0;
static int vsync1 __initdata = 0;
static int vsync2 __initdata = 0;
static int xres __initdata = 640;
static int yres __initdata = 480;
static int vyres __initdata = 0;
static int sync __initdata = 0;
static int ext_vga __initdata = 0;
static int dcolor __initdata = 0;
/*
* voffset - framebuffer offset in MiB from aperture start address. In order for
......@@ -124,8 +91,8 @@ static struct fb_var_screeninfo i810fb_default __devinitdata = {
*
* Experiment with v_offset to find out which works best for you.
*/
static u32 v_offset_default __devinitdata; /* For 32 MiB Aper size, 8 should be the default */
static u32 voffset __devinitdata = 0;
static u32 v_offset_default __initdata; /* For 32 MiB Aper size, 8 should be the default */
static u32 voffset __initdata = 0;
static int i810fb_cursor(struct fb_info *info, struct fb_cursor *cursor);
......@@ -173,7 +140,7 @@ inline void flush_cache(void)
#ifdef CONFIG_MTRR
#define KERNEL_HAS_MTRR 1
static inline void __devinit set_mtrr(struct i810fb_par *par)
static inline void __init set_mtrr(struct i810fb_par *par)
{
par->mtrr_reg = mtrr_add((u32) par->aperture.physical,
par->aperture.size, MTRR_TYPE_WRCOMB, 1);
......
......@@ -4,4 +4,4 @@
obj-$(CONFIG_FB_RIVA) += rivafb.o
rivafb-objs := fbdev.o riva_hw.o
rivafb-objs := fbdev.o riva_hw.o nv_driver.o
This diff is collapsed.
/* $XConsortium: nv_driver.c /main/3 1996/10/28 05:13:37 kaleb $ */
/*
* Copyright 1996-1997 David J. McKay
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
/*
* GPL licensing note -- nVidia is allowing a liberal interpretation of
* the documentation restriction above, to merely say that this nVidia's
* copyright and disclaimer should be included with all code derived
* from this source. -- Jeff Garzik <jgarzik@pobox.com>, 01/Nov/99
*/
/* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
<jpaana@s2.org> */
/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c,v 1.18 2002/08/0
5 20:47:06 mvojkovi Exp $ */
#include <linux/delay.h>
#include <linux/pci_ids.h>
#include "nv_type.h"
#include "rivafb.h"
#include "nvreg.h"
#ifndef CONFIG_PCI /* sanity check */
#error This driver requires PCI support.
#endif
#define PFX "rivafb: "
static inline unsigned char MISCin(struct riva_par *par)
{
return (VGA_RD08(par->riva.PVIO, 0x3cc));
}
static Bool
riva_is_connected(struct riva_par *par, Bool second)
{
volatile U032 *PRAMDAC = par->riva.PRAMDAC0;
U032 reg52C, reg608;
Bool present;
if(second) PRAMDAC += 0x800;
reg52C = PRAMDAC[0x052C/4];
reg608 = PRAMDAC[0x0608/4];
PRAMDAC[0x0608/4] = reg608 & ~0x00010000;
PRAMDAC[0x052C/4] = reg52C & 0x0000FEEE;
mdelay(1);
PRAMDAC[0x052C/4] |= 1;
par->riva.PRAMDAC0[0x0610/4] = 0x94050140;
par->riva.PRAMDAC0[0x0608/4] |= 0x00001000;
mdelay(1);
present = (PRAMDAC[0x0608/4] & (1 << 28)) ? TRUE : FALSE;
par->riva.PRAMDAC0[0x0608/4] &= 0x0000EFFF;
PRAMDAC[0x052C/4] = reg52C;
PRAMDAC[0x0608/4] = reg608;
return present;
}
static void
riva_override_CRTC(struct riva_par *par)
{
printk(KERN_INFO PFX
"Detected CRTC controller %i being used\n",
par->SecondCRTC ? 1 : 0);
if(par->forceCRTC != -1) {
printk(KERN_INFO PFX
"Forcing usage of CRTC %i\n", par->forceCRTC);
par->SecondCRTC = par->forceCRTC;
}
}
static void
riva_is_second(struct riva_par *par)
{
if (par->FlatPanel == 1) {
switch(par->Chipset) {
case NV_CHIP_GEFORCE4_440_GO:
case NV_CHIP_GEFORCE4_440_GO_M64:
case NV_CHIP_GEFORCE4_420_GO:
case NV_CHIP_GEFORCE4_420_GO_M32:
case NV_CHIP_QUADRO4_500_GOGL:
par->SecondCRTC = TRUE;
break;
default:
par->SecondCRTC = FALSE;
break;
}
} else {
if(riva_is_connected(par, 0)) {
if(par->riva.PRAMDAC0[0x0000052C/4] & 0x100)
par->SecondCRTC = TRUE;
else
par->SecondCRTC = FALSE;
} else
if (riva_is_connected(par, 1)) {
if(par->riva.PRAMDAC0[0x0000252C/4] & 0x100)
par->SecondCRTC = TRUE;
else
par->SecondCRTC = FALSE;
} else /* default */
par->SecondCRTC = FALSE;
}
riva_override_CRTC(par);
}
void
riva_common_setup(struct riva_par *par)
{
par->riva.EnableIRQ = 0;
par->riva.PRAMDAC0 = (unsigned *)(par->ctrl_base + 0x00680000);
par->riva.PFB = (unsigned *)(par->ctrl_base + 0x00100000);
par->riva.PFIFO = (unsigned *)(par->ctrl_base + 0x00002000);
par->riva.PGRAPH = (unsigned *)(par->ctrl_base + 0x00400000);
par->riva.PEXTDEV = (unsigned *)(par->ctrl_base + 0x00101000);
par->riva.PTIMER = (unsigned *)(par->ctrl_base + 0x00009000);
par->riva.PMC = (unsigned *)(par->ctrl_base + 0x00000000);
par->riva.FIFO = (unsigned *)(par->ctrl_base + 0x00800000);
par->riva.PCIO0 = (U008 *)(par->ctrl_base + 0x00601000);
par->riva.PDIO0 = (U008 *)(par->ctrl_base + 0x00681000);
par->riva.PVIO = (U008 *)(par->ctrl_base + 0x000C0000);
par->riva.IO = (MISCin(par) & 0x01) ? 0x3D0 : 0x3B0;
if (par->FlatPanel == -1) {
switch (par->Chipset) {
case NV_CHIP_GEFORCE4_440_GO:
case NV_CHIP_GEFORCE4_440_GO_M64:
case NV_CHIP_GEFORCE4_420_GO:
case NV_CHIP_GEFORCE4_420_GO_M32:
case NV_CHIP_QUADRO4_500_GOGL:
case NV_CHIP_GEFORCE2_GO:
printk(KERN_INFO PFX
"On a laptop. Assuming Digital Flat Panel\n");
par->FlatPanel = 1;
break;
default:
break;
}
}
switch (par->Chipset & 0x0ff0) {
case 0x0110:
if (par->Chipset == NV_CHIP_GEFORCE2_GO)
par->SecondCRTC = TRUE;
#if defined(__powerpc__)
if (par->FlatPanel == 1)
par->SecondCRTC = TRUE;
#endif
riva_override_CRTC(par);
break;
case 0x0170:
case 0x0180:
case 0x01F0:
case 0x0250:
case 0x0280:
riva_is_second(par);
break;
default:
break;
}
if (par->SecondCRTC) {
par->riva.PCIO = par->riva.PCIO0 + 0x2000;
par->riva.PCRTC = par->riva.PCRTC0 + 0x800;
par->riva.PRAMDAC = par->riva.PRAMDAC0 + 0x800;
par->riva.PDIO = par->riva.PDIO0 + 0x2000;
} else {
par->riva.PCIO = par->riva.PCIO0;
par->riva.PCRTC = par->riva.PCRTC0;
par->riva.PRAMDAC = par->riva.PRAMDAC0;
par->riva.PDIO = par->riva.PDIO0;
}
RivaGetConfig(&par->riva, par->Chipset);
if (par->FlatPanel == -1) {
/* Fix me, need x86 DDC code */
par->FlatPanel = 0;
}
par->riva.flatPanel = (par->FlatPanel > 0) ? TRUE : FALSE;
}
This diff is collapsed.
......@@ -23,10 +23,6 @@ struct riva_regs {
RIVA_HW_STATE ext;
};
typedef struct {
unsigned char red, green, blue, transp;
} riva_cfb8_cmap_t;
struct riva_par {
RIVA_HW_INST riva; /* interface to riva_hw.c */
......@@ -37,11 +33,18 @@ struct riva_par {
struct riva_regs current_state;
struct vgastate state;
atomic_t ref_count;
riva_cfb8_cmap_t cmap[256]; /* VGA DAC palette cache */
u32 riva_palette[16];
u32 cursor_data[32 * 32/4];
int cursor_reset;
unsigned char *EDID;
int panel_xres, panel_yres;
int hOver_plus, hSync_width, hblank;
int vOver_plus, vSync_width, vblank;
int hAct_high, vAct_high, interlaced;
int synct, misc, clock;
int use_default_var;
int got_dfpinfo;
unsigned int Chipset;
int forceCRTC;
Bool SecondCRTC;
......
This diff is collapsed.
......@@ -17,7 +17,7 @@
*/
#ifdef SST_DEBUG
# define dprintk(X...) printk(KERN_DEBUG "sstfb: " X)
# define dprintk(X...) printk("sstfb: " X)
#else
# define dprintk(X...)
# undef SST_DEBUG_REG
......@@ -76,8 +76,6 @@
# define ABS(x) (((x)<0)?-(x):(x))
#endif
//void Dump_regs(void);
/*
*
* Const
......@@ -180,6 +178,29 @@
# define TILES_IN_X_LSB_SHIFT 30 /* v2 */
#define FBIINIT7 0x024c /* v2 specific */
#define BLTSRCBASEADDR 0x02c0 /* BitBLT Source base address */
#define BLTDSTBASEADDR 0x02c4 /* BitBLT Destination base address */
#define BLTXYSTRIDES 0x02c8 /* BitBLT Source and Destination strides */
#define BLTSRCCHROMARANGE 0x02cc /* BitBLT Source Chroma key range */
#define BLTDSTCHROMARANGE 0x02d0 /* BitBLT Destination Chroma key range */
#define BLTCLIPX 0x02d4 /* BitBLT Min/Max X clip values */
#define BLTCLIPY 0x02d8 /* BitBLT Min/Max Y clip values */
#define BLTSRCXY 0x02e0 /* BitBLT Source starting XY coordinates */
#define BLTDSTXY 0x02e4 /* BitBLT Destination starting XY coordinates */
#define BLTSIZE 0x02e8 /* BitBLT width and height */
#define BLTROP 0x02ec /* BitBLT Raster operations */
# define BLTROP_COPY 0x0cccc
# define BLTROP_INVERT 0x05555
# define BLTROP_XOR 0x06666
#define BLTCOLOR 0x02f0 /* BitBLT and foreground background colors */
#define BLTCOMMAND 0x02f8 /* BitBLT command mode (v2 specific) */
# define BLT_SCR2SCR_BITBLT 0 /* Screen-to-Screen BitBLT */
# define BLT_CPU2SCR_BITBLT 1 /* CPU-to-screen BitBLT */
# define BLT_RECFILL_BITBLT 2 /* BitBLT Rectangle Fill */
# define BLT_16BPP_FMT 2 /* 16 BPP (5-6-5 RGB) */
#define BLTDATA 0x02fc /* BitBLT data for CPU-to-Screen BitBLTs */
# define LAUNCH_BITBLT BIT(31) /* Launch BitBLT in BltCommand, bltDstXY or bltSize */
/* Dac Registers */
#define DACREG_WMA 0x0 /* pixel write mode address */
#define DACREG_LUT 0x01 /* color value */
......@@ -211,7 +232,7 @@
#define DACREG_DIR_TI 0x09
#define DACREG_MIR_ATT 0x84
#define DACREG_DIR_ATT 0x09
/* ics dac specific registers*/
/* ics dac specific registers */
#define DACREG_ICS_PLLWMA 0x04 /* PLL write mode address */
#define DACREG_ICS_PLLDATA 0x05 /* PLL data /parameter */
#define DACREG_ICS_CMD 0x06 /* command */
......@@ -300,8 +321,6 @@ struct pll_timing {
unsigned int p;
};
struct sstfb_info;
struct dac_switch {
char * name;
int (*detect) (struct fb_info *info);
......
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