Commit c33ebdb7 authored by Vandita Kulkarni's avatar Vandita Kulkarni Committed by Lucas De Marchi

drm/i915/xelpd: Add rc_qp_table for rcparams calculation

Add the qp table for 444 formats, for 8bpc, 10bpc and 12bpc, as given by
the VESA C model for DSC 1.1

v2:
 - Add include guard to header (Jani)
 - Move the big tables to a .c file (Chris, Jani, Lucas)
v3:
 - Make tables 'static const' and add lookup functions to index into
   them.  (Jani)
v3.1:
 - Include missing .h file.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: default avatarVandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210519000625.3184321-3-lucas.demarchi@intel.com
parent db514cac
...@@ -263,6 +263,7 @@ i915-y += \ ...@@ -263,6 +263,7 @@ i915-y += \
display/intel_lvds.o \ display/intel_lvds.o \
display/intel_panel.o \ display/intel_panel.o \
display/intel_pps.o \ display/intel_pps.o \
display/intel_qp_tables.o \
display/intel_sdvo.o \ display/intel_sdvo.o \
display/intel_tv.o \ display/intel_tv.o \
display/intel_vdsc.o \ display/intel_vdsc.o \
......
This diff is collapsed.
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2021 Intel Corporation
*/
#ifndef _INTEL_QP_TABLES_H_
#define _INTEL_QP_TABLES_H_
#include <linux/types.h>
u8 intel_lookup_range_min_qp(int bpc, int buf_i, int bpp_i);
u8 intel_lookup_range_max_qp(int bpc, int buf_i, int bpp_i);
#endif
...@@ -11,6 +11,7 @@ ...@@ -11,6 +11,7 @@
#include "intel_display_types.h" #include "intel_display_types.h"
#include "intel_dsi.h" #include "intel_dsi.h"
#include "intel_vdsc.h" #include "intel_vdsc.h"
#include "intel_qp_tables.h"
enum ROW_INDEX_BPP { enum ROW_INDEX_BPP {
ROW_INDEX_6BPP = 0, ROW_INDEX_6BPP = 0,
...@@ -384,7 +385,7 @@ calculate_rc_params(struct rc_parameters *rc, ...@@ -384,7 +385,7 @@ calculate_rc_params(struct rc_parameters *rc,
int ofs_und12[] = { 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 }; int ofs_und12[] = { 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 };
int ofs_und15[] = { 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12 }; int ofs_und15[] = { 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12 };
int qp_bpc_modifier = (bpc - 8) * 2; int qp_bpc_modifier = (bpc - 8) * 2;
u32 res, buf_i; u32 res, buf_i, bpp_i;
if (vdsc_cfg->slice_height >= 8) if (vdsc_cfg->slice_height >= 8)
rc->first_line_bpg_offset = rc->first_line_bpg_offset =
...@@ -411,7 +412,14 @@ calculate_rc_params(struct rc_parameters *rc, ...@@ -411,7 +412,14 @@ calculate_rc_params(struct rc_parameters *rc,
rc->rc_quant_incr_limit0 = 11 + qp_bpc_modifier; rc->rc_quant_incr_limit0 = 11 + qp_bpc_modifier;
rc->rc_quant_incr_limit1 = 11 + qp_bpc_modifier; rc->rc_quant_incr_limit1 = 11 + qp_bpc_modifier;
bpp_i = (2 * (bpp - 6));
for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) { for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
/* Read range_minqp and range_max_qp from qp tables */
rc->rc_range_params[buf_i].range_min_qp =
intel_lookup_range_min_qp(bpc, buf_i, bpp_i);
rc->rc_range_params[buf_i].range_max_qp =
intel_lookup_range_max_qp(bpc, buf_i, bpp_i);
/* Calculate range_bgp_offset */ /* Calculate range_bgp_offset */
if (bpp <= 6) { if (bpp <= 6) {
rc->rc_range_params[buf_i].range_bpg_offset = ofs_und6[buf_i]; rc->rc_range_params[buf_i].range_bpg_offset = ofs_und6[buf_i];
......
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