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Commit c7a4e6c2 authored by Alan Cox's avatar Alan Cox Committed by Linus Torvalds
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[PATCH] resurrect the NCR53c406a

parent ec765df5
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Showing with 777 additions and 806 deletions
drivers/scsi/NCR53c406a.c
View file @ c7a4e6c2
...@@ -26,9 +26,9 @@ ...@@ -26,9 +26,9 @@
#define USE_PIO 1 #define USE_PIO 1
#define USE_BIOS 0 #define USE_BIOS 0
/* #define BIOS_ADDR 0xD8000 */ /* define this if autoprobe fails */ /* #define BIOS_ADDR 0xD8000 *//* define this if autoprobe fails */
/* #define PORT_BASE 0x330 */ /* define this if autoprobe fails */ /* #define PORT_BASE 0x330 *//* define this if autoprobe fails */
/* #define IRQ_LEV 0 */ /* define this if autoprobe fails */ /* #define IRQ_LEV 0 *//* define this if autoprobe fails */
#define DMA_CHAN 5 /* this is ignored if DMA is disabled */ #define DMA_CHAN 5 /* this is ignored if DMA is disabled */
/* Set this to 0 if you encounter kernel lockups while transferring /* Set this to 0 if you encounter kernel lockups while transferring
...@@ -63,7 +63,7 @@ ...@@ -63,7 +63,7 @@
#define WATCHDOG 5000000 #define WATCHDOG 5000000
#define SYNC_MODE 0 /* Synchronous transfer mode */ #define SYNC_MODE 0 /* Synchronous transfer mode */
#if DEBUG #if DEBUG
#undef NCR53C406A_DEBUG #undef NCR53C406A_DEBUG
...@@ -161,24 +161,24 @@ ...@@ -161,24 +161,24 @@
/*----------------------------------------------------------------*/ /*----------------------------------------------------------------*/
enum Phase { enum Phase {
idle, idle,
data_out, data_out,
data_in, data_in,
command_ph, command_ph,
status_ph, status_ph,
message_out, message_out,
message_in message_in
}; };
/* Static function prototypes */ /* Static function prototypes */
static void NCR53c406a_intr(int, void *, struct pt_regs *); static void NCR53c406a_intr(int, void *, struct pt_regs *);
static void do_NCR53c406a_intr(int, void *, struct pt_regs *); static void do_NCR53c406a_intr(int, void *, struct pt_regs *);
static void internal_done(Scsi_Cmnd *); static void internal_done(Scsi_Cmnd *);
static void wait_intr(void); static void wait_intr(void);
static void chip_init(void); static void chip_init(void);
static void calc_port_addr(void); static void calc_port_addr(void);
#ifndef IRQ_LEV #ifndef IRQ_LEV
static int irq_probe(void); static int irq_probe(void);
#endif #endif
/* ================================================================= */ /* ================================================================= */
...@@ -188,26 +188,26 @@ static void *bios_base; ...@@ -188,26 +188,26 @@ static void *bios_base;
#endif #endif
#if PORT_BASE #if PORT_BASE
static int port_base = PORT_BASE; static int port_base = PORT_BASE;
#else #else
static int port_base; static int port_base;
#endif #endif
#if IRQ_LEV #if IRQ_LEV
static int irq_level = IRQ_LEV; static int irq_level = IRQ_LEV;
#else #else
static int irq_level = -1; /* 0 is 'no irq', so use -1 for 'uninitialized'*/ static int irq_level = -1; /* 0 is 'no irq', so use -1 for 'uninitialized' */
#endif #endif
#if USE_DMA #if USE_DMA
static int dma_chan; static int dma_chan;
#endif #endif
#if USE_PIO #if USE_PIO
static int fast_pio = USE_FAST_PIO; static int fast_pio = USE_FAST_PIO;
#endif #endif
static Scsi_Cmnd *current_SC; static Scsi_Cmnd *current_SC;
static volatile int internal_done_flag; static volatile int internal_done_flag;
static volatile int internal_done_errcode; static volatile int internal_done_errcode;
static char info_msg[256]; static char info_msg[256];
...@@ -217,15 +217,14 @@ static char info_msg[256]; ...@@ -217,15 +217,14 @@ static char info_msg[256];
/* possible BIOS locations */ /* possible BIOS locations */
#if USE_BIOS #if USE_BIOS
static void *addresses[] = { static void *addresses[] = {
(void *)0xd8000, (void *) 0xd8000,
(void *)0xc8000 (void *) 0xc8000
}; };
#define ADDRESS_COUNT (sizeof( addresses ) / sizeof( unsigned )) #define ADDRESS_COUNT (sizeof( addresses ) / sizeof( unsigned ))
#endif /* USE_BIOS */ #endif /* USE_BIOS */
/* possible i/o port addresses */ /* possible i/o port addresses */
static unsigned short ports[] = static unsigned short ports[] = { 0x230, 0x330, 0x280, 0x290, 0x330, 0x340, 0x300, 0x310, 0x348, 0x350 };
{ 0x230, 0x330, 0x280, 0x290, 0x330, 0x340, 0x300, 0x310, 0x348, 0x350 };
#define PORT_COUNT (sizeof( ports ) / sizeof( unsigned short )) #define PORT_COUNT (sizeof( ports ) / sizeof( unsigned short ))
/* possible interrupt channels */ /* possible interrupt channels */
...@@ -235,847 +234,835 @@ static unsigned short intrs[] = { 10, 11, 12, 15 }; ...@@ -235,847 +234,835 @@ static unsigned short intrs[] = { 10, 11, 12, 15 };
/* signatures for NCR 53c406a based controllers */ /* signatures for NCR 53c406a based controllers */
#if USE_BIOS #if USE_BIOS
struct signature { struct signature {
char *signature; char *signature;
int sig_offset; int sig_offset;
int sig_length; int sig_length;
} signatures[] __initdata = { } signatures[] __initdata = {
/* 1 2 3 4 5 6 */ /* 1 2 3 4 5 6 */
/* 123456789012345678901234567890123456789012345678901234567890 */ /* 123456789012345678901234567890123456789012345678901234567890 */
{ "Copyright (C) Acculogic, Inc.\r\n2.8M Diskette Extension Bios ver 4.04.03 03/01/1993", 61, 82 }, {
}; "Copyright (C) Acculogic, Inc.\r\n2.8M Diskette Extension Bios ver 4.04.03 03/01/1993", 61, 82},};
#define SIGNATURE_COUNT (sizeof( signatures ) / sizeof( struct signature )) #define SIGNATURE_COUNT (sizeof( signatures ) / sizeof( struct signature ))
#endif /* USE_BIOS */ #endif /* USE_BIOS */
/* ============================================================ */ /* ============================================================ */
/* Control Register Set 0 */ /* Control Register Set 0 */
static int TC_LSB; /* transfer counter lsb */ static int TC_LSB; /* transfer counter lsb */
static int TC_MSB; /* transfer counter msb */ static int TC_MSB; /* transfer counter msb */
static int SCSI_FIFO; /* scsi fifo register */ static int SCSI_FIFO; /* scsi fifo register */
static int CMD_REG; /* command register */ static int CMD_REG; /* command register */
static int STAT_REG; /* status register */ static int STAT_REG; /* status register */
static int DEST_ID; /* selection/reselection bus id */ static int DEST_ID; /* selection/reselection bus id */
static int INT_REG; /* interrupt status register */ static int INT_REG; /* interrupt status register */
static int SRTIMOUT; /* select/reselect timeout reg */ static int SRTIMOUT; /* select/reselect timeout reg */
static int SEQ_REG; /* sequence step register */ static int SEQ_REG; /* sequence step register */
static int SYNCPRD; /* synchronous transfer period */ static int SYNCPRD; /* synchronous transfer period */
static int FIFO_FLAGS; /* indicates # of bytes in fifo */ static int FIFO_FLAGS; /* indicates # of bytes in fifo */
static int SYNCOFF; /* synchronous offset register */ static int SYNCOFF; /* synchronous offset register */
static int CONFIG1; /* configuration register */ static int CONFIG1; /* configuration register */
static int CLKCONV; /* clock conversion reg */ static int CLKCONV; /* clock conversion reg */
/*static int TESTREG;*/ /* test mode register */ /*static int TESTREG;*//* test mode register */
static int CONFIG2; /* Configuration 2 Register */ static int CONFIG2; /* Configuration 2 Register */
static int CONFIG3; /* Configuration 3 Register */ static int CONFIG3; /* Configuration 3 Register */
static int CONFIG4; /* Configuration 4 Register */ static int CONFIG4; /* Configuration 4 Register */
static int TC_HIGH; /* Transfer Counter High */ static int TC_HIGH; /* Transfer Counter High */
/*static int FIFO_BOTTOM;*/ /* Reserve FIFO byte register */ /*static int FIFO_BOTTOM;*//* Reserve FIFO byte register */
/* Control Register Set 1 */ /* Control Register Set 1 */
/*static int JUMPER_SENSE;*/ /* Jumper sense port reg (r/w) */ /*static int JUMPER_SENSE;*//* Jumper sense port reg (r/w) */
/*static int SRAM_PTR;*/ /* SRAM address pointer reg (r/w) */ /*static int SRAM_PTR;*//* SRAM address pointer reg (r/w) */
/*static int SRAM_DATA;*/ /* SRAM data register (r/w) */ /*static int SRAM_DATA;*//* SRAM data register (r/w) */
static int PIO_FIFO; /* PIO FIFO registers (r/w) */ static int PIO_FIFO; /* PIO FIFO registers (r/w) */
/*static int PIO_FIFO1;*/ /* */ /*static int PIO_FIFO1;*//* */
/*static int PIO_FIFO2;*/ /* */ /*static int PIO_FIFO2;*//* */
/*static int PIO_FIFO3;*/ /* */ /*static int PIO_FIFO3;*//* */
static int PIO_STATUS; /* PIO status (r/w) */ static int PIO_STATUS; /* PIO status (r/w) */
/*static int ATA_CMD;*/ /* ATA command/status reg (r/w) */ /*static int ATA_CMD;*//* ATA command/status reg (r/w) */
/*static int ATA_ERR;*/ /* ATA features/error register (r/w)*/ /*static int ATA_ERR;*//* ATA features/error register (r/w) */
static int PIO_FLAG; /* PIO flag interrupt enable (r/w) */ static int PIO_FLAG; /* PIO flag interrupt enable (r/w) */
static int CONFIG5; /* Configuration 5 register (r/w) */ static int CONFIG5; /* Configuration 5 register (r/w) */
/*static int SIGNATURE;*/ /* Signature Register (r) */ /*static int SIGNATURE;*//* Signature Register (r) */
/*static int CONFIG6;*/ /* Configuration 6 register (r) */ /*static int CONFIG6;*//* Configuration 6 register (r) */
/* ============================================================== */ /* ============================================================== */
#if USE_DMA #if USE_DMA
static __inline__ int static __inline__ int NCR53c406a_dma_setup(unsigned char *ptr, unsigned int count, unsigned char mode)
NCR53c406a_dma_setup (unsigned char *ptr, {
unsigned int count, unsigned limit;
unsigned char mode) { unsigned long flags = 0;
unsigned limit;
unsigned long flags = 0; VDEB(printk("dma: before count=%d ", count));
if (dma_chan <= 3) {
VDEB(printk("dma: before count=%d ", count)); if (count > 65536)
if (dma_chan <=3) { count = 65536;
if (count > 65536) limit = 65536 - (((unsigned) ptr) & 0xFFFF);
count = 65536; } else {
limit = 65536 - (((unsigned) ptr) & 0xFFFF); if (count > (65536 << 1))
} else { count = (65536 << 1);
if (count > (65536<<1)) limit = (65536 << 1) - (((unsigned) ptr) & 0x1FFFF);
count = (65536<<1); }
limit = (65536<<1) - (((unsigned) ptr) & 0x1FFFF);
} if (count > limit)
count = limit;
if (count > limit) count = limit;
VDEB(printk("after count=%d\n", count));
VDEB(printk("after count=%d\n", count)); if ((count & 1) || (((unsigned) ptr) & 1))
if ((count & 1) || (((unsigned) ptr) & 1)) panic("NCR53c406a: attempted unaligned DMA transfer\n");
panic ("NCR53c406a: attempted unaligned DMA transfer\n");
flags = claim_dma_lock();
flags=claim_dma_lock(); disable_dma(dma_chan);
disable_dma(dma_chan); clear_dma_ff(dma_chan);
clear_dma_ff(dma_chan); set_dma_addr(dma_chan, (long) ptr);
set_dma_addr(dma_chan, (long) ptr); set_dma_count(dma_chan, count);
set_dma_count(dma_chan, count); set_dma_mode(dma_chan, mode);
set_dma_mode(dma_chan, mode); enable_dma(dma_chan);
enable_dma(dma_chan); release_dma_lock(flags);
release_dma_lock(flags);
return count;
return count;
} }
static __inline__ int static __inline__ int NCR53c406a_dma_write(unsigned char *src, unsigned int count)
NCR53c406a_dma_write(unsigned char *src, unsigned int count) { {
return NCR53c406a_dma_setup (src, count, DMA_MODE_WRITE); return NCR53c406a_dma_setup(src, count, DMA_MODE_WRITE);
} }
static __inline__ int static __inline__ int NCR53c406a_dma_read(unsigned char *src, unsigned int count)
NCR53c406a_dma_read(unsigned char *src, unsigned int count) { {
return NCR53c406a_dma_setup (src, count, DMA_MODE_READ); return NCR53c406a_dma_setup(src, count, DMA_MODE_READ);
} }
static __inline__ int static __inline__ int NCR53c406a_dma_residual(void)
NCR53c406a_dma_residual (void) { {
register int tmp; register int tmp;
unsigned long flags; unsigned long flags;
flags=claim_dma_lock(); flags = claim_dma_lock();
clear_dma_ff(dma_chan); clear_dma_ff(dma_chan);
tmp = get_dma_residue(dma_chan); tmp = get_dma_residue(dma_chan);
release_dma_lock(flags); release_dma_lock(flags);
return tmp; return tmp;
} }
#endif /* USE_DMA */ #endif /* USE_DMA */
#if USE_PIO #if USE_PIO
static __inline__ int NCR53c406a_pio_read(unsigned char *request, static __inline__ int NCR53c406a_pio_read(unsigned char *request, unsigned int reqlen)
unsigned int reqlen)
{ {
int i; int i;
int len; /* current scsi fifo size */ int len; /* current scsi fifo size */
unsigned long flags = 0;
REG1;
REG1; while (reqlen) {
while (reqlen) { i = inb(PIO_STATUS);
i = inb(PIO_STATUS); /* VDEB(printk("pio_status=%x\n", i)); */
/* VDEB(printk("pio_status=%x\n", i)); */ if (i & 0x80)
if (i & 0x80) return 0;
return 0;
switch (i & 0x1e) {
switch( i & 0x1e ) { default:
default: case 0x10:
case 0x10: len = 0;
len=0; break; break;
case 0x0: case 0x0:
len=1; break; len = 1;
case 0x8: break;
len=42; break; case 0x8:
case 0xc: len = 42;
len=84; break; break;
case 0xe: case 0xc:
len=128; break; len = 84;
} break;
case 0xe:
if ((i & 0x40) && len == 0) { /* fifo empty and interrupt occurred */ len = 128;
return 0; break;
} }
if (len) { if ((i & 0x40) && len == 0) { /* fifo empty and interrupt occurred */
if( len > reqlen ) return 0;
len = reqlen; }
save_flags(flags); if (len) {
cli(); if (len > reqlen)
if( fast_pio && len > 3 ) { len = reqlen;
insl(PIO_FIFO,request,len>>2);
request += len & 0xfc; if (fast_pio && len > 3) {
reqlen -= len & 0xfc; insl(PIO_FIFO, request, len >> 2);
} request += len & 0xfc;
else { reqlen -= len & 0xfc;
while(len--) { } else {
*request++ = inb(PIO_FIFO); while (len--) {
reqlen--; *request++ = inb(PIO_FIFO);
} reqlen--;
} }
restore_flags(flags); }
} }
} }
return 0; return 0;
} }
static __inline__ int NCR53c406a_pio_write(unsigned char *request, static __inline__ int NCR53c406a_pio_write(unsigned char *request, unsigned int reqlen)
unsigned int reqlen)
{ {
int i = 0; int i = 0;
int len; /* current scsi fifo size */ int len; /* current scsi fifo size */
unsigned long flags = 0;
REG1;
REG1; while (reqlen && !(i & 0x40)) {
while (reqlen && !(i&0x40)) { i = inb(PIO_STATUS);
i = inb(PIO_STATUS); /* VDEB(printk("pio_status=%x\n", i)); */
/* VDEB(printk("pio_status=%x\n", i)); */ if (i & 0x80) /* error */
if (i & 0x80) /* error */ return 0;
return 0;
switch (i & 0x1e) {
switch( i & 0x1e ) { case 0x10:
case 0x10: len = 128;
len=128; break; break;
case 0x0: case 0x0:
len=84; break; len = 84;
case 0x8: break;
len=42; break; case 0x8:
case 0xc: len = 42;
len=1; break; break;
default: case 0xc:
case 0xe: len = 1;
len=0; break; break;
} default:
case 0xe:
if (len) { len = 0;
if( len > reqlen ) break;
len = reqlen; }
save_flags(flags); if (len) {
cli(); if (len > reqlen)
if( fast_pio && len > 3 ) { len = reqlen;
outsl(PIO_FIFO,request,len>>2);
request += len & 0xfc; if (fast_pio && len > 3) {
reqlen -= len & 0xfc; outsl(PIO_FIFO, request, len >> 2);
} request += len & 0xfc;
else { reqlen -= len & 0xfc;
while(len--) { } else {
outb(*request++, PIO_FIFO); while (len--) {
reqlen--; outb(*request++, PIO_FIFO);
} reqlen--;
} }
restore_flags(flags); }
} }
} }
return 0; return 0;
} }
#endif /* USE_PIO */ #endif /* USE_PIO */
int __init static int __init NCR53c406a_detect(Scsi_Host_Template * tpnt)
NCR53c406a_detect(Scsi_Host_Template * tpnt){ {
struct Scsi_Host *shpnt = NULL; struct Scsi_Host *shpnt = NULL;
#ifndef PORT_BASE #ifndef PORT_BASE
int i; int i;
#endif #endif
#if USE_BIOS #if USE_BIOS
int ii, jj; int ii, jj;
bios_base = 0; bios_base = 0;
/* look for a valid signature */ /* look for a valid signature */
for( ii=0; ii < ADDRESS_COUNT && !bios_base; ii++) for (ii = 0; ii < ADDRESS_COUNT && !bios_base; ii++)
for( jj=0; (jj < SIGNATURE_COUNT) && !bios_base; jj++) for (jj = 0; (jj < SIGNATURE_COUNT) && !bios_base; jj++)
if(!memcmp((void *) addresses[ii]+signatures[jj].sig_offset, if (!memcmp((void *) addresses[ii] + signatures[jj].sig_offset, (void *) signatures[jj].signature, (int) signatures[jj].sig_length))
(void *) signatures[jj].signature, bios_base = addresses[ii];
(int) signatures[jj].sig_length))
bios_base=addresses[ii]; if (!bios_base) {
printk("NCR53c406a: BIOS signature not found\n");
if(!bios_base){ return 0;
printk("NCR53c406a: BIOS signature not found\n"); }
return 0;
} DEB(printk("NCR53c406a BIOS found at %X\n", (unsigned int) bios_base);
);
DEB(printk("NCR53c406a BIOS found at %X\n", (unsigned int) bios_base);); #endif /* USE_BIOS */
#endif /* USE_BIOS */
#ifdef PORT_BASE #ifdef PORT_BASE
if (!request_region(port_base, 0x10, "NCR53c406a")) /* ports already snatched */ if (!request_region(port_base, 0x10, "NCR53c406a")) /* ports already snatched */
port_base = 0; port_base = 0;
#else /* autodetect */ #else /* autodetect */
if (port_base) { /* LILO override */ if (port_base) { /* LILO override */
if (!request_region(port_base, 0x10, "NCR53c406a")) if (!request_region(port_base, 0x10, "NCR53c406a"))
port_base = 0; port_base = 0;
} } else {
else { for (i = 0; i < PORT_COUNT && !port_base; i++) {
for(i=0; i<PORT_COUNT && !port_base; i++){ if (!request_region(ports[i], 0x10, "NCR53c406a")) {
if(!request_region(ports[i], 0x10, "NCR53c406a")){ DEB(printk("NCR53c406a: port %x in use\n", ports[i]));
DEB(printk("NCR53c406a: port %x in use\n", ports[i])); } else {
} VDEB(printk("NCR53c406a: port %x available\n", ports[i]));
else { outb(C5_IMG, ports[i] + 0x0d); /* reg set 1 */
VDEB(printk("NCR53c406a: port %x available\n", ports[i])); if ((inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) & 0xf8) == 0x58) {
outb(C5_IMG, ports[i] + 0x0d); /* reg set 1 */ port_base = ports[i];
if( (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 VDEB(printk("NCR53c406a: Sig register valid\n"));
&& (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 VDEB(printk("port_base=%x\n", port_base));
&& (inb(ports[i] + 0x0e) & 0xf8) == 0x58 ) { break;
port_base = ports[i]; }
VDEB(printk("NCR53c406a: Sig register valid\n")); release_region(ports[i], 0x10);
VDEB(printk("port_base=%x\n", port_base)); }
break; }
} }
release_region(ports[i], 0x10); #endif /* PORT_BASE */
}
} if (!port_base) { /* no ports found */
} printk("NCR53c406a: no available ports found\n");
#endif /* PORT_BASE */ return 0;
}
if(!port_base){ /* no ports found */
printk("NCR53c406a: no available ports found\n"); DEB(printk("NCR53c406a detected\n"));
return 0;
} calc_port_addr();
chip_init();
DEB(printk("NCR53c406a detected\n"));
calc_port_addr();
chip_init();
#ifndef IRQ_LEV #ifndef IRQ_LEV
if (irq_level < 0) { /* LILO override if >= 0*/ if (irq_level < 0) { /* LILO override if >= 0 */
irq_level=irq_probe(); irq_level = irq_probe();
if (irq_level < 0) { /* Trouble */ if (irq_level < 0) { /* Trouble */
printk("NCR53c406a: IRQ problem, irq_level=%d, giving up\n", irq_level); printk("NCR53c406a: IRQ problem, irq_level=%d, giving up\n", irq_level);
goto err_release; goto err_release;
} }
} }
#endif #endif
DEB(printk("NCR53c406a: using port_base %x\n", port_base)); DEB(printk("NCR53c406a: using port_base %x\n", port_base));
tpnt->present = 1; tpnt->present = 1;
tpnt->proc_name = "NCR53c406a"; tpnt->proc_name = "NCR53c406a";
shpnt = scsi_register(tpnt, 0); shpnt = scsi_register(tpnt, 0);
if (!shpnt) { if (!shpnt) {
printk("NCR53c406a: Unable to register host, giving up.\n"); printk("NCR53c406a: Unable to register host, giving up.\n");
goto err_release; goto err_release;
} }
if(irq_level > 0) { if (irq_level > 0) {
if(request_irq(irq_level, do_NCR53c406a_intr, 0, "NCR53c406a", shpnt)){ if (request_irq(irq_level, do_NCR53c406a_intr, 0, "NCR53c406a", shpnt)) {
printk("NCR53c406a: unable to allocate IRQ %d\n", irq_level); printk("NCR53c406a: unable to allocate IRQ %d\n", irq_level);
goto err_free_scsi; goto err_free_scsi;
} }
tpnt->can_queue = 1; tpnt->can_queue = 1;
DEB(printk("NCR53c406a: allocated IRQ %d\n", irq_level)); DEB(printk("NCR53c406a: allocated IRQ %d\n", irq_level));
} } else if (irq_level == 0) {
else if (irq_level == 0) { tpnt->can_queue = 0;
tpnt->can_queue = 0; DEB(printk("NCR53c406a: No interrupts detected\n"));
DEB(printk("NCR53c406a: No interrupts detected\n"));
#if USE_DMA #if USE_DMA
printk("NCR53c406a: No interrupts found and DMA mode defined. Giving up.\n"); printk("NCR53c406a: No interrupts found and DMA mode defined. Giving up.\n");
goto err_free_scsi; goto err_free_scsi;
#endif /* USE_DMA */ #endif /* USE_DMA */
} } else {
else { DEB(printk("NCR53c406a: Shouldn't get here!\n"));
DEB(printk("NCR53c406a: Shouldn't get here!\n")); goto err_free_scsi;
goto err_free_scsi; }
}
#if USE_DMA #if USE_DMA
dma_chan = DMA_CHAN; dma_chan = DMA_CHAN;
if(request_dma(dma_chan, "NCR53c406a") != 0){ if (request_dma(dma_chan, "NCR53c406a") != 0) {
printk("NCR53c406a: unable to allocate DMA channel %d\n", dma_chan); printk("NCR53c406a: unable to allocate DMA channel %d\n", dma_chan);
goto err_free_irq; goto err_free_irq;
} }
DEB(printk("Allocated DMA channel %d\n", dma_chan)); DEB(printk("Allocated DMA channel %d\n", dma_chan));
#endif /* USE_DMA */ #endif /* USE_DMA */
shpnt->irq = irq_level; shpnt->irq = irq_level;
shpnt->io_port = port_base; shpnt->io_port = port_base;
shpnt->n_io_port = 0x10; shpnt->n_io_port = 0x10;
#if USE_DMA #if USE_DMA
shpnt->dma = dma_chan; shpnt->dma = dma_chan;
#endif #endif
#if USE_DMA #if USE_DMA
sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, DMA channel %d.", sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, DMA channel %d.", port_base, irq_level, dma_chan);
port_base, irq_level, dma_chan);
#else #else
sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, %s PIO mode.", sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, %s PIO mode.", port_base, irq_level, fast_pio ? "fast" : "slow");
port_base, irq_level, fast_pio ? "fast" : "slow");
#endif #endif
return (tpnt->present); return (tpnt->present);
#if USE_DMA #if USE_DMA
err_free_irq: err_free_irq:
if(irq_level) if (irq_level)
free_irq(irq_level, shpnt); free_irq(irq_level, shpnt);
#endif #endif
err_free_scsi: err_free_scsi:
scsi_unregister(shpnt); scsi_unregister(shpnt);
err_release: err_release:
release_region(port_base, 0x10); release_region(port_base, 0x10);
return 0; return 0;
} }
/* called from init/main.c */ /* called from init/main.c */
void __init NCR53c406a_setup(char *str, int *ints) static void __init NCR53c406a_setup(char *str, int *ints)
{ {
static size_t setup_idx = 0; static size_t setup_idx = 0;
size_t i; size_t i;
DEB(printk("NCR53c406a: Setup called\n");); DEB(printk("NCR53c406a: Setup called\n");
);
if (setup_idx >= PORT_COUNT - 1) {
printk("NCR53c406a: Setup called too many times. Bad LILO params?\n"); if (setup_idx >= PORT_COUNT - 1) {
return; printk("NCR53c406a: Setup called too many times. Bad LILO params?\n");
} return;
if (ints[0] < 1 || ints[0] > 3) { }
printk("NCR53c406a: Malformed command line\n"); if (ints[0] < 1 || ints[0] > 3) {
printk("NCR53c406a: Usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]\n"); printk("NCR53c406a: Malformed command line\n");
return; printk("NCR53c406a: Usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]\n");
} return;
for (i = 0; i < PORT_COUNT && !port_base; i++) }
if (ports[i] == ints[1]) { for (i = 0; i < PORT_COUNT && !port_base; i++)
port_base = ints[1]; if (ports[i] == ints[1]) {
DEB(printk("NCR53c406a: Specified port_base 0x%X\n", port_base);) port_base = ints[1];
} DEB(printk("NCR53c406a: Specified port_base 0x%X\n", port_base);
if (!port_base) { )
printk("NCR53c406a: Invalid PORTBASE 0x%X specified\n", ints[1]); }
return; if (!port_base) {
} printk("NCR53c406a: Invalid PORTBASE 0x%X specified\n", ints[1]);
return;
if (ints[0] > 1) { }
if (ints[2] == 0) {
irq_level = 0; if (ints[0] > 1) {
DEB(printk("NCR53c406a: Specified irq %d\n", irq_level);) if (ints[2] == 0) {
} irq_level = 0;
else DEB(printk("NCR53c406a: Specified irq %d\n", irq_level);
for (i = 0; i < INTR_COUNT && irq_level < 0; i++) )
if (intrs[i] == ints[2]) { } else
irq_level = ints[2]; for (i = 0; i < INTR_COUNT && irq_level < 0; i++)
DEB(printk("NCR53c406a: Specified irq %d\n", port_base);) if (intrs[i] == ints[2]) {
} irq_level = ints[2];
if (irq_level < 0) DEB(printk("NCR53c406a: Specified irq %d\n", port_base);
printk("NCR53c406a: Invalid IRQ %d specified\n", ints[2]); )
} }
if (irq_level < 0)
if (ints[0] > 2) printk("NCR53c406a: Invalid IRQ %d specified\n", ints[2]);
fast_pio = ints[3]; }
DEB(printk("NCR53c406a: port_base=0x%X, irq=%d, fast_pio=%d\n", if (ints[0] > 2)
port_base, irq_level, fast_pio);) fast_pio = ints[3];
DEB(printk("NCR53c406a: port_base=0x%X, irq=%d, fast_pio=%d\n", port_base, irq_level, fast_pio);)
} }
const char* __setup("ncr53c406a=", NCR53c406a_setup);
NCR53c406a_info(struct Scsi_Host *SChost){
DEB(printk("NCR53c406a_info called\n")); static const char *NCR53c406a_info(struct Scsi_Host *SChost)
return (info_msg); {
DEB(printk("NCR53c406a_info called\n"));
return (info_msg);
} }
static void internal_done(Scsi_Cmnd *SCpnt) { static void internal_done(Scsi_Cmnd * SCpnt)
internal_done_errcode = SCpnt->result; {
++internal_done_flag; internal_done_errcode = SCpnt->result;
++internal_done_flag;
} }
static void wait_intr(void) { static void wait_intr(void)
int i = jiffies + WATCHDOG; {
int i = jiffies + WATCHDOG;
while(time_after(i,jiffies) && !(inb(STAT_REG)&0xe0)) /* wait for a pseudo-interrupt */
barrier(); while (time_after(i, jiffies) && !(inb(STAT_REG) & 0xe0)) { /* wait for a pseudo-interrupt */
cpu_relax();
if (time_before_eq(i,jiffies)) { /* Timed out */ barrier();
rtrc(0); }
current_SC->result = DID_TIME_OUT << 16;
current_SC->SCp.phase = idle; if (time_before_eq(i, jiffies)) { /* Timed out */
current_SC->scsi_done(current_SC); rtrc(0);
return; current_SC->result = DID_TIME_OUT << 16;
} current_SC->SCp.phase = idle;
current_SC->scsi_done(current_SC);
NCR53c406a_intr(0, NULL, NULL); return;
}
NCR53c406a_intr(0, NULL, NULL);
} }
int NCR53c406a_command(Scsi_Cmnd *SCpnt){ static int NCR53c406a_command(Scsi_Cmnd * SCpnt)
DEB(printk("NCR53c406a_command called\n")); {
NCR53c406a_queue(SCpnt, internal_done); DEB(printk("NCR53c406a_command called\n"));
if(irq_level) NCR53c406a_queue(SCpnt, internal_done);
while (!internal_done_flag); if (irq_level)
else /* interrupts not supported */ while (!internal_done_flag)
while (!internal_done_flag) cpu_relax();
wait_intr(); else /* interrupts not supported */
while (!internal_done_flag)
internal_done_flag = 0; wait_intr();
return internal_done_errcode;
internal_done_flag = 0;
return internal_done_errcode;
} }
int static int NCR53c406a_queue(Scsi_Cmnd * SCpnt, void (*done) (Scsi_Cmnd *))
NCR53c406a_queue(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *)){ {
int i; int i;
unsigned long flags = 0;
VDEB(printk("NCR53c406a_queue called\n"));
DEB(printk("cmd=%02x, cmd_len=%02x, target=%02x, lun=%02x, bufflen=%d\n", SCpnt->cmnd[0], SCpnt->cmd_len, SCpnt->target, SCpnt->lun, SCpnt->request_bufflen));
VDEB(printk("NCR53c406a_queue called\n"));
DEB(printk("cmd=%02x, cmd_len=%02x, target=%02x, lun=%02x, bufflen=%d\n",
SCpnt->cmnd[0],
SCpnt->cmd_len,
SCpnt->target,
SCpnt->lun,
SCpnt->request_bufflen));
#if 0 #if 0
VDEB(for(i=0; i<SCpnt->cmd_len; i++) VDEB(for (i = 0; i < SCpnt->cmd_len; i++)
printk("cmd[%d]=%02x ", i, SCpnt->cmnd[i])); printk("cmd[%d]=%02x ", i, SCpnt->cmnd[i]));
VDEB(printk("\n")); VDEB(printk("\n"));
#endif #endif
current_SC = SCpnt; current_SC = SCpnt;
current_SC->scsi_done = done; current_SC->scsi_done = done;
current_SC->SCp.phase = command_ph; current_SC->SCp.phase = command_ph;
current_SC->SCp.Status = 0; current_SC->SCp.Status = 0;
current_SC->SCp.Message = 0; current_SC->SCp.Message = 0;
save_flags(flags); /* We are locked here already by the mid layer */
cli(); REG0;
REG0; outb(SCpnt->target, DEST_ID); /* set destination */
outb(SCpnt->target, DEST_ID); /* set destination */ outb(FLUSH_FIFO, CMD_REG); /* reset the fifos */
outb(FLUSH_FIFO, CMD_REG); /* reset the fifos */
for (i = 0; i < SCpnt->cmd_len; i++) {
for(i=0; i<SCpnt->cmd_len; i++){ outb(SCpnt->cmnd[i], SCSI_FIFO);
outb(SCpnt->cmnd[i], SCSI_FIFO); }
} outb(SELECT_NO_ATN, CMD_REG);
outb(SELECT_NO_ATN, CMD_REG);
restore_flags(flags); rtrc(1);
return 0;
rtrc(1); }
return 0;
static int NCR53c406a_abort(Scsi_Cmnd * SCpnt)
{
DEB(printk("NCR53c406a_abort called\n"));
return FAILED; /* Don't know how to abort */
}
static int NCR53c406a_host_reset(Scsi_Cmnd * SCpnt)
{
DEB(printk("NCR53c406a_reset called\n"));
outb(C4_IMG, CONFIG4); /* Select reg set 0 */
outb(CHIP_RESET, CMD_REG);
outb(SCSI_NOP, CMD_REG); /* required after reset */
outb(SCSI_RESET, CMD_REG);
chip_init();
rtrc(2);
return SUCCESS;
} }
int static int NCR53c406a_device_reset(Scsi_Cmnd * SCpnt)
NCR53c406a_abort(Scsi_Cmnd *SCpnt){ {
DEB(printk("NCR53c406a_abort called\n")); return FAILED;
return SCSI_ABORT_SNOOZE; /* Don't know how to abort */
} }
int static int NCR53c406a_bus_reset(Scsi_Cmnd * SCpnt)
NCR53c406a_reset(Scsi_Cmnd *SCpnt, unsigned int ignored){ {
DEB(printk("NCR53c406a_reset called\n")); return FAILED;
outb(C4_IMG, CONFIG4); /* Select reg set 0 */
outb(CHIP_RESET, CMD_REG);
outb(SCSI_NOP, CMD_REG); /* required after reset */
outb(SCSI_RESET, CMD_REG);
chip_init();
rtrc(2);
if (irq_level)
return SCSI_RESET_PENDING; /* should get an interrupt */
else
return SCSI_RESET_WAKEUP; /* won't get any interrupts */
} }
int static int NCR53c406a_biosparm(Scsi_Disk * disk, struct block_device *dev, int *info_array)
NCR53c406a_biosparm(Scsi_Disk *disk, struct block_device *dev, int* info_array){ {
int size; int size;
DEB(printk("NCR53c406a_biosparm called\n")); DEB(printk("NCR53c406a_biosparm called\n"));
size = disk->capacity; size = disk->capacity;
info_array[0] = 64; /* heads */ info_array[0] = 64; /* heads */
info_array[1] = 32; /* sectors */ info_array[1] = 32; /* sectors */
info_array[2] = size>>11; /* cylinders */ info_array[2] = size >> 11; /* cylinders */
if (info_array[2] > 1024) { /* big disk */ if (info_array[2] > 1024) { /* big disk */
info_array[0] = 255; info_array[0] = 255;
info_array[1] = 63; info_array[1] = 63;
info_array[2] = size / (255*63); info_array[2] = size / (255 * 63);
} }
return 0; return 0;
} }
static void static void do_NCR53c406a_intr(int unused, void *dev_id, struct pt_regs *regs)
do_NCR53c406a_intr(int unused, void *dev_id, struct pt_regs *regs){ {
unsigned long flags; unsigned long flags;
struct Scsi_Host * dev = dev_id; struct Scsi_Host *dev = dev_id;
spin_lock_irqsave(dev->host_lock, flags); spin_lock_irqsave(dev->host_lock, flags);
NCR53c406a_intr(0, dev_id, regs); NCR53c406a_intr(0, dev_id, regs);
spin_unlock_irqrestore(dev->host_lock, flags); spin_unlock_irqrestore(dev->host_lock, flags);
} }
static void static void NCR53c406a_intr(int unused, void *dev_id, struct pt_regs *regs)
NCR53c406a_intr(int unused, void *dev_id, struct pt_regs *regs){ {
DEB(unsigned char fifo_size;) DEB(unsigned char fifo_size;
DEB(unsigned char seq_reg;) )
unsigned char status, int_reg; DEB(unsigned char seq_reg;
unsigned long flags = 0; )
unsigned char status, int_reg;
#if USE_PIO #if USE_PIO
unsigned char pio_status; unsigned char pio_status;
struct scatterlist *sglist; struct scatterlist *sglist;
unsigned int sgcount; unsigned int sgcount;
#endif #endif
VDEB(printk("NCR53c406a_intr called\n")); VDEB(printk("NCR53c406a_intr called\n"));
save_flags(flags);
cli();
#if USE_PIO #if USE_PIO
REG1; REG1;
pio_status = inb(PIO_STATUS); pio_status = inb(PIO_STATUS);
#endif #endif
REG0; REG0;
status = inb(STAT_REG); status = inb(STAT_REG);
DEB(seq_reg = inb(SEQ_REG)); DEB(seq_reg = inb(SEQ_REG));
int_reg = inb(INT_REG); int_reg = inb(INT_REG);
DEB(fifo_size = inb(FIFO_FLAGS) & 0x1f); DEB(fifo_size = inb(FIFO_FLAGS) & 0x1f);
restore_flags(flags);
#if NCR53C406A_DEBUG #if NCR53C406A_DEBUG
printk("status=%02x, seq_reg=%02x, int_reg=%02x, fifo_size=%02x", printk("status=%02x, seq_reg=%02x, int_reg=%02x, fifo_size=%02x", status, seq_reg, int_reg, fifo_size);
status, seq_reg, int_reg, fifo_size);
#if (USE_DMA) #if (USE_DMA)
printk("\n"); printk("\n");
#else #else
printk(", pio=%02x\n", pio_status); printk(", pio=%02x\n", pio_status);
#endif /* USE_DMA */ #endif /* USE_DMA */
#endif /* NCR53C406A_DEBUG */ #endif /* NCR53C406A_DEBUG */
if(int_reg & 0x80){ /* SCSI reset intr */ if (int_reg & 0x80) { /* SCSI reset intr */
rtrc(3); rtrc(3);
DEB(printk("NCR53c406a: reset intr received\n")); DEB(printk("NCR53c406a: reset intr received\n"));
current_SC->SCp.phase = idle; current_SC->SCp.phase = idle;
current_SC->result = DID_RESET << 16; current_SC->result = DID_RESET << 16;
current_SC->scsi_done(current_SC); current_SC->scsi_done(current_SC);
return; return;
} }
#if USE_PIO #if USE_PIO
if(pio_status & 0x80) { if (pio_status & 0x80) {
printk("NCR53C406A: Warning: PIO error!\n"); printk("NCR53C406A: Warning: PIO error!\n");
current_SC->SCp.phase = idle; current_SC->SCp.phase = idle;
current_SC->result = DID_ERROR << 16; current_SC->result = DID_ERROR << 16;
current_SC->scsi_done(current_SC); current_SC->scsi_done(current_SC);
return; return;
} }
#endif /* USE_PIO */ #endif /* USE_PIO */
if(status & 0x20) { /* Parity error */ if (status & 0x20) { /* Parity error */
printk("NCR53c406a: Warning: parity error!\n"); printk("NCR53c406a: Warning: parity error!\n");
current_SC->SCp.phase = idle; current_SC->SCp.phase = idle;
current_SC->result = DID_PARITY << 16; current_SC->result = DID_PARITY << 16;
current_SC->scsi_done(current_SC); current_SC->scsi_done(current_SC);
return; return;
} }
if(status & 0x40) { /* Gross error */ if (status & 0x40) { /* Gross error */
printk("NCR53c406a: Warning: gross error!\n"); printk("NCR53c406a: Warning: gross error!\n");
current_SC->SCp.phase = idle; current_SC->SCp.phase = idle;
current_SC->result = DID_ERROR << 16; current_SC->result = DID_ERROR << 16;
current_SC->scsi_done(current_SC); current_SC->scsi_done(current_SC);
return; return;
} }
if(int_reg & 0x20){ /* Disconnect */ if (int_reg & 0x20) { /* Disconnect */
DEB(printk("NCR53c406a: disconnect intr received\n")); DEB(printk("NCR53c406a: disconnect intr received\n"));
if(current_SC->SCp.phase != message_in){ /* Unexpected disconnect */ if (current_SC->SCp.phase != message_in) { /* Unexpected disconnect */
current_SC->result = DID_NO_CONNECT << 16; current_SC->result = DID_NO_CONNECT << 16;
} } else { /* Command complete, return status and message */
else{ /* Command complete, return status and message */ current_SC->result = (current_SC->SCp.Status & 0xff)
current_SC->result = (current_SC->SCp.Status & 0xff) | ((current_SC->SCp.Message & 0xff) << 8) | (DID_OK << 16);
| ((current_SC->SCp.Message & 0xff) << 8) | (DID_OK << 16); }
}
rtrc(0);
rtrc(0); current_SC->SCp.phase = idle;
current_SC->SCp.phase = idle; current_SC->scsi_done(current_SC);
current_SC->scsi_done( current_SC ); return;
return; }
}
switch (status & 0x07) { /* scsi phase */
switch(status & 0x07){ /* scsi phase */ case 0x00: /* DATA-OUT */
case 0x00: /* DATA-OUT */ if (int_reg & 0x10) { /* Target requesting info transfer */
if(int_reg & 0x10){ /* Target requesting info transfer */ rtrc(5);
rtrc(5); current_SC->SCp.phase = data_out;
current_SC->SCp.phase = data_out; VDEB(printk("NCR53c406a: Data-Out phase\n"));
VDEB(printk("NCR53c406a: Data-Out phase\n")); outb(FLUSH_FIFO, CMD_REG);
outb(FLUSH_FIFO, CMD_REG); LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
#if USE_DMA /* No s/g support for DMA */ #if USE_DMA /* No s/g support for DMA */
NCR53c406a_dma_write(current_SC->request_buffer, NCR53c406a_dma_write(current_SC->request_buffer, current_SC->request_bufflen);
current_SC->request_bufflen); #endif /* USE_DMA */
#endif /* USE_DMA */ outb(TRANSFER_INFO | DMA_OP, CMD_REG);
outb(TRANSFER_INFO | DMA_OP, CMD_REG);
#if USE_PIO #if USE_PIO
if (!current_SC->use_sg) /* Don't use scatter-gather */ if (!current_SC->use_sg) /* Don't use scatter-gather */
NCR53c406a_pio_write(current_SC->request_buffer, NCR53c406a_pio_write(current_SC->request_buffer, current_SC->request_bufflen);
current_SC->request_bufflen); else { /* use scatter-gather */
else { /* use scatter-gather */ sgcount = current_SC->use_sg;
sgcount = current_SC->use_sg; sglist = current_SC->request_buffer;
sglist = current_SC->request_buffer; while (sgcount--) {
while( sgcount-- ) { NCR53c406a_pio_write(page_address(sglist->page) + sglist->offset, sglist->length);
NCR53c406a_pio_write(page_address(sglist->page) + sglist->offset, sglist->length); sglist++;
sglist++; }
} }
} REG0;
REG0; #endif /* USE_PIO */
#endif /* USE_PIO */ }
} break;
break;
case 0x01: /* DATA-IN */
case 0x01: /* DATA-IN */ if (int_reg & 0x10) { /* Target requesting info transfer */
if(int_reg & 0x10){ /* Target requesting info transfer */ rtrc(6);
rtrc(6); current_SC->SCp.phase = data_in;
current_SC->SCp.phase = data_in; VDEB(printk("NCR53c406a: Data-In phase\n"));
VDEB(printk("NCR53c406a: Data-In phase\n")); outb(FLUSH_FIFO, CMD_REG);
outb(FLUSH_FIFO, CMD_REG); LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
#if USE_DMA /* No s/g support for DMA */ #if USE_DMA /* No s/g support for DMA */
NCR53c406a_dma_read(current_SC->request_buffer, NCR53c406a_dma_read(current_SC->request_buffer, current_SC->request_bufflen);
current_SC->request_bufflen); #endif /* USE_DMA */
#endif /* USE_DMA */ outb(TRANSFER_INFO | DMA_OP, CMD_REG);
outb(TRANSFER_INFO | DMA_OP, CMD_REG);
#if USE_PIO #if USE_PIO
if (!current_SC->use_sg) /* Don't use scatter-gather */ if (!current_SC->use_sg) /* Don't use scatter-gather */
NCR53c406a_pio_read(current_SC->request_buffer, NCR53c406a_pio_read(current_SC->request_buffer, current_SC->request_bufflen);
current_SC->request_bufflen); else { /* Use scatter-gather */
else { /* Use scatter-gather */ sgcount = current_SC->use_sg;
sgcount = current_SC->use_sg; sglist = current_SC->request_buffer;
sglist = current_SC->request_buffer; while (sgcount--) {
while( sgcount-- ) { NCR53c406a_pio_read(page_address(sglist->page) + sglist->offset, sglist->length);
NCR53c406a_pio_read(page_address(sglist->page) + sglist->offset, sglist->length); sglist++;
sglist++; }
} }
} REG0;
REG0; #endif /* USE_PIO */
#endif /* USE_PIO */ }
} break;
break;
case 0x02: /* COMMAND */
case 0x02: /* COMMAND */ current_SC->SCp.phase = command_ph;
current_SC->SCp.phase = command_ph; printk("NCR53c406a: Warning: Unknown interrupt occurred in command phase!\n");
printk("NCR53c406a: Warning: Unknown interrupt occurred in command phase!\n"); break;
break;
case 0x03: /* STATUS */
case 0x03: /* STATUS */ rtrc(7);
rtrc(7); current_SC->SCp.phase = status_ph;
current_SC->SCp.phase = status_ph; VDEB(printk("NCR53c406a: Status phase\n"));
VDEB(printk("NCR53c406a: Status phase\n")); outb(FLUSH_FIFO, CMD_REG);
outb(FLUSH_FIFO, CMD_REG); outb(INIT_CMD_COMPLETE, CMD_REG);
outb(INIT_CMD_COMPLETE, CMD_REG); break;
break;
case 0x04: /* Reserved */
case 0x04: /* Reserved */ case 0x05: /* Reserved */
case 0x05: /* Reserved */ printk("NCR53c406a: WARNING: Reserved phase!!!\n");
printk("NCR53c406a: WARNING: Reserved phase!!!\n"); break;
break;
case 0x06: /* MESSAGE-OUT */
case 0x06: /* MESSAGE-OUT */ DEB(printk("NCR53c406a: Message-Out phase\n"));
DEB(printk("NCR53c406a: Message-Out phase\n")); current_SC->SCp.phase = message_out;
current_SC->SCp.phase = message_out; outb(SET_ATN, CMD_REG); /* Reject the message */
outb(SET_ATN, CMD_REG); /* Reject the message */ outb(MSG_ACCEPT, CMD_REG);
outb(MSG_ACCEPT, CMD_REG); break;
break;
case 0x07: /* MESSAGE-IN */
case 0x07: /* MESSAGE-IN */ rtrc(4);
rtrc(4); VDEB(printk("NCR53c406a: Message-In phase\n"));
VDEB(printk("NCR53c406a: Message-In phase\n")); current_SC->SCp.phase = message_in;
current_SC->SCp.phase = message_in;
current_SC->SCp.Status = inb(SCSI_FIFO);
current_SC->SCp.Status = inb(SCSI_FIFO); current_SC->SCp.Message = inb(SCSI_FIFO);
current_SC->SCp.Message = inb(SCSI_FIFO);
VDEB(printk("SCSI FIFO size=%d\n", inb(FIFO_FLAGS) & 0x1f));
VDEB(printk("SCSI FIFO size=%d\n", inb(FIFO_FLAGS) & 0x1f)); DEB(printk("Status = %02x Message = %02x\n", current_SC->SCp.Status, current_SC->SCp.Message));
DEB(printk("Status = %02x Message = %02x\n",
current_SC->SCp.Status, current_SC->SCp.Message)); if (current_SC->SCp.Message == SAVE_POINTERS || current_SC->SCp.Message == DISCONNECT) {
outb(SET_ATN, CMD_REG); /* Reject message */
if(current_SC->SCp.Message == SAVE_POINTERS || DEB(printk("Discarding SAVE_POINTERS message\n"));
current_SC->SCp.Message == DISCONNECT) { }
outb(SET_ATN, CMD_REG); /* Reject message */ outb(MSG_ACCEPT, CMD_REG);
DEB(printk("Discarding SAVE_POINTERS message\n")); break;
} }
outb(MSG_ACCEPT, CMD_REG);
break;
}
} }
#ifndef IRQ_LEV #ifndef IRQ_LEV
static int irq_probe(void) static int irq_probe(void)
{ {
int irqs, irq; int irqs, irq;
int i; int i;
inb(INT_REG); /* clear the interrupt register */ inb(INT_REG); /* clear the interrupt register */
irqs = probe_irq_on(); irqs = probe_irq_on();
/* Invalid command will cause an interrupt */ /* Invalid command will cause an interrupt */
REG0; REG0;
outb(0xff, CMD_REG); outb(0xff, CMD_REG);
/* Wait for the interrupt to occur */ /* Wait for the interrupt to occur */
i = jiffies + WATCHDOG; i = jiffies + WATCHDOG;
while(time_after(i, jiffies) && !(inb(STAT_REG) & 0x80)) while (time_after(i, jiffies) && !(inb(STAT_REG) & 0x80))
barrier(); barrier();
if (time_before_eq(i, jiffies)) { /* Timed out, must be hardware trouble */ if (time_before_eq(i, jiffies)) { /* Timed out, must be hardware trouble */
probe_irq_off(irqs); probe_irq_off(irqs);
return -1; return -1;
} }
irq = probe_irq_off(irqs); irq = probe_irq_off(irqs);
/* Kick the chip */ /* Kick the chip */
outb(CHIP_RESET, CMD_REG); outb(CHIP_RESET, CMD_REG);
outb(SCSI_NOP, CMD_REG); outb(SCSI_NOP, CMD_REG);
chip_init(); chip_init();
return irq; return irq;
} }
#endif /* IRQ_LEV */ #endif /* IRQ_LEV */
static void chip_init(void) static void chip_init(void)
{ {
REG1; REG1;
#if USE_DMA #if USE_DMA
outb(0x00, PIO_STATUS); outb(0x00, PIO_STATUS);
#else /* USE_PIO */ #else /* USE_PIO */
outb(0x01, PIO_STATUS); outb(0x01, PIO_STATUS);
#endif #endif
outb(0x00, PIO_FLAG); outb(0x00, PIO_FLAG);
outb(C4_IMG, CONFIG4); /* REG0; */ outb(C4_IMG, CONFIG4); /* REG0; */
outb(C3_IMG, CONFIG3); outb(C3_IMG, CONFIG3);
outb(C2_IMG, CONFIG2); outb(C2_IMG, CONFIG2);
outb(C1_IMG, CONFIG1); outb(C1_IMG, CONFIG1);
outb(0x05, CLKCONV); /* clock conversion factor */ outb(0x05, CLKCONV); /* clock conversion factor */
outb(0x9C, SRTIMOUT); /* Selection timeout */ outb(0x9C, SRTIMOUT); /* Selection timeout */
outb(0x05, SYNCPRD); /* Synchronous transfer period */ outb(0x05, SYNCPRD); /* Synchronous transfer period */
outb(SYNC_MODE, SYNCOFF); /* synchronous mode */ outb(SYNC_MODE, SYNCOFF); /* synchronous mode */
} }
void __init calc_port_addr(void) static void __init calc_port_addr(void)
{ {
/* Control Register Set 0 */ /* Control Register Set 0 */
TC_LSB = (port_base+0x00); TC_LSB = (port_base + 0x00);
TC_MSB = (port_base+0x01); TC_MSB = (port_base + 0x01);
SCSI_FIFO = (port_base+0x02); SCSI_FIFO = (port_base + 0x02);
CMD_REG = (port_base+0x03); CMD_REG = (port_base + 0x03);
STAT_REG = (port_base+0x04); STAT_REG = (port_base + 0x04);
DEST_ID = (port_base+0x04); DEST_ID = (port_base + 0x04);
INT_REG = (port_base+0x05); INT_REG = (port_base + 0x05);
SRTIMOUT = (port_base+0x05); SRTIMOUT = (port_base + 0x05);
SEQ_REG = (port_base+0x06); SEQ_REG = (port_base + 0x06);
SYNCPRD = (port_base+0x06); SYNCPRD = (port_base + 0x06);
FIFO_FLAGS = (port_base+0x07); FIFO_FLAGS = (port_base + 0x07);
SYNCOFF = (port_base+0x07); SYNCOFF = (port_base + 0x07);
CONFIG1 = (port_base+0x08); CONFIG1 = (port_base + 0x08);
CLKCONV = (port_base+0x09); CLKCONV = (port_base + 0x09);
/* TESTREG = (port_base+0x0A); */ /* TESTREG = (port_base+0x0A); */
CONFIG2 = (port_base+0x0B); CONFIG2 = (port_base + 0x0B);
CONFIG3 = (port_base+0x0C); CONFIG3 = (port_base + 0x0C);
CONFIG4 = (port_base+0x0D); CONFIG4 = (port_base + 0x0D);
TC_HIGH = (port_base+0x0E); TC_HIGH = (port_base + 0x0E);
/* FIFO_BOTTOM = (port_base+0x0F); */ /* FIFO_BOTTOM = (port_base+0x0F); */
/* Control Register Set 1 */ /* Control Register Set 1 */
/* JUMPER_SENSE = (port_base+0x00);*/ /* JUMPER_SENSE = (port_base+0x00); */
/* SRAM_PTR = (port_base+0x01);*/ /* SRAM_PTR = (port_base+0x01); */
/* SRAM_DATA = (port_base+0x02);*/ /* SRAM_DATA = (port_base+0x02); */
PIO_FIFO = (port_base+0x04); PIO_FIFO = (port_base + 0x04);
/* PIO_FIFO1 = (port_base+0x05);*/ /* PIO_FIFO1 = (port_base+0x05); */
/* PIO_FIFO2 = (port_base+0x06);*/ /* PIO_FIFO2 = (port_base+0x06); */
/* PIO_FIFO3 = (port_base+0x07);*/ /* PIO_FIFO3 = (port_base+0x07); */
PIO_STATUS = (port_base+0x08); PIO_STATUS = (port_base + 0x08);
/* ATA_CMD = (port_base+0x09);*/ /* ATA_CMD = (port_base+0x09); */
/* ATA_ERR = (port_base+0x0A);*/ /* ATA_ERR = (port_base+0x0A); */
PIO_FLAG = (port_base+0x0B); PIO_FLAG = (port_base + 0x0B);
CONFIG5 = (port_base+0x0D); CONFIG5 = (port_base + 0x0D);
/* SIGNATURE = (port_base+0x0E);*/ /* SIGNATURE = (port_base+0x0E); */
/* CONFIG6 = (port_base+0x0F);*/ /* CONFIG6 = (port_base+0x0F); */
} }
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
/* Eventually this will go into an include file, but this will be later */ /* Eventually this will go into an include file, but this will be later */
......
drivers/scsi/NCR53c406a.h
View file @ c7a4e6c2
...@@ -26,50 +26,34 @@ ...@@ -26,50 +26,34 @@
* Use SG_NONE if DMA mode is enabled! * Use SG_NONE if DMA mode is enabled!
*/ */
#define NCR53c406a { \ #define NCR53c406a { \
proc_name: "NCR53c406a" /* proc_name */, \ proc_name: "NCR53c406a" /* proc_name */, \
name: "NCR53c406a" /* name */, \ name: "NCR53c406a" /* name */, \
detect: NCR53c406a_detect /* detect */, \ detect: NCR53c406a_detect /* detect */, \
info: NCR53c406a_info /* info */, \ info: NCR53c406a_info /* info */, \
command: NCR53c406a_command /* command */, \ command: NCR53c406a_command /* command */, \
queuecommand: NCR53c406a_queue /* queuecommand */, \ queuecommand: NCR53c406a_queue /* queuecommand */, \
abort: NCR53c406a_abort /* abort */, \ eh_abort_handler: NCR53c406a_abort /* abort */, \
reset: NCR53c406a_reset /* reset */, \ eh_bus_reset_handler: NCR53c406a_bus_reset /* reset */, \
bios_param: NCR53c406a_biosparm /* biosparm */, \ eh_device_reset_handler: NCR53c406a_device_reset /* reset */, \
can_queue: 1 /* can_queue */, \ eh_host_reset_handler: NCR53c406a_host_reset /* reset */, \
this_id: 7 /* SCSI ID of the chip */, \ bios_param: NCR53c406a_biosparm /* biosparm */, \
sg_tablesize: 32 /*SG_ALL*/ /*SG_NONE*/, \ can_queue: 1 /* can_queue */, \
cmd_per_lun: 1 /* commands per lun */, \ this_id: 7 /* SCSI ID of the chip */, \
unchecked_isa_dma: 1 /* unchecked_isa_dma */, \ sg_tablesize: 32 /*SG_ALL*/ /*SG_NONE*/, \
use_clustering: ENABLE_CLUSTERING \ cmd_per_lun: 1 /* commands per lun */, \
unchecked_isa_dma: 1 /* unchecked_isa_dma */, \
use_clustering: ENABLE_CLUSTERING \
} }
int NCR53c406a_detect(Scsi_Host_Template *); static int NCR53c406a_detect(Scsi_Host_Template *);
const char* NCR53c406a_info(struct Scsi_Host *); static const char *NCR53c406a_info(struct Scsi_Host *);
int NCR53c406a_command(Scsi_Cmnd *); static int NCR53c406a_command(Scsi_Cmnd *);
int NCR53c406a_queue(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *)); static int NCR53c406a_queue(Scsi_Cmnd *, void (*done) (Scsi_Cmnd *));
int NCR53c406a_abort(Scsi_Cmnd *); static int NCR53c406a_abort(Scsi_Cmnd *);
int NCR53c406a_reset(Scsi_Cmnd *, unsigned int); static int NCR53c406a_bus_reset(Scsi_Cmnd *);
int NCR53c406a_biosparm(Disk *, struct block_device *, int []); static int NCR53c406a_device_reset(Scsi_Cmnd *);
static int NCR53c406a_host_reset(Scsi_Cmnd *);
#endif /* _NCR53C406A_H */ static int NCR53c406a_biosparm(Disk *, struct block_device *, int[]);
/*
* Overrides for Emacs so that we get a uniform tabbing style.
* Emacs will notice this stuff at the end of the file and automatically
* adjust the settings for this buffer only. This must remain at the end
* of the file.
* ---------------------------------------------------------------------------
* Local variables:
* c-indent-level: 4
* c-brace-imaginary-offset: 0
* c-brace-offset: -4
* c-argdecl-indent: 4
* c-label-offset: -4
* c-continued-statement-offset: 4
* c-continued-brace-offset: 0
* indent-tabs-mode: nil
* tab-width: 8
* End:
*/
#endif /* _NCR53C406A_H */
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