Commit ca120a79 authored by Greentime Hu's avatar Greentime Hu Committed by Palmer Dabbelt

soc: sifive: ccache: Rename SiFive L2 cache to Composable cache.

Since composable cache may be L3 cache if there is a L2 cache, we should
use its original name composable cache to prevent confusion.

There are some new lines were generated due to adding the compatible
"sifive,ccache0" into ID table and indent requirement.

The sifive L2 has been renamed to sifive CCACHE, EDAC driver needs to
apply the change as well.
Signed-off-by: default avatarGreentime Hu <greentime.hu@sifive.com>
Signed-off-by: default avatarZong Li <zong.li@sifive.com>
Co-developed-by: default avatarZong Li <zong.li@sifive.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220913061817.22564-3-zong.li@sifive.comSigned-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 44dce4b0
...@@ -473,7 +473,7 @@ config EDAC_ALTERA_SDMMC ...@@ -473,7 +473,7 @@ config EDAC_ALTERA_SDMMC
config EDAC_SIFIVE config EDAC_SIFIVE
bool "Sifive platform EDAC driver" bool "Sifive platform EDAC driver"
depends on EDAC=y && SIFIVE_L2 depends on EDAC=y && SIFIVE_CCACHE
help help
Support for error detection and correction on the SiFive SoCs. Support for error detection and correction on the SiFive SoCs.
......
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
/* /*
* SiFive Platform EDAC Driver * SiFive Platform EDAC Driver
* *
* Copyright (C) 2018-2019 SiFive, Inc. * Copyright (C) 2018-2022 SiFive, Inc.
* *
* This driver is partially based on octeon_edac-pc.c * This driver is partially based on octeon_edac-pc.c
* *
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
#include <linux/edac.h> #include <linux/edac.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include "edac_module.h" #include "edac_module.h"
#include <soc/sifive/sifive_l2_cache.h> #include <soc/sifive/sifive_ccache.h>
#define DRVNAME "sifive_edac" #define DRVNAME "sifive_edac"
...@@ -32,9 +32,9 @@ int ecc_err_event(struct notifier_block *this, unsigned long event, void *ptr) ...@@ -32,9 +32,9 @@ int ecc_err_event(struct notifier_block *this, unsigned long event, void *ptr)
p = container_of(this, struct sifive_edac_priv, notifier); p = container_of(this, struct sifive_edac_priv, notifier);
if (event == SIFIVE_L2_ERR_TYPE_UE) if (event == SIFIVE_CCACHE_ERR_TYPE_UE)
edac_device_handle_ue(p->dci, 0, 0, msg); edac_device_handle_ue(p->dci, 0, 0, msg);
else if (event == SIFIVE_L2_ERR_TYPE_CE) else if (event == SIFIVE_CCACHE_ERR_TYPE_CE)
edac_device_handle_ce(p->dci, 0, 0, msg); edac_device_handle_ce(p->dci, 0, 0, msg);
return NOTIFY_OK; return NOTIFY_OK;
...@@ -67,7 +67,7 @@ static int ecc_register(struct platform_device *pdev) ...@@ -67,7 +67,7 @@ static int ecc_register(struct platform_device *pdev)
goto err; goto err;
} }
register_sifive_l2_error_notifier(&p->notifier); register_sifive_ccache_error_notifier(&p->notifier);
return 0; return 0;
...@@ -81,7 +81,7 @@ static int ecc_unregister(struct platform_device *pdev) ...@@ -81,7 +81,7 @@ static int ecc_unregister(struct platform_device *pdev)
{ {
struct sifive_edac_priv *p = platform_get_drvdata(pdev); struct sifive_edac_priv *p = platform_get_drvdata(pdev);
unregister_sifive_l2_error_notifier(&p->notifier); unregister_sifive_ccache_error_notifier(&p->notifier);
edac_device_del_device(&pdev->dev); edac_device_del_device(&pdev->dev);
edac_device_free_ctl_info(p->dci); edac_device_free_ctl_info(p->dci);
......
...@@ -2,9 +2,9 @@ ...@@ -2,9 +2,9 @@
if SOC_SIFIVE if SOC_SIFIVE
config SIFIVE_L2 config SIFIVE_CCACHE
bool "Sifive L2 Cache controller" bool "Sifive Composable Cache controller"
help help
Support for the L2 cache controller on SiFive platforms. Support for the composable cache controller on SiFive platforms.
endif endif
# SPDX-License-Identifier: GPL-2.0 # SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_SIFIVE_L2) += sifive_l2_cache.o obj-$(CONFIG_SIFIVE_CCACHE) += sifive_ccache.o
/* SPDX-License-Identifier: GPL-2.0 */
/*
* SiFive Composable Cache Controller header file
*
*/
#ifndef __SOC_SIFIVE_CCACHE_H
#define __SOC_SIFIVE_CCACHE_H
extern int register_sifive_ccache_error_notifier(struct notifier_block *nb);
extern int unregister_sifive_ccache_error_notifier(struct notifier_block *nb);
#define SIFIVE_CCACHE_ERR_TYPE_CE 0
#define SIFIVE_CCACHE_ERR_TYPE_UE 1
#endif /* __SOC_SIFIVE_CCACHE_H */
/* SPDX-License-Identifier: GPL-2.0 */
/*
* SiFive L2 Cache Controller header file
*
*/
#ifndef __SOC_SIFIVE_L2_CACHE_H
#define __SOC_SIFIVE_L2_CACHE_H
extern int register_sifive_l2_error_notifier(struct notifier_block *nb);
extern int unregister_sifive_l2_error_notifier(struct notifier_block *nb);
#define SIFIVE_L2_ERR_TYPE_CE 0
#define SIFIVE_L2_ERR_TYPE_UE 1
#endif /* __SOC_SIFIVE_L2_CACHE_H */
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