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Kirill Smelkov
linux
Commits
cb479129
Commit
cb479129
authored
Jul 11, 2012
by
Mike Turquette
Browse files
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Merge branch 'clk/mxs-for-3.6' of
git://git.linaro.org/people/shawnguo/linux-2.6
into clk-3.6
parents
50667d63
64e2bc41
Changes
2
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2 changed files
with
7 additions
and
5 deletions
+7
-5
drivers/clk/mxs/clk-imx23.c
drivers/clk/mxs/clk-imx23.c
+2
-1
drivers/clk/mxs/clk-imx28.c
drivers/clk/mxs/clk-imx28.c
+5
-4
No files found.
drivers/clk/mxs/clk-imx23.c
View file @
cb479129
...
@@ -106,7 +106,7 @@ static struct clk_lookup lcdif_lookups[] = {
...
@@ -106,7 +106,7 @@ static struct clk_lookup lcdif_lookups[] = {
static
struct
clk_lookup
gpmi_lookups
[]
=
{
static
struct
clk_lookup
gpmi_lookups
[]
=
{
{
.
dev_id
=
"imx23-gpmi-nand"
,
},
{
.
dev_id
=
"imx23-gpmi-nand"
,
},
{
.
dev_id
=
"8000c000.gpmi"
,
},
{
.
dev_id
=
"8000c000.gpmi
-nand
"
,
},
};
};
static
const
char
*
sel_pll
[]
__initconst
=
{
"pll"
,
"ref_xtal"
,
};
static
const
char
*
sel_pll
[]
__initconst
=
{
"pll"
,
"ref_xtal"
,
};
...
@@ -189,6 +189,7 @@ int __init mx23_clocks_init(void)
...
@@ -189,6 +189,7 @@ int __init mx23_clocks_init(void)
}
}
clk_register_clkdev
(
clks
[
clk32k
],
NULL
,
"timrot"
);
clk_register_clkdev
(
clks
[
clk32k
],
NULL
,
"timrot"
);
clk_register_clkdev
(
clks
[
pwm
],
NULL
,
"80064000.pwm"
);
clk_register_clkdevs
(
clks
[
hbus
],
hbus_lookups
,
ARRAY_SIZE
(
hbus_lookups
));
clk_register_clkdevs
(
clks
[
hbus
],
hbus_lookups
,
ARRAY_SIZE
(
hbus_lookups
));
clk_register_clkdevs
(
clks
[
xbus
],
xbus_lookups
,
ARRAY_SIZE
(
xbus_lookups
));
clk_register_clkdevs
(
clks
[
xbus
],
xbus_lookups
,
ARRAY_SIZE
(
xbus_lookups
));
clk_register_clkdevs
(
clks
[
uart
],
uart_lookups
,
ARRAY_SIZE
(
uart_lookups
));
clk_register_clkdevs
(
clks
[
uart
],
uart_lookups
,
ARRAY_SIZE
(
uart_lookups
));
...
...
drivers/clk/mxs/clk-imx28.c
View file @
cb479129
...
@@ -112,11 +112,11 @@ static void __init clk_misc_init(void)
...
@@ -112,11 +112,11 @@ static void __init clk_misc_init(void)
/*
/*
* 480 MHz seems too high to be ssp clock source directly,
* 480 MHz seems too high to be ssp clock source directly,
* so set frac0 to get a 288 MHz ref_io0.
* so set frac0 to get a 288 MHz ref_io0
and ref_io1
.
*/
*/
val
=
readl_relaxed
(
FRAC0
);
val
=
readl_relaxed
(
FRAC0
);
val
&=
~
(
0x3f
<<
BP_FRAC0_IO0FRAC
);
val
&=
~
(
(
0x3f
<<
BP_FRAC0_IO0FRAC
)
|
(
0x3f
<<
BP_FRAC0_IO1FRAC
)
);
val
|=
30
<<
BP_FRAC0_IO0FRAC
;
val
|=
(
30
<<
BP_FRAC0_IO0FRAC
)
|
(
30
<<
BP_FRAC0_IO1FRAC
)
;
writel_relaxed
(
val
,
FRAC0
);
writel_relaxed
(
val
,
FRAC0
);
}
}
...
@@ -174,7 +174,7 @@ static struct clk_lookup lcdif_lookups[] = {
...
@@ -174,7 +174,7 @@ static struct clk_lookup lcdif_lookups[] = {
static
struct
clk_lookup
gpmi_lookups
[]
=
{
static
struct
clk_lookup
gpmi_lookups
[]
=
{
{
.
dev_id
=
"imx28-gpmi-nand"
,
},
{
.
dev_id
=
"imx28-gpmi-nand"
,
},
{
.
dev_id
=
"8000c000.gpmi"
,
},
{
.
dev_id
=
"8000c000.gpmi
-nand
"
,
},
};
};
static
struct
clk_lookup
fec_lookups
[]
=
{
static
struct
clk_lookup
fec_lookups
[]
=
{
...
@@ -314,6 +314,7 @@ int __init mx28_clocks_init(void)
...
@@ -314,6 +314,7 @@ int __init mx28_clocks_init(void)
clk_register_clkdev
(
clks
[
clk32k
],
NULL
,
"timrot"
);
clk_register_clkdev
(
clks
[
clk32k
],
NULL
,
"timrot"
);
clk_register_clkdev
(
clks
[
enet_out
],
NULL
,
"enet_out"
);
clk_register_clkdev
(
clks
[
enet_out
],
NULL
,
"enet_out"
);
clk_register_clkdev
(
clks
[
pwm
],
NULL
,
"80064000.pwm"
);
clk_register_clkdevs
(
clks
[
hbus
],
hbus_lookups
,
ARRAY_SIZE
(
hbus_lookups
));
clk_register_clkdevs
(
clks
[
hbus
],
hbus_lookups
,
ARRAY_SIZE
(
hbus_lookups
));
clk_register_clkdevs
(
clks
[
xbus
],
xbus_lookups
,
ARRAY_SIZE
(
xbus_lookups
));
clk_register_clkdevs
(
clks
[
xbus
],
xbus_lookups
,
ARRAY_SIZE
(
xbus_lookups
));
clk_register_clkdevs
(
clks
[
uart
],
uart_lookups
,
ARRAY_SIZE
(
uart_lookups
));
clk_register_clkdevs
(
clks
[
uart
],
uart_lookups
,
ARRAY_SIZE
(
uart_lookups
));
...
...
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