Commit cd6b984f authored by Kan Liang's avatar Kan Liang Committed by Ingo Molnar

perf/x86: Remove pmu->pebs_no_xmm_regs

We don't need pmu->pebs_no_xmm_regs anymore, the capabilities
PERF_PMU_CAP_EXTENDED_REGS can be used to check if XMM registers
collection is supported.
Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: https://lkml.kernel.org/r/1559081314-9714-4-git-send-email-kan.liang@linux.intel.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent dce86ac7
...@@ -568,7 +568,7 @@ int x86_pmu_hw_config(struct perf_event *event) ...@@ -568,7 +568,7 @@ int x86_pmu_hw_config(struct perf_event *event)
* be collected in PEBS on some platforms, e.g. Icelake * be collected in PEBS on some platforms, e.g. Icelake
*/ */
if (unlikely(event->attr.sample_regs_intr & PERF_REG_EXTENDED_MASK)) { if (unlikely(event->attr.sample_regs_intr & PERF_REG_EXTENDED_MASK)) {
if (x86_pmu.pebs_no_xmm_regs) if (!(event->pmu->capabilities & PERF_PMU_CAP_EXTENDED_REGS))
return -EINVAL; return -EINVAL;
if (!event->attr.precise_ip) if (!event->attr.precise_ip)
......
...@@ -1964,10 +1964,9 @@ void __init intel_ds_init(void) ...@@ -1964,10 +1964,9 @@ void __init intel_ds_init(void)
x86_pmu.bts = boot_cpu_has(X86_FEATURE_BTS); x86_pmu.bts = boot_cpu_has(X86_FEATURE_BTS);
x86_pmu.pebs = boot_cpu_has(X86_FEATURE_PEBS); x86_pmu.pebs = boot_cpu_has(X86_FEATURE_PEBS);
x86_pmu.pebs_buffer_size = PEBS_BUFFER_SIZE; x86_pmu.pebs_buffer_size = PEBS_BUFFER_SIZE;
if (x86_pmu.version <= 4) { if (x86_pmu.version <= 4)
x86_pmu.pebs_no_isolation = 1; x86_pmu.pebs_no_isolation = 1;
x86_pmu.pebs_no_xmm_regs = 1;
}
if (x86_pmu.pebs) { if (x86_pmu.pebs) {
char pebs_type = x86_pmu.intel_cap.pebs_trap ? '+' : '-'; char pebs_type = x86_pmu.intel_cap.pebs_trap ? '+' : '-';
char *pebs_qual = ""; char *pebs_qual = "";
...@@ -2023,7 +2022,6 @@ void __init intel_ds_init(void) ...@@ -2023,7 +2022,6 @@ void __init intel_ds_init(void)
x86_get_pmu()->capabilities |= PERF_PMU_CAP_EXTENDED_REGS; x86_get_pmu()->capabilities |= PERF_PMU_CAP_EXTENDED_REGS;
} else { } else {
/* Only basic record supported */ /* Only basic record supported */
x86_pmu.pebs_no_xmm_regs = 1;
x86_pmu.large_pebs_flags &= x86_pmu.large_pebs_flags &=
~(PERF_SAMPLE_ADDR | ~(PERF_SAMPLE_ADDR |
PERF_SAMPLE_TIME | PERF_SAMPLE_TIME |
......
...@@ -650,8 +650,7 @@ struct x86_pmu { ...@@ -650,8 +650,7 @@ struct x86_pmu {
pebs_broken :1, pebs_broken :1,
pebs_prec_dist :1, pebs_prec_dist :1,
pebs_no_tlb :1, pebs_no_tlb :1,
pebs_no_isolation :1, pebs_no_isolation :1;
pebs_no_xmm_regs :1;
int pebs_record_size; int pebs_record_size;
int pebs_buffer_size; int pebs_buffer_size;
int max_pebs_events; int max_pebs_events;
......
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