Commit cdd3a249 authored by Sai Praneeth Prakhya's avatar Sai Praneeth Prakhya Committed by Joerg Roedel

iommu/vt-d: Introduce macros useful for dumping DMAR table

A scalable mode DMAR table walk would involve looking at bits in each stage
of walk, like,
1. Is PASID enabled in the context entry?
2. What's the size of PASID directory?
3. Is the PASID directory entry present?
4. Is the PASID table entry present?
5. Number of PASID table entries?

Hence, add these macros that will later be used during this walk.
Apart from adding new macros, move existing macros (like
pasid_pde_is_present(), get_pasid_table_from_pde() and pasid_supported())
to appropriate header files so that they could be reused.

Cc: Joerg Roedel <joro@8bytes.org>
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: Lu Baolu <baolu.lu@linux.intel.com>
Cc: Sohil Mehta <sohil.mehta@intel.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: default avatarLu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarSai Praneeth Prakhya <sai.praneeth.prakhya@intel.com>
Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent ea09506c
...@@ -357,6 +357,7 @@ int dmar_disabled = 0; ...@@ -357,6 +357,7 @@ int dmar_disabled = 0;
int dmar_disabled = 1; int dmar_disabled = 1;
#endif /*CONFIG_INTEL_IOMMU_DEFAULT_ON*/ #endif /*CONFIG_INTEL_IOMMU_DEFAULT_ON*/
int intel_iommu_sm;
int intel_iommu_enabled = 0; int intel_iommu_enabled = 0;
EXPORT_SYMBOL_GPL(intel_iommu_enabled); EXPORT_SYMBOL_GPL(intel_iommu_enabled);
...@@ -364,17 +365,12 @@ static int dmar_map_gfx = 1; ...@@ -364,17 +365,12 @@ static int dmar_map_gfx = 1;
static int dmar_forcedac; static int dmar_forcedac;
static int intel_iommu_strict; static int intel_iommu_strict;
static int intel_iommu_superpage = 1; static int intel_iommu_superpage = 1;
static int intel_iommu_sm;
static int iommu_identity_mapping; static int iommu_identity_mapping;
#define IDENTMAP_ALL 1 #define IDENTMAP_ALL 1
#define IDENTMAP_GFX 2 #define IDENTMAP_GFX 2
#define IDENTMAP_AZALIA 4 #define IDENTMAP_AZALIA 4
#define sm_supported(iommu) (intel_iommu_sm && ecap_smts((iommu)->ecap))
#define pasid_supported(iommu) (sm_supported(iommu) && \
ecap_pasid((iommu)->ecap))
int intel_iommu_gfx_mapped; int intel_iommu_gfx_mapped;
EXPORT_SYMBOL_GPL(intel_iommu_gfx_mapped); EXPORT_SYMBOL_GPL(intel_iommu_gfx_mapped);
......
...@@ -169,23 +169,6 @@ int intel_pasid_alloc_table(struct device *dev) ...@@ -169,23 +169,6 @@ int intel_pasid_alloc_table(struct device *dev)
return 0; return 0;
} }
/* Get PRESENT bit of a PASID directory entry. */
static inline bool
pasid_pde_is_present(struct pasid_dir_entry *pde)
{
return READ_ONCE(pde->val) & PASID_PTE_PRESENT;
}
/* Get PASID table from a PASID directory entry. */
static inline struct pasid_entry *
get_pasid_table_from_pde(struct pasid_dir_entry *pde)
{
if (!pasid_pde_is_present(pde))
return NULL;
return phys_to_virt(READ_ONCE(pde->val) & PDE_PFN_MASK);
}
void intel_pasid_free_table(struct device *dev) void intel_pasid_free_table(struct device *dev)
{ {
struct device_domain_info *info; struct device_domain_info *info;
......
...@@ -18,6 +18,10 @@ ...@@ -18,6 +18,10 @@
#define PDE_PFN_MASK PAGE_MASK #define PDE_PFN_MASK PAGE_MASK
#define PASID_PDE_SHIFT 6 #define PASID_PDE_SHIFT 6
#define MAX_NR_PASID_BITS 20 #define MAX_NR_PASID_BITS 20
#define PASID_TBL_ENTRIES BIT(PASID_PDE_SHIFT)
#define is_pasid_enabled(entry) (((entry)->lo >> 3) & 0x1)
#define get_pasid_dir_size(entry) (1 << ((((entry)->lo >> 9) & 0x7) + 7))
/* /*
* Domain ID reserved for pasid entries programmed for first-level * Domain ID reserved for pasid entries programmed for first-level
...@@ -49,6 +53,28 @@ struct pasid_table { ...@@ -49,6 +53,28 @@ struct pasid_table {
struct list_head dev; /* device list */ struct list_head dev; /* device list */
}; };
/* Get PRESENT bit of a PASID directory entry. */
static inline bool pasid_pde_is_present(struct pasid_dir_entry *pde)
{
return READ_ONCE(pde->val) & PASID_PTE_PRESENT;
}
/* Get PASID table from a PASID directory entry. */
static inline struct pasid_entry *
get_pasid_table_from_pde(struct pasid_dir_entry *pde)
{
if (!pasid_pde_is_present(pde))
return NULL;
return phys_to_virt(READ_ONCE(pde->val) & PDE_PFN_MASK);
}
/* Get PRESENT bit of a PASID table entry. */
static inline bool pasid_pte_is_present(struct pasid_entry *pte)
{
return READ_ONCE(pte->val[0]) & PASID_PTE_PRESENT;
}
extern u32 intel_pasid_max_id; extern u32 intel_pasid_max_id;
int intel_pasid_alloc_id(void *ptr, int start, int end, gfp_t gfp); int intel_pasid_alloc_id(void *ptr, int start, int end, gfp_t gfp);
void intel_pasid_free_id(int pasid); void intel_pasid_free_id(int pasid);
......
...@@ -447,6 +447,12 @@ enum { ...@@ -447,6 +447,12 @@ enum {
#define VTD_FLAG_TRANS_PRE_ENABLED (1 << 0) #define VTD_FLAG_TRANS_PRE_ENABLED (1 << 0)
#define VTD_FLAG_IRQ_REMAP_PRE_ENABLED (1 << 1) #define VTD_FLAG_IRQ_REMAP_PRE_ENABLED (1 << 1)
extern int intel_iommu_sm;
#define sm_supported(iommu) (intel_iommu_sm && ecap_smts((iommu)->ecap))
#define pasid_supported(iommu) (sm_supported(iommu) && \
ecap_pasid((iommu)->ecap))
struct pasid_entry; struct pasid_entry;
struct pasid_state_entry; struct pasid_state_entry;
struct page_req_dsc; struct page_req_dsc;
......
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