Skip to content

L
linux
Commit cfd673e5 authored by Paul Mackerras's avatar Paul Mackerras Committed by Linus Torvalds
Browse files
Options

[PATCH] ppc64: clean up trap handling in head.S 

This patch is from Jake Moilanen <moilanen@austin.ibm.com>.

Changed the naming conventions for head.S to more closely follow the Linux
naming conventions.
Signed-off-by: default avatarJake Moilanen <moilanen@austin.ibm.com>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 8e7844eb
Hide whitespace changes
Inline Side-by-side
Showing with 151 additions and 151 deletions
arch/ppc64/kernel/LparData.c
View file @ cfd673e5
...@@ -59,23 +59,23 @@ struct HvReleaseData hvReleaseData = { ...@@ -59,23 +59,23 @@ struct HvReleaseData hvReleaseData = {
0xf4, 0x4b, 0xf6, 0xf4 }, 0xf4, 0x4b, 0xf6, 0xf4 },
}; };
extern void SystemReset_Iseries(void); extern void system_reset_iSeries(void);
extern void MachineCheck_Iseries(void); extern void machine_check_iSeries(void);
extern void DataAccess_Iseries(void); extern void data_access_iSeries(void);
extern void InstructionAccess_Iseries(void); extern void instruction_access_iSeries(void);
extern void HardwareInterrupt_Iseries(void); extern void hardware_interrupt_iSeries(void);
extern void Alignment_Iseries(void); extern void alignment_iSeries(void);
extern void ProgramCheck_Iseries(void); extern void program_check_iSeries(void);
extern void FPUnavailable_Iseries(void); extern void fp_unavailable_iSeries(void);
extern void Decrementer_Iseries(void); extern void decrementer_iSeries(void);
extern void Trap_0a_Iseries(void); extern void trap_0a_iSeries(void);
extern void Trap_0b_Iseries(void); extern void trap_0b_iSeries(void);
extern void SystemCall_Iseries(void); extern void system_call_iSeries(void);
extern void SingleStep_Iseries(void); extern void single_step_iSeries(void);
extern void Trap_0e_Iseries(void); extern void trap_0e_iSeries(void);
extern void PerformanceMonitor_Iseries(void); extern void performance_monitor_iSeries(void);
extern void DataAccessSLB_Iseries(void); extern void data_access_slb_iSeries(void);
extern void InstructionAccessSLB_Iseries(void); extern void instruction_access_slb_iSeries(void);
struct ItLpNaca itLpNaca = { struct ItLpNaca itLpNaca = {
.xDesc = 0xd397d581, /* "LpNa" ebcdic */ .xDesc = 0xd397d581, /* "LpNa" ebcdic */
...@@ -105,27 +105,27 @@ struct ItLpNaca itLpNaca = { ...@@ -105,27 +105,27 @@ struct ItLpNaca itLpNaca = {
.xSlicSegmentTablePtr = 0, /* seg table */ .xSlicSegmentTablePtr = 0, /* seg table */
.xOldLpQueue = { 0 }, /* Old LP Queue */ .xOldLpQueue = { 0 }, /* Old LP Queue */
.xInterruptHdlr = { .xInterruptHdlr = {
(u64)SystemReset_Iseries, /* 0x100 System Reset */ (u64)system_reset_iSeries, /* 0x100 System Reset */
(u64)MachineCheck_Iseries, /* 0x200 Machine Check */ (u64)machine_check_iSeries, /* 0x200 Machine Check */
(u64)DataAccess_Iseries, /* 0x300 Data Access */ (u64)data_access_iSeries, /* 0x300 Data Access */
(u64)InstructionAccess_Iseries, /* 0x400 Instruction Access */ (u64)instruction_access_iSeries, /* 0x400 Instruction Access */
(u64)HardwareInterrupt_Iseries, /* 0x500 External */ (u64)hardware_interrupt_iSeries, /* 0x500 External */
(u64)Alignment_Iseries, /* 0x600 Alignment */ (u64)alignment_iSeries, /* 0x600 Alignment */
(u64)ProgramCheck_Iseries, /* 0x700 Program Check */ (u64)program_check_iSeries, /* 0x700 Program Check */
(u64)FPUnavailable_Iseries, /* 0x800 FP Unavailable */ (u64)fp_unavailable_iSeries, /* 0x800 FP Unavailable */
(u64)Decrementer_Iseries, /* 0x900 Decrementer */ (u64)decrementer_iSeries, /* 0x900 Decrementer */
(u64)Trap_0a_Iseries, /* 0xa00 Trap 0A */ (u64)trap_0a_iSeries, /* 0xa00 Trap 0A */
(u64)Trap_0b_Iseries, /* 0xb00 Trap 0B */ (u64)trap_0b_iSeries, /* 0xb00 Trap 0B */
(u64)SystemCall_Iseries, /* 0xc00 System Call */ (u64)system_call_iSeries, /* 0xc00 System Call */
(u64)SingleStep_Iseries, /* 0xd00 Single Step */ (u64)single_step_iSeries, /* 0xd00 Single Step */
(u64)Trap_0e_Iseries, /* 0xe00 Trap 0E */ (u64)trap_0e_iSeries, /* 0xe00 Trap 0E */
(u64)PerformanceMonitor_Iseries,/* 0xf00 Performance Monitor */ (u64)performance_monitor_iSeries,/* 0xf00 Performance Monitor */
0, /* int 0x1000 */ 0, /* int 0x1000 */
0, /* int 0x1010 */ 0, /* int 0x1010 */
0, /* int 0x1020 CPU ctls */ 0, /* int 0x1020 CPU ctls */
(u64)HardwareInterrupt_Iseries, /* SC Ret Hdlr */ (u64)hardware_interrupt_iSeries, /* SC Ret Hdlr */
(u64)DataAccessSLB_Iseries, /* 0x380 D-SLB */ (u64)data_access_slb_iSeries, /* 0x380 D-SLB */
(u64)InstructionAccessSLB_Iseries /* 0x480 I-SLB */ (u64)instruction_access_slb_iSeries /* 0x480 I-SLB */
} }
}; };
EXPORT_SYMBOL(itLpNaca); EXPORT_SYMBOL(itLpNaca);
......
arch/ppc64/kernel/entry.S
View file @ cfd673e5
...@@ -54,8 +54,8 @@ exception_marker: ...@@ -54,8 +54,8 @@ exception_marker:
#undef SHOW_SYSCALLS #undef SHOW_SYSCALLS
.globl SystemCall_common .globl system_call_common
SystemCall_common: system_call_common:
andi. r10,r12,MSR_PR andi. r10,r12,MSR_PR
mr r10,r1 mr r10,r1
addi r1,r1,-INT_FRAME_SIZE addi r1,r1,-INT_FRAME_SIZE
...@@ -100,7 +100,7 @@ SystemCall_common: ...@@ -100,7 +100,7 @@ SystemCall_common:
cmpdi cr1,r0,0x5555 /* syscall 0x5555 */ cmpdi cr1,r0,0x5555 /* syscall 0x5555 */
andi. r10,r12,MSR_PR /* from kernel */ andi. r10,r12,MSR_PR /* from kernel */
crand 4*cr0+eq,4*cr1+eq,4*cr0+eq crand 4*cr0+eq,4*cr1+eq,4*cr0+eq
beq HardwareInterrupt_entry beq hardware_interrupt_entry
lbz r10,PACAPROCENABLED(r13) lbz r10,PACAPROCENABLED(r13)
std r10,SOFTE(r1) std r10,SOFTE(r1)
#endif #endif
......
arch/ppc64/kernel/head.S
View file @ cfd673e5
...@@ -78,7 +78,7 @@ ...@@ -78,7 +78,7 @@
* *
* For iSeries: * For iSeries:
* 1. The MMU is on (as it always is for iSeries) * 1. The MMU is on (as it always is for iSeries)
* 2. The kernel is entered at SystemReset_Iseries * 2. The kernel is entered at system_reset_iSeries
*/ */
.text .text
...@@ -165,7 +165,7 @@ _GLOBAL(__secondary_hold) ...@@ -165,7 +165,7 @@ _GLOBAL(__secondary_hold)
#else #else
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
mr r3,r24 mr r3,r24
b .pseries_secondary_smp_init b .pSeries_secondary_smp_init
#else #else
BUG_OPCODE BUG_OPCODE
#endif #endif
...@@ -305,15 +305,15 @@ exception_marker: ...@@ -305,15 +305,15 @@ exception_marker:
*/ */
#define STD_EXCEPTION_PSERIES(n, label) \ #define STD_EXCEPTION_PSERIES(n, label) \
. = n; \ . = n; \
.globl label##_Pseries; \ .globl label##_pSeries; \
label##_Pseries: \ label##_pSeries: \
HMT_MEDIUM; \ HMT_MEDIUM; \
mtspr SPRG1,r13; /* save r13 */ \ mtspr SPRG1,r13; /* save r13 */ \
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common) EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
#define STD_EXCEPTION_ISERIES(n, label, area) \ #define STD_EXCEPTION_ISERIES(n, label, area) \
.globl label##_Iseries; \ .globl label##_iSeries; \
label##_Iseries: \ label##_iSeries: \
HMT_MEDIUM; \ HMT_MEDIUM; \
mtspr SPRG1,r13; /* save r13 */ \ mtspr SPRG1,r13; /* save r13 */ \
EXCEPTION_PROLOG_ISERIES_1(area); \ EXCEPTION_PROLOG_ISERIES_1(area); \
...@@ -321,14 +321,14 @@ label##_Iseries: \ ...@@ -321,14 +321,14 @@ label##_Iseries: \
b label##_common b label##_common
#define MASKABLE_EXCEPTION_ISERIES(n, label) \ #define MASKABLE_EXCEPTION_ISERIES(n, label) \
.globl label##_Iseries; \ .globl label##_iSeries; \
label##_Iseries: \ label##_iSeries: \
HMT_MEDIUM; \ HMT_MEDIUM; \
mtspr SPRG1,r13; /* save r13 */ \ mtspr SPRG1,r13; /* save r13 */ \
EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN); \ EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN); \
lbz r10,PACAPROCENABLED(r13); \ lbz r10,PACAPROCENABLED(r13); \
cmpwi 0,r10,0; \ cmpwi 0,r10,0; \
beq- label##_Iseries_masked; \ beq- label##_iSeries_masked; \
EXCEPTION_PROLOG_ISERIES_2; \ EXCEPTION_PROLOG_ISERIES_2; \
b label##_common; \ b label##_common; \
...@@ -388,17 +388,17 @@ label##_common: \ ...@@ -388,17 +388,17 @@ label##_common: \
.globl __start_interrupts .globl __start_interrupts
__start_interrupts: __start_interrupts:
STD_EXCEPTION_PSERIES(0x100, SystemReset) STD_EXCEPTION_PSERIES(0x100, system_reset)
. = 0x200 . = 0x200
_MachineCheckPseries: _machine_check_pSeries:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 /* save r13 */ mtspr SPRG1,r13 /* save r13 */
EXCEPTION_PROLOG_PSERIES(PACA_EXMC, MachineCheck_common) EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
. = 0x300 . = 0x300
.globl DataAccess_Pseries .globl data_access_pSeries
DataAccess_Pseries: data_access_pSeries:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 mtspr SPRG1,r13
BEGIN_FTR_SECTION BEGIN_FTR_SECTION
...@@ -409,15 +409,15 @@ BEGIN_FTR_SECTION ...@@ -409,15 +409,15 @@ BEGIN_FTR_SECTION
rlwimi r13,r12,16,0x20 rlwimi r13,r12,16,0x20
mfcr r12 mfcr r12
cmpwi r13,0x2c cmpwi r13,0x2c
beq .do_stab_bolted_Pseries beq .do_stab_bolted_pSeries
mtcrf 0x80,r12 mtcrf 0x80,r12
mfspr r12,SPRG2 mfspr r12,SPRG2
END_FTR_SECTION_IFCLR(CPU_FTR_SLB) END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, DataAccess_common) EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common)
. = 0x380 . = 0x380
.globl DataAccessSLB_Pseries .globl data_access_slb_pSeries
DataAccessSLB_Pseries: data_access_slb_pSeries:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 mtspr SPRG1,r13
mfspr r13,SPRG3 /* get paca address into r13 */ mfspr r13,SPRG3 /* get paca address into r13 */
...@@ -433,11 +433,11 @@ DataAccessSLB_Pseries: ...@@ -433,11 +433,11 @@ DataAccessSLB_Pseries:
mfspr r3,DAR mfspr r3,DAR
b .do_slb_miss /* Rel. branch works in real mode */ b .do_slb_miss /* Rel. branch works in real mode */
STD_EXCEPTION_PSERIES(0x400, InstructionAccess) STD_EXCEPTION_PSERIES(0x400, instruction_access)
. = 0x480 . = 0x480
.globl InstructionAccessSLB_Pseries .globl instruction_access_slb_pSeries
InstructionAccessSLB_Pseries: instruction_access_slb_pSeries:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 mtspr SPRG1,r13
mfspr r13,SPRG3 /* get paca address into r13 */ mfspr r13,SPRG3 /* get paca address into r13 */
...@@ -453,25 +453,25 @@ InstructionAccessSLB_Pseries: ...@@ -453,25 +453,25 @@ InstructionAccessSLB_Pseries:
mfspr r3,SRR0 /* SRR0 is faulting address */ mfspr r3,SRR0 /* SRR0 is faulting address */
b .do_slb_miss /* Rel. branch works in real mode */ b .do_slb_miss /* Rel. branch works in real mode */
STD_EXCEPTION_PSERIES(0x500, HardwareInterrupt) STD_EXCEPTION_PSERIES(0x500, hardware_interrupt)
STD_EXCEPTION_PSERIES(0x600, Alignment) STD_EXCEPTION_PSERIES(0x600, alignment)
STD_EXCEPTION_PSERIES(0x700, ProgramCheck) STD_EXCEPTION_PSERIES(0x700, program_check)
STD_EXCEPTION_PSERIES(0x800, FPUnavailable) STD_EXCEPTION_PSERIES(0x800, fp_unavailable)
STD_EXCEPTION_PSERIES(0x900, Decrementer) STD_EXCEPTION_PSERIES(0x900, decrementer)
STD_EXCEPTION_PSERIES(0xa00, Trap_0a) STD_EXCEPTION_PSERIES(0xa00, trap_0a)
STD_EXCEPTION_PSERIES(0xb00, Trap_0b) STD_EXCEPTION_PSERIES(0xb00, trap_0b)
. = 0xc00 . = 0xc00
.globl SystemCall_Pseries .globl system_call_pSeries
SystemCall_Pseries: system_call_pSeries:
HMT_MEDIUM HMT_MEDIUM
mr r9,r13 mr r9,r13
mfmsr r10 mfmsr r10
mfspr r13,SPRG3 mfspr r13,SPRG3
mfspr r11,SRR0 mfspr r11,SRR0
clrrdi r12,r13,32 clrrdi r12,r13,32
oris r12,r12,SystemCall_common@h oris r12,r12,system_call_common@h
ori r12,r12,SystemCall_common@l ori r12,r12,system_call_common@l
mtspr SRR0,r12 mtspr SRR0,r12
ori r10,r10,MSR_IR|MSR_DR|MSR_RI ori r10,r10,MSR_IR|MSR_DR|MSR_RI
mfspr r12,SRR1 mfspr r12,SRR1
...@@ -479,8 +479,8 @@ SystemCall_Pseries: ...@@ -479,8 +479,8 @@ SystemCall_Pseries:
rfid rfid
b . /* prevent speculative execution */ b . /* prevent speculative execution */
STD_EXCEPTION_PSERIES(0xd00, SingleStep) STD_EXCEPTION_PSERIES(0xd00, single_step)
STD_EXCEPTION_PSERIES(0xe00, Trap_0e) STD_EXCEPTION_PSERIES(0xe00, trap_0e)
/* We need to deal with the Altivec unavailable exception /* We need to deal with the Altivec unavailable exception
* here which is at 0xf20, thus in the middle of the * here which is at 0xf20, thus in the middle of the
...@@ -488,18 +488,18 @@ SystemCall_Pseries: ...@@ -488,18 +488,18 @@ SystemCall_Pseries:
* trickery is thus necessary * trickery is thus necessary
*/ */
. = 0xf00 . = 0xf00
b PerformanceMonitor_Pseries b performance_monitor_pSeries
STD_EXCEPTION_PSERIES(0xf20, AltivecUnavailable) STD_EXCEPTION_PSERIES(0xf20, altivec_unavailable)
STD_EXCEPTION_PSERIES(0x1300, InstructionBreakpoint) STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint)
STD_EXCEPTION_PSERIES(0x1700, AltivecAssist) STD_EXCEPTION_PSERIES(0x1700, altivec_assist)
/* moved from 0xf00 */ /* moved from 0xf00 */
STD_EXCEPTION_PSERIES(0x3000, PerformanceMonitor) STD_EXCEPTION_PSERIES(0x3000, performance_monitor)
. = 0x3100 . = 0x3100
_GLOBAL(do_stab_bolted_Pseries) _GLOBAL(do_stab_bolted_pSeries)
mtcrf 0x80,r12 mtcrf 0x80,r12
mfspr r12,SPRG2 mfspr r12,SPRG2
EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted) EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted)
...@@ -558,10 +558,10 @@ __end_systemcfg: ...@@ -558,10 +558,10 @@ __end_systemcfg:
/*** ISeries-LPAR interrupt handlers ***/ /*** ISeries-LPAR interrupt handlers ***/
STD_EXCEPTION_ISERIES(0x200, MachineCheck, PACA_EXMC) STD_EXCEPTION_ISERIES(0x200, machine_check, PACA_EXMC)
.globl DataAccess_Iseries .globl data_access_iSeries
DataAccess_Iseries: data_access_iSeries:
mtspr SPRG1,r13 mtspr SPRG1,r13
BEGIN_FTR_SECTION BEGIN_FTR_SECTION
mtspr SPRG2,r12 mtspr SPRG2,r12
...@@ -571,23 +571,23 @@ BEGIN_FTR_SECTION ...@@ -571,23 +571,23 @@ BEGIN_FTR_SECTION
rlwimi r13,r12,16,0x20 rlwimi r13,r12,16,0x20
mfcr r12 mfcr r12
cmpwi r13,0x2c cmpwi r13,0x2c
beq .do_stab_bolted_Iseries beq .do_stab_bolted_iSeries
mtcrf 0x80,r12 mtcrf 0x80,r12
mfspr r12,SPRG2 mfspr r12,SPRG2
END_FTR_SECTION_IFCLR(CPU_FTR_SLB) END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN) EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN)
EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_ISERIES_2
b DataAccess_common b data_access_common
.do_stab_bolted_Iseries: .do_stab_bolted_iSeries:
mtcrf 0x80,r12 mtcrf 0x80,r12
mfspr r12,SPRG2 mfspr r12,SPRG2
EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB) EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_ISERIES_2
b .do_stab_bolted b .do_stab_bolted
.globl DataAccessSLB_Iseries .globl data_access_slb_iSeries
DataAccessSLB_Iseries: data_access_slb_iSeries:
mtspr SPRG1,r13 /* save r13 */ mtspr SPRG1,r13 /* save r13 */
EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB) EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
std r3,PACA_EXSLB+EX_R3(r13) std r3,PACA_EXSLB+EX_R3(r13)
...@@ -595,10 +595,10 @@ DataAccessSLB_Iseries: ...@@ -595,10 +595,10 @@ DataAccessSLB_Iseries:
mfspr r3,DAR mfspr r3,DAR
b .do_slb_miss b .do_slb_miss
STD_EXCEPTION_ISERIES(0x400, InstructionAccess, PACA_EXGEN) STD_EXCEPTION_ISERIES(0x400, instruction_access, PACA_EXGEN)
.globl InstructionAccessSLB_Iseries .globl instruction_access_slb_iSeries
InstructionAccessSLB_Iseries: instruction_access_slb_iSeries:
mtspr SPRG1,r13 /* save r13 */ mtspr SPRG1,r13 /* save r13 */
EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB) EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
std r3,PACA_EXSLB+EX_R3(r13) std r3,PACA_EXSLB+EX_R3(r13)
...@@ -606,27 +606,27 @@ InstructionAccessSLB_Iseries: ...@@ -606,27 +606,27 @@ InstructionAccessSLB_Iseries:
ld r3,PACALPPACA+LPPACASRR0(r13) ld r3,PACALPPACA+LPPACASRR0(r13)
b .do_slb_miss b .do_slb_miss
MASKABLE_EXCEPTION_ISERIES(0x500, HardwareInterrupt) MASKABLE_EXCEPTION_ISERIES(0x500, hardware_interrupt)
STD_EXCEPTION_ISERIES(0x600, Alignment, PACA_EXGEN) STD_EXCEPTION_ISERIES(0x600, alignment, PACA_EXGEN)
STD_EXCEPTION_ISERIES(0x700, ProgramCheck, PACA_EXGEN) STD_EXCEPTION_ISERIES(0x700, program_check, PACA_EXGEN)
STD_EXCEPTION_ISERIES(0x800, FPUnavailable, PACA_EXGEN) STD_EXCEPTION_ISERIES(0x800, fp_unavailable, PACA_EXGEN)
MASKABLE_EXCEPTION_ISERIES(0x900, Decrementer) MASKABLE_EXCEPTION_ISERIES(0x900, decrementer)
STD_EXCEPTION_ISERIES(0xa00, Trap_0a, PACA_EXGEN) STD_EXCEPTION_ISERIES(0xa00, trap_0a, PACA_EXGEN)
STD_EXCEPTION_ISERIES(0xb00, Trap_0b, PACA_EXGEN) STD_EXCEPTION_ISERIES(0xb00, trap_0b, PACA_EXGEN)
.globl SystemCall_Iseries .globl system_call_iSeries
SystemCall_Iseries: system_call_iSeries:
mr r9,r13 mr r9,r13
mfspr r13,SPRG3 mfspr r13,SPRG3
EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_ISERIES_2
b SystemCall_common b system_call_common
STD_EXCEPTION_ISERIES( 0xd00, SingleStep, PACA_EXGEN) STD_EXCEPTION_ISERIES( 0xd00, single_step, PACA_EXGEN)
STD_EXCEPTION_ISERIES( 0xe00, Trap_0e, PACA_EXGEN) STD_EXCEPTION_ISERIES( 0xe00, trap_0e, PACA_EXGEN)
STD_EXCEPTION_ISERIES( 0xf00, PerformanceMonitor, PACA_EXGEN) STD_EXCEPTION_ISERIES( 0xf00, performance_monitor, PACA_EXGEN)
.globl SystemReset_Iseries .globl system_reset_iSeries
SystemReset_Iseries: system_reset_iSeries:
mfspr r13,SPRG3 /* Get paca address */ mfspr r13,SPRG3 /* Get paca address */
mfmsr r24 mfmsr r24
ori r24,r24,MSR_RI ori r24,r24,MSR_RI
...@@ -652,11 +652,11 @@ SystemReset_Iseries: ...@@ -652,11 +652,11 @@ SystemReset_Iseries:
subi r1,r1,STACK_FRAME_OVERHEAD subi r1,r1,STACK_FRAME_OVERHEAD
cmpwi 0,r23,0 cmpwi 0,r23,0
beq iseries_secondary_smp_loop /* Loop until told to go */ beq iSeries_secondary_smp_loop /* Loop until told to go */
#ifdef SECONDARY_PROCESSORS #ifdef SECONDARY_PROCESSORS
bne .__secondary_start /* Loop until told to go */ bne .__secondary_start /* Loop until told to go */
#endif #endif
iseries_secondary_smp_loop: iSeries_secondary_smp_loop:
/* Let the Hypervisor know we are alive */ /* Let the Hypervisor know we are alive */
/* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */ /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
lis r3,0x8002 lis r3,0x8002
...@@ -676,16 +676,16 @@ iseries_secondary_smp_loop: ...@@ -676,16 +676,16 @@ iseries_secondary_smp_loop:
b 1b /* If SMP not configured, secondaries b 1b /* If SMP not configured, secondaries
* loop forever */ * loop forever */
.globl Decrementer_Iseries_masked .globl decrementer_iSeries_masked
Decrementer_Iseries_masked: decrementer_iSeries_masked:
li r11,1 li r11,1
stb r11,PACALPPACA+LPPACADECRINT(r13) stb r11,PACALPPACA+LPPACADECRINT(r13)
lwz r12,PACADEFAULTDECR(r13) lwz r12,PACADEFAULTDECR(r13)
mtspr SPRN_DEC,r12 mtspr SPRN_DEC,r12
/* fall through */ /* fall through */
.globl HardwareInterrupt_Iseries_masked .globl hardware_interrupt_iSeries_masked
HardwareInterrupt_Iseries_masked: hardware_interrupt_iSeries_masked:
mtcrf 0x80,r9 /* Restore regs */ mtcrf 0x80,r9 /* Restore regs */
ld r11,PACALPPACA+LPPACASRR0(r13) ld r11,PACALPPACA+LPPACASRR0(r13)
ld r12,PACALPPACA+LPPACASRR1(r13) ld r12,PACALPPACA+LPPACASRR1(r13)
...@@ -711,16 +711,16 @@ fwnmi_data_area: ...@@ -711,16 +711,16 @@ fwnmi_data_area:
* Vectors for the FWNMI option. Share common code. * Vectors for the FWNMI option. Share common code.
*/ */
. = 0x8000 . = 0x8000
.globl SystemReset_FWNMI .globl system_reset_fwnmi
SystemReset_FWNMI: system_reset_fwnmi:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 /* save r13 */ mtspr SPRG1,r13 /* save r13 */
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, SystemReset_common) EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common)
.globl MachineCheck_FWNMI .globl machine_check_fwnmi
MachineCheck_FWNMI: machine_check_fwnmi:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 /* save r13 */ mtspr SPRG1,r13 /* save r13 */
EXCEPTION_PROLOG_PSERIES(PACA_EXMC, MachineCheck_common) EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
/* /*
* Space for the initial segment table * Space for the initial segment table
...@@ -738,15 +738,15 @@ __end_stab: ...@@ -738,15 +738,15 @@ __end_stab:
/*** Common interrupt handlers ***/ /*** Common interrupt handlers ***/
STD_EXCEPTION_COMMON(0x100, SystemReset, .system_reset_exception) STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
/* /*
* Machine check is different because we use a different * Machine check is different because we use a different
* save area: PACA_EXMC instead of PACA_EXGEN. * save area: PACA_EXMC instead of PACA_EXGEN.
*/ */
.align 7 .align 7
.globl MachineCheck_common .globl machine_check_common
MachineCheck_common: machine_check_common:
EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
DISABLE_INTS DISABLE_INTS
bl .save_nvgprs bl .save_nvgprs
...@@ -754,17 +754,17 @@ MachineCheck_common: ...@@ -754,17 +754,17 @@ MachineCheck_common:
bl .machine_check_exception bl .machine_check_exception
b .ret_from_except b .ret_from_except
STD_EXCEPTION_COMMON_LITE(0x900, Decrementer, .timer_interrupt) STD_EXCEPTION_COMMON_LITE(0x900, decrementer, .timer_interrupt)
STD_EXCEPTION_COMMON(0xa00, Trap_0a, .unknown_exception) STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
STD_EXCEPTION_COMMON(0xb00, Trap_0b, .unknown_exception) STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
STD_EXCEPTION_COMMON(0xd00, SingleStep, .single_step_exception) STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
STD_EXCEPTION_COMMON(0xe00, Trap_0e, .unknown_exception) STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
STD_EXCEPTION_COMMON(0xf00, PerformanceMonitor, .performance_monitor_exception) STD_EXCEPTION_COMMON(0xf00, performance_monitor, .performance_monitor_exception)
STD_EXCEPTION_COMMON(0x1300, InstructionBreakpoint, .instruction_breakpoint_exception) STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
#ifdef CONFIG_ALTIVEC #ifdef CONFIG_ALTIVEC
STD_EXCEPTION_COMMON(0x1700, AltivecAssist, .altivec_assist_exception) STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
#else #else
STD_EXCEPTION_COMMON(0x1700, AltivecAssist, .unknown_exception) STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
#endif #endif
/* /*
...@@ -854,8 +854,8 @@ unrecov_fer: ...@@ -854,8 +854,8 @@ unrecov_fer:
* r9 - r13 are saved in paca->exgen. * r9 - r13 are saved in paca->exgen.
*/ */
.align 7 .align 7
.globl DataAccess_common .globl data_access_common
DataAccess_common: data_access_common:
mfspr r10,DAR mfspr r10,DAR
std r10,PACA_EXGEN+EX_DAR(r13) std r10,PACA_EXGEN+EX_DAR(r13)
mfspr r10,DSISR mfspr r10,DSISR
...@@ -867,8 +867,8 @@ DataAccess_common: ...@@ -867,8 +867,8 @@ DataAccess_common:
b .do_hash_page /* Try to handle as hpte fault */ b .do_hash_page /* Try to handle as hpte fault */
.align 7 .align 7
.globl InstructionAccess_common .globl instruction_access_common
InstructionAccess_common: instruction_access_common:
EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
ld r3,_NIP(r1) ld r3,_NIP(r1)
andis. r4,r12,0x5820 andis. r4,r12,0x5820
...@@ -876,19 +876,19 @@ InstructionAccess_common: ...@@ -876,19 +876,19 @@ InstructionAccess_common:
b .do_hash_page /* Try to handle as hpte fault */ b .do_hash_page /* Try to handle as hpte fault */
.align 7 .align 7
.globl HardwareInterrupt_common .globl hardware_interrupt_common
.globl HardwareInterrupt_entry .globl hardware_interrupt_entry
HardwareInterrupt_common: hardware_interrupt_common:
EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN) EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN)
HardwareInterrupt_entry: hardware_interrupt_entry:
DISABLE_INTS DISABLE_INTS
addi r3,r1,STACK_FRAME_OVERHEAD addi r3,r1,STACK_FRAME_OVERHEAD
bl .do_IRQ bl .do_IRQ
b .ret_from_except_lite b .ret_from_except_lite
.align 7 .align 7
.globl Alignment_common .globl alignment_common
Alignment_common: alignment_common:
mfspr r10,DAR mfspr r10,DAR
std r10,PACA_EXGEN+EX_DAR(r13) std r10,PACA_EXGEN+EX_DAR(r13)
mfspr r10,DSISR mfspr r10,DSISR
...@@ -905,8 +905,8 @@ Alignment_common: ...@@ -905,8 +905,8 @@ Alignment_common:
b .ret_from_except b .ret_from_except
.align 7 .align 7
.globl ProgramCheck_common .globl program_check_common
ProgramCheck_common: program_check_common:
EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
bl .save_nvgprs bl .save_nvgprs
addi r3,r1,STACK_FRAME_OVERHEAD addi r3,r1,STACK_FRAME_OVERHEAD
...@@ -915,8 +915,8 @@ ProgramCheck_common: ...@@ -915,8 +915,8 @@ ProgramCheck_common:
b .ret_from_except b .ret_from_except
.align 7 .align 7
.globl FPUnavailable_common .globl fp_unavailable_common
FPUnavailable_common: fp_unavailable_common:
EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
bne .load_up_fpu /* if from user, just load it up */ bne .load_up_fpu /* if from user, just load it up */
bl .save_nvgprs bl .save_nvgprs
...@@ -926,8 +926,8 @@ FPUnavailable_common: ...@@ -926,8 +926,8 @@ FPUnavailable_common:
BUG_OPCODE BUG_OPCODE
.align 7 .align 7
.globl AltivecUnavailable_common .globl altivec_unavailable_common
AltivecUnavailable_common: altivec_unavailable_common:
EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
#ifdef CONFIG_ALTIVEC #ifdef CONFIG_ALTIVEC
bne .load_up_altivec /* if from user, just load it up */ bne .load_up_altivec /* if from user, just load it up */
...@@ -1188,7 +1188,7 @@ unrecov_slb: ...@@ -1188,7 +1188,7 @@ unrecov_slb:
* On pSeries, secondary processors spin in the following code. * On pSeries, secondary processors spin in the following code.
* At entry, r3 = this processor's number (physical cpu id) * At entry, r3 = this processor's number (physical cpu id)
*/ */
_GLOBAL(pseries_secondary_smp_init) _GLOBAL(pSeries_secondary_smp_init)
mr r24,r3 mr r24,r3
/* turn on 64-bit mode */ /* turn on 64-bit mode */
...@@ -2083,7 +2083,7 @@ __hmt_secondary_hold: ...@@ -2083,7 +2083,7 @@ __hmt_secondary_hold:
101: 101:
#endif #endif
mr r3,r24 mr r3,r24
b .pseries_secondary_smp_init b .pSeries_secondary_smp_init
#ifdef CONFIG_HMT #ifdef CONFIG_HMT
_GLOBAL(hmt_start_secondary) _GLOBAL(hmt_start_secondary)
......
arch/ppc64/kernel/pSeries_smp.c
View file @ cfd673e5
...@@ -56,7 +56,7 @@ ...@@ -56,7 +56,7 @@
#define DBG(fmt...) #define DBG(fmt...)
#endif #endif
extern void pseries_secondary_smp_init(unsigned long); extern void pSeries_secondary_smp_init(unsigned long);
/* Get state of physical CPU. /* Get state of physical CPU.
* Return codes: * Return codes:
...@@ -192,7 +192,7 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu) ...@@ -192,7 +192,7 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
{ {
int status; int status;
unsigned long start_here = __pa((u32)*((unsigned long *) unsigned long start_here = __pa((u32)*((unsigned long *)
pseries_secondary_smp_init)); pSeries_secondary_smp_init));
unsigned int pcpu; unsigned int pcpu;
/* At boot time the cpus are already spinning in hold /* At boot time the cpus are already spinning in hold
...@@ -362,7 +362,7 @@ void __init smp_init_pSeries(void) ...@@ -362,7 +362,7 @@ void __init smp_init_pSeries(void)
rtas_call(rtas_token("start-cpu"), 3, 1, &ret, rtas_call(rtas_token("start-cpu"), 3, 1, &ret,
get_hard_smp_processor_id(i), get_hard_smp_processor_id(i),
__pa((u32)*((unsigned long *) __pa((u32)*((unsigned long *)
pseries_secondary_smp_init)), pSeries_secondary_smp_init)),
i); i);
} }
} }
......
arch/ppc64/lib/sstep.c
View file @ cfd673e5
...@@ -13,7 +13,7 @@ ...@@ -13,7 +13,7 @@
#include <asm/sstep.h> #include <asm/sstep.h>
#include <asm/processor.h> #include <asm/processor.h>
extern char SystemCall_common[]; extern char system_call_common[];
/* Bits in SRR1 that are copied from MSR */ /* Bits in SRR1 that are copied from MSR */
#define MSR_MASK 0xffffffff87c0ffff #define MSR_MASK 0xffffffff87c0ffff
...@@ -76,7 +76,7 @@ int emulate_step(struct pt_regs *regs, unsigned int instr) ...@@ -76,7 +76,7 @@ int emulate_step(struct pt_regs *regs, unsigned int instr)
regs->gpr[11] = regs->nip + 4; regs->gpr[11] = regs->nip + 4;
regs->gpr[12] = regs->msr & MSR_MASK; regs->gpr[12] = regs->msr & MSR_MASK;
regs->gpr[13] = (unsigned long) get_paca(); regs->gpr[13] = (unsigned long) get_paca();
regs->nip = (unsigned long) &SystemCall_common; regs->nip = (unsigned long) &system_call_common;
regs->msr = MSR_KERNEL; regs->msr = MSR_KERNEL;
return 1; return 1;
case 18: /* b */ case 18: /* b */
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7