Commit d04ad245 authored by Prasad Kumpatla's avatar Prasad Kumpatla Committed by Mark Brown

regmap-irq: Update interrupt clear register for proper reset

With the existing logic where clear_ack is true (HW doesn’t support
auto clear for ICR), interrupt clear register reset is not handled
properly. Due to this only the first interrupts get processed properly
and further interrupts are blocked due to not resetting interrupt
clear register.

Example for issue case where Invert_ack is false and clear_ack is true:

    Say Default ISR=0x00 & ICR=0x00 and ISR is triggered with 2
    interrupts making ISR = 0x11.

    Step 1: Say ISR is set 0x11 (store status_buff = ISR). ISR needs to
            be cleared with the help of ICR once the Interrupt is processed.

    Step 2: Write ICR = 0x11 (status_buff), this will clear the ISR to 0x00.

    Step 3: Issue - In the existing code, ICR is written with ICR =
            ~(status_buff) i.e ICR = 0xEE -> This will block all the interrupts
            from raising except for interrupts 0 and 4. So expectation here is to
            reset ICR, which will unblock all the interrupts.

            if (chip->clear_ack) {
                 if (chip->ack_invert && !ret)
                  ........
                 else if (!ret)
                     ret = regmap_write(map, reg,
                            ~data->status_buf[i]);

So writing 0 and 0xff (when ack_invert is true) should have no effect, other
than clearing the ACKs just set.

Fixes: 3a6f0fb7 ("regmap: irq: Add support to clear ack registers")
Signed-off-by: default avatarPrasad Kumpatla <quic_pkumpatl@quicinc.com>
Reviewed-by: default avatarCharles Keepax <ckeepax@opensource.cirrus.com>
Tested-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20220217085007.30218-1-quic_pkumpatl@quicinc.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent b56a7cbf
...@@ -189,11 +189,9 @@ static void regmap_irq_sync_unlock(struct irq_data *data) ...@@ -189,11 +189,9 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
ret = regmap_write(map, reg, d->mask_buf[i]); ret = regmap_write(map, reg, d->mask_buf[i]);
if (d->chip->clear_ack) { if (d->chip->clear_ack) {
if (d->chip->ack_invert && !ret) if (d->chip->ack_invert && !ret)
ret = regmap_write(map, reg, ret = regmap_write(map, reg, UINT_MAX);
d->mask_buf[i]);
else if (!ret) else if (!ret)
ret = regmap_write(map, reg, ret = regmap_write(map, reg, 0);
~d->mask_buf[i]);
} }
if (ret != 0) if (ret != 0)
dev_err(d->map->dev, "Failed to ack 0x%x: %d\n", dev_err(d->map->dev, "Failed to ack 0x%x: %d\n",
...@@ -556,11 +554,9 @@ static irqreturn_t regmap_irq_thread(int irq, void *d) ...@@ -556,11 +554,9 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
data->status_buf[i]); data->status_buf[i]);
if (chip->clear_ack) { if (chip->clear_ack) {
if (chip->ack_invert && !ret) if (chip->ack_invert && !ret)
ret = regmap_write(map, reg, ret = regmap_write(map, reg, UINT_MAX);
data->status_buf[i]);
else if (!ret) else if (!ret)
ret = regmap_write(map, reg, ret = regmap_write(map, reg, 0);
~data->status_buf[i]);
} }
if (ret != 0) if (ret != 0)
dev_err(map->dev, "Failed to ack 0x%x: %d\n", dev_err(map->dev, "Failed to ack 0x%x: %d\n",
...@@ -817,13 +813,9 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, ...@@ -817,13 +813,9 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
d->status_buf[i] & d->mask_buf[i]); d->status_buf[i] & d->mask_buf[i]);
if (chip->clear_ack) { if (chip->clear_ack) {
if (chip->ack_invert && !ret) if (chip->ack_invert && !ret)
ret = regmap_write(map, reg, ret = regmap_write(map, reg, UINT_MAX);
(d->status_buf[i] &
d->mask_buf[i]));
else if (!ret) else if (!ret)
ret = regmap_write(map, reg, ret = regmap_write(map, reg, 0);
~(d->status_buf[i] &
d->mask_buf[i]));
} }
if (ret != 0) { if (ret != 0) {
dev_err(map->dev, "Failed to ack 0x%x: %d\n", dev_err(map->dev, "Failed to ack 0x%x: %d\n",
......
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