Commit d08ea419 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Mark Brown

ASoC: dt-bindings: qcom,lpass-wsa-macro: correct clocks on SM8250

we seems to have ended up with duplicate clocks for frame-sync on sm8250,
it has both va and fsgen which are exactly same things. Remove the redundant
va clock and make it align with other SoCs.

Codec driver does not even handle va clock, so remove this from the
bindings and examples to avoid any confusion.
Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20240815165320.18836-1-srinivas.kandagatla@linaro.orgSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 0a917354
...@@ -64,6 +64,7 @@ allOf: ...@@ -64,6 +64,7 @@ allOf:
compatible: compatible:
enum: enum:
- qcom,sc7280-lpass-wsa-macro - qcom,sc7280-lpass-wsa-macro
- qcom,sm8250-lpass-wsa-macro
- qcom,sm8450-lpass-wsa-macro - qcom,sm8450-lpass-wsa-macro
- qcom,sc8280xp-lpass-wsa-macro - qcom,sc8280xp-lpass-wsa-macro
then: then:
...@@ -79,24 +80,6 @@ allOf: ...@@ -79,24 +80,6 @@ allOf:
- const: dcodec - const: dcodec
- const: fsgen - const: fsgen
- if:
properties:
compatible:
enum:
- qcom,sm8250-lpass-wsa-macro
then:
properties:
clocks:
minItems: 6
clock-names:
items:
- const: mclk
- const: npl
- const: macro
- const: dcodec
- const: va
- const: fsgen
- if: - if:
properties: properties:
compatible: compatible:
...@@ -130,8 +113,7 @@ examples: ...@@ -130,8 +113,7 @@ examples:
<&audiocc 0>, <&audiocc 0>,
<&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&aoncc LPASS_CDC_VA_MCLK>,
<&vamacro>; <&vamacro>;
clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen"; clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
clock-output-names = "mclk"; clock-output-names = "mclk";
}; };
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