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Kirill Smelkov
linux
Commits
d0b8a5c0
Commit
d0b8a5c0
authored
Jun 23, 2003
by
Greg Kroah-Hartman
Browse files
Options
Browse Files
Download
Plain Diff
Merge kroah.com:/home/greg/linux/BK/bleed-2.5
into kroah.com:/home/greg/linux/BK/pci-2.5
parents
cb84e0b3
df0aaa91
Changes
13
Show whitespace changes
Inline
Side-by-side
Showing
13 changed files
with
81 additions
and
92 deletions
+81
-92
arch/i386/pci/Makefile
arch/i386/pci/Makefile
+7
-21
arch/i386/pci/common.c
arch/i386/pci/common.c
+2
-4
arch/i386/pci/direct.c
arch/i386/pci/direct.c
+27
-21
arch/i386/pci/numa.c
arch/i386/pci/numa.c
+8
-8
arch/i386/pci/pcbios.c
arch/i386/pci/pcbios.c
+6
-6
arch/ia64/pci/pci.c
arch/ia64/pci/pci.c
+10
-10
drivers/acpi/osl.c
drivers/acpi/osl.c
+4
-2
drivers/pci/Makefile
drivers/pci/Makefile
+3
-2
drivers/pci/hotplug.c
drivers/pci/hotplug.c
+0
-13
drivers/pci/hotplug/cpqphp_pci.c
drivers/pci/hotplug/cpqphp_pci.c
+2
-2
drivers/pci/pci-driver.c
drivers/pci/pci-driver.c
+8
-0
include/asm-alpha/pci.h
include/asm-alpha/pci.h
+2
-1
include/linux/pci.h
include/linux/pci.h
+2
-2
No files found.
arch/i386/pci/Makefile
View file @
d0b8a5c0
...
@@ -3,25 +3,11 @@ obj-y := i386.o
...
@@ -3,25 +3,11 @@ obj-y := i386.o
obj-$(CONFIG_PCI_BIOS)
+=
pcbios.o
obj-$(CONFIG_PCI_BIOS)
+=
pcbios.o
obj-$(CONFIG_PCI_DIRECT)
+=
direct.o
obj-$(CONFIG_PCI_DIRECT)
+=
direct.o
obj-$(CONFIG_X86_VISWS)
+=
visws.o
pci-y
:=
fixup.o
pci-$(CONFIG_ACPI_PCI)
+=
acpi.o
pci-y
+=
legacy.o irq.o
ifdef
CONFIG_X86_NUMAQ
pci-$(CONFIG_X86_VISWS)
:=
visws.o fixup.o
obj-y
+=
numa.o
pci-$(CONFIG_X86_NUMAQ)
:=
numa.o irq.o
else
obj-y
+=
fixup.o
ifdef
CONFIG_ACPI_PCI
obj-y
+=
$
(
pci-y
)
common.o
obj-y
+=
acpi.o
endif
ifndef
CONFIG_X86_VISWS
obj-y
+=
legacy.o
endif
endif
# CONFIG_X86_NUMAQ
ifndef
CONFIG_X86_VISWS
obj-y
+=
irq.o
endif
obj-y
+=
common.o
arch/i386/pci/common.c
View file @
d0b8a5c0
...
@@ -27,14 +27,12 @@ struct pci_raw_ops *raw_pci_ops;
...
@@ -27,14 +27,12 @@ struct pci_raw_ops *raw_pci_ops;
static
int
pci_read
(
struct
pci_bus
*
bus
,
unsigned
int
devfn
,
int
where
,
int
size
,
u32
*
value
)
static
int
pci_read
(
struct
pci_bus
*
bus
,
unsigned
int
devfn
,
int
where
,
int
size
,
u32
*
value
)
{
{
return
raw_pci_ops
->
read
(
0
,
bus
->
number
,
PCI_SLOT
(
devfn
),
return
raw_pci_ops
->
read
(
0
,
bus
->
number
,
devfn
,
where
,
size
,
value
);
PCI_FUNC
(
devfn
),
where
,
size
,
value
);
}
}
static
int
pci_write
(
struct
pci_bus
*
bus
,
unsigned
int
devfn
,
int
where
,
int
size
,
u32
value
)
static
int
pci_write
(
struct
pci_bus
*
bus
,
unsigned
int
devfn
,
int
where
,
int
size
,
u32
value
)
{
{
return
raw_pci_ops
->
write
(
0
,
bus
->
number
,
PCI_SLOT
(
devfn
),
return
raw_pci_ops
->
write
(
0
,
bus
->
number
,
devfn
,
where
,
size
,
value
);
PCI_FUNC
(
devfn
),
where
,
size
,
value
);
}
}
struct
pci_ops
pci_root_ops
=
{
struct
pci_ops
pci_root_ops
=
{
...
...
arch/i386/pci/direct.c
View file @
d0b8a5c0
...
@@ -10,19 +10,19 @@
...
@@ -10,19 +10,19 @@
* Functions for accessing PCI configuration space with type 1 accesses
* Functions for accessing PCI configuration space with type 1 accesses
*/
*/
#define PCI_CONF1_ADDRESS(bus, dev
,
fn, reg) \
#define PCI_CONF1_ADDRESS(bus, devfn, reg) \
(0x80000000 | (bus << 16) | (dev
<< 11) | (
fn << 8) | (reg & ~3))
(0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3))
static
int
pci_conf1_read
(
int
seg
,
int
bus
,
int
dev
,
int
fn
,
int
reg
,
int
len
,
u32
*
value
)
static
int
pci_conf1_read
(
int
seg
,
int
bus
,
int
devfn
,
int
reg
,
int
len
,
u32
*
value
)
{
{
unsigned
long
flags
;
unsigned
long
flags
;
if
(
!
value
||
(
bus
>
255
)
||
(
dev
>
31
)
||
(
fn
>
7
)
||
(
reg
>
255
))
if
(
!
value
||
(
bus
>
255
)
||
(
dev
fn
>
255
)
||
(
reg
>
255
))
return
-
EINVAL
;
return
-
EINVAL
;
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
outl
(
PCI_CONF1_ADDRESS
(
bus
,
dev
,
fn
,
reg
),
0xCF8
);
outl
(
PCI_CONF1_ADDRESS
(
bus
,
devfn
,
reg
),
0xCF8
);
switch
(
len
)
{
switch
(
len
)
{
case
1
:
case
1
:
...
@@ -41,16 +41,16 @@ static int pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len,
...
@@ -41,16 +41,16 @@ static int pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len,
return
0
;
return
0
;
}
}
static
int
pci_conf1_write
(
int
seg
,
int
bus
,
int
dev
,
int
fn
,
int
reg
,
int
len
,
u32
value
)
static
int
pci_conf1_write
(
int
seg
,
int
bus
,
int
devfn
,
int
reg
,
int
len
,
u32
value
)
{
{
unsigned
long
flags
;
unsigned
long
flags
;
if
((
bus
>
255
)
||
(
dev
>
31
)
||
(
fn
>
7
)
||
(
reg
>
255
))
if
((
bus
>
255
)
||
(
dev
fn
>
255
)
||
(
reg
>
255
))
return
-
EINVAL
;
return
-
EINVAL
;
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
outl
(
PCI_CONF1_ADDRESS
(
bus
,
dev
,
fn
,
reg
),
0xCF8
);
outl
(
PCI_CONF1_ADDRESS
(
bus
,
devfn
,
reg
),
0xCF8
);
switch
(
len
)
{
switch
(
len
)
{
case
1
:
case
1
:
...
@@ -83,13 +83,17 @@ struct pci_raw_ops pci_direct_conf1 = {
...
@@ -83,13 +83,17 @@ struct pci_raw_ops pci_direct_conf1 = {
#define PCI_CONF2_ADDRESS(dev, reg) (u16)(0xC000 | (dev << 8) | reg)
#define PCI_CONF2_ADDRESS(dev, reg) (u16)(0xC000 | (dev << 8) | reg)
static
int
pci_conf2_read
(
int
seg
,
int
bus
,
int
dev
,
int
fn
,
int
reg
,
int
len
,
u32
*
value
)
static
int
pci_conf2_read
(
int
seg
,
int
bus
,
int
dev
fn
,
int
reg
,
int
len
,
u32
*
value
)
{
{
unsigned
long
flags
;
unsigned
long
flags
;
int
dev
,
fn
;
if
(
!
value
||
(
bus
>
255
)
||
(
dev
>
31
)
||
(
fn
>
7
)
||
(
reg
>
255
))
if
(
!
value
||
(
bus
>
255
)
||
(
dev
fn
>
255
)
||
(
reg
>
255
))
return
-
EINVAL
;
return
-
EINVAL
;
dev
=
PCI_SLOT
(
devfn
);
fn
=
PCI_FUNC
(
devfn
);
if
(
dev
&
0x10
)
if
(
dev
&
0x10
)
return
PCIBIOS_DEVICE_NOT_FOUND
;
return
PCIBIOS_DEVICE_NOT_FOUND
;
...
@@ -110,20 +114,24 @@ static int pci_conf2_read (int seg, int bus, int dev, int fn, int reg, int len,
...
@@ -110,20 +114,24 @@ static int pci_conf2_read (int seg, int bus, int dev, int fn, int reg, int len,
break
;
break
;
}
}
outb
(
0
,
0xCF8
);
outb
(
0
,
0xCF8
);
spin_unlock_irqrestore
(
&
pci_config_lock
,
flags
);
spin_unlock_irqrestore
(
&
pci_config_lock
,
flags
);
return
0
;
return
0
;
}
}
static
int
pci_conf2_write
(
int
seg
,
int
bus
,
int
dev
,
int
fn
,
int
reg
,
int
len
,
u32
value
)
static
int
pci_conf2_write
(
int
seg
,
int
bus
,
int
devfn
,
int
reg
,
int
len
,
u32
value
)
{
{
unsigned
long
flags
;
unsigned
long
flags
;
int
dev
,
fn
;
if
((
bus
>
255
)
||
(
dev
>
31
)
||
(
fn
>
7
)
||
(
reg
>
255
))
if
((
bus
>
255
)
||
(
dev
fn
>
255
)
||
(
reg
>
255
))
return
-
EINVAL
;
return
-
EINVAL
;
dev
=
PCI_SLOT
(
devfn
);
fn
=
PCI_FUNC
(
devfn
);
if
(
dev
&
0x10
)
if
(
dev
&
0x10
)
return
PCIBIOS_DEVICE_NOT_FOUND
;
return
PCIBIOS_DEVICE_NOT_FOUND
;
...
@@ -134,17 +142,17 @@ static int pci_conf2_write (int seg, int bus, int dev, int fn, int reg, int len,
...
@@ -134,17 +142,17 @@ static int pci_conf2_write (int seg, int bus, int dev, int fn, int reg, int len,
switch
(
len
)
{
switch
(
len
)
{
case
1
:
case
1
:
outb
((
u8
)
value
,
PCI_CONF2_ADDRESS
(
dev
,
reg
));
outb
((
u8
)
value
,
PCI_CONF2_ADDRESS
(
dev
,
reg
));
break
;
break
;
case
2
:
case
2
:
outw
((
u16
)
value
,
PCI_CONF2_ADDRESS
(
dev
,
reg
));
outw
((
u16
)
value
,
PCI_CONF2_ADDRESS
(
dev
,
reg
));
break
;
break
;
case
4
:
case
4
:
outl
((
u32
)
value
,
PCI_CONF2_ADDRESS
(
dev
,
reg
));
outl
((
u32
)
value
,
PCI_CONF2_ADDRESS
(
dev
,
reg
));
break
;
break
;
}
}
outb
(
0
,
0xCF8
);
outb
(
0
,
0xCF8
);
spin_unlock_irqrestore
(
&
pci_config_lock
,
flags
);
spin_unlock_irqrestore
(
&
pci_config_lock
,
flags
);
...
@@ -178,14 +186,12 @@ static int __devinit pci_sanity_check(struct pci_raw_ops *o)
...
@@ -178,14 +186,12 @@ static int __devinit pci_sanity_check(struct pci_raw_ops *o)
return
1
;
return
1
;
for
(
devfn
=
0
;
devfn
<
0x100
;
devfn
++
)
{
for
(
devfn
=
0
;
devfn
<
0x100
;
devfn
++
)
{
if
(
o
->
read
(
0
,
0
,
PCI_SLOT
(
devfn
),
PCI_FUNC
(
devfn
),
if
(
o
->
read
(
0
,
0
,
devfn
,
PCI_CLASS_DEVICE
,
2
,
&
x
))
PCI_CLASS_DEVICE
,
2
,
&
x
))
continue
;
continue
;
if
(
x
==
PCI_CLASS_BRIDGE_HOST
||
x
==
PCI_CLASS_DISPLAY_VGA
)
if
(
x
==
PCI_CLASS_BRIDGE_HOST
||
x
==
PCI_CLASS_DISPLAY_VGA
)
return
1
;
return
1
;
if
(
o
->
read
(
0
,
0
,
PCI_SLOT
(
devfn
),
PCI_FUNC
(
devfn
),
if
(
o
->
read
(
0
,
0
,
devfn
,
PCI_VENDOR_ID
,
2
,
&
x
))
PCI_VENDOR_ID
,
2
,
&
x
))
continue
;
continue
;
if
(
x
==
PCI_VENDOR_ID_INTEL
||
x
==
PCI_VENDOR_ID_COMPAQ
)
if
(
x
==
PCI_VENDOR_ID_INTEL
||
x
==
PCI_VENDOR_ID_COMPAQ
)
return
1
;
return
1
;
...
...
arch/i386/pci/numa.c
View file @
d0b8a5c0
...
@@ -10,19 +10,19 @@
...
@@ -10,19 +10,19 @@
#define BUS2LOCAL(global) (mp_bus_id_to_local[global])
#define BUS2LOCAL(global) (mp_bus_id_to_local[global])
#define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local])
#define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local])
#define PCI_CONF1_MQ_ADDRESS(bus, dev
,
fn, reg) \
#define PCI_CONF1_MQ_ADDRESS(bus, devfn, reg) \
(0x80000000 | (BUS2LOCAL(bus) << 16) | (dev
<< 11) | (
fn << 8) | (reg & ~3))
(0x80000000 | (BUS2LOCAL(bus) << 16) | (devfn << 8) | (reg & ~3))
static
int
pci_conf1_mq_read
(
int
seg
,
int
bus
,
int
dev
,
int
fn
,
int
reg
,
int
len
,
u32
*
value
)
static
int
pci_conf1_mq_read
(
int
seg
,
int
bus
,
int
devfn
,
int
reg
,
int
len
,
u32
*
value
)
{
{
unsigned
long
flags
;
unsigned
long
flags
;
if
(
!
value
||
(
bus
>
MAX_MP_BUSSES
)
||
(
dev
>
31
)
||
(
fn
>
7
)
||
(
reg
>
255
))
if
(
!
value
||
(
bus
>
MAX_MP_BUSSES
)
||
(
dev
fn
>
255
)
||
(
reg
>
255
))
return
-
EINVAL
;
return
-
EINVAL
;
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
outl_quad
(
PCI_CONF1_MQ_ADDRESS
(
bus
,
dev
,
fn
,
reg
),
0xCF8
,
BUS2QUAD
(
bus
));
outl_quad
(
PCI_CONF1_MQ_ADDRESS
(
bus
,
devfn
,
reg
),
0xCF8
,
BUS2QUAD
(
bus
));
switch
(
len
)
{
switch
(
len
)
{
case
1
:
case
1
:
...
@@ -41,16 +41,16 @@ static int pci_conf1_mq_read (int seg, int bus, int dev, int fn, int reg, int le
...
@@ -41,16 +41,16 @@ static int pci_conf1_mq_read (int seg, int bus, int dev, int fn, int reg, int le
return
0
;
return
0
;
}
}
static
int
pci_conf1_mq_write
(
int
seg
,
int
bus
,
int
dev
,
int
fn
,
int
reg
,
int
len
,
u32
value
)
static
int
pci_conf1_mq_write
(
int
seg
,
int
bus
,
int
devfn
,
int
reg
,
int
len
,
u32
value
)
{
{
unsigned
long
flags
;
unsigned
long
flags
;
if
((
bus
>
MAX_MP_BUSSES
)
||
(
dev
>
31
)
||
(
fn
>
7
)
||
(
reg
>
255
))
if
((
bus
>
MAX_MP_BUSSES
)
||
(
dev
fn
>
255
)
||
(
reg
>
255
))
return
-
EINVAL
;
return
-
EINVAL
;
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
outl_quad
(
PCI_CONF1_MQ_ADDRESS
(
bus
,
dev
,
fn
,
reg
),
0xCF8
,
BUS2QUAD
(
bus
));
outl_quad
(
PCI_CONF1_MQ_ADDRESS
(
bus
,
devfn
,
reg
),
0xCF8
,
BUS2QUAD
(
bus
));
switch
(
len
)
{
switch
(
len
)
{
case
1
:
case
1
:
...
...
arch/i386/pci/pcbios.c
View file @
d0b8a5c0
...
@@ -172,13 +172,13 @@ static int __devinit pci_bios_find_device (unsigned short vendor, unsigned short
...
@@ -172,13 +172,13 @@ static int __devinit pci_bios_find_device (unsigned short vendor, unsigned short
return
(
int
)
(
ret
&
0xff00
)
>>
8
;
return
(
int
)
(
ret
&
0xff00
)
>>
8
;
}
}
static
int
pci_bios_read
(
int
seg
,
int
bus
,
int
dev
,
int
fn
,
int
reg
,
int
len
,
u32
*
value
)
static
int
pci_bios_read
(
int
seg
,
int
bus
,
int
devfn
,
int
reg
,
int
len
,
u32
*
value
)
{
{
unsigned
long
result
=
0
;
unsigned
long
result
=
0
;
unsigned
long
flags
;
unsigned
long
flags
;
unsigned
long
bx
=
(
(
bus
<<
8
)
|
(
dev
<<
3
)
|
fn
)
;
unsigned
long
bx
=
(
bus
<<
8
)
|
devfn
;
if
(
!
value
||
(
bus
>
255
)
||
(
dev
>
31
)
||
(
fn
>
7
)
||
(
reg
>
255
))
if
(
!
value
||
(
bus
>
255
)
||
(
dev
fn
>
255
)
||
(
reg
>
255
))
return
-
EINVAL
;
return
-
EINVAL
;
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
...
@@ -227,13 +227,13 @@ static int pci_bios_read (int seg, int bus, int dev, int fn, int reg, int len, u
...
@@ -227,13 +227,13 @@ static int pci_bios_read (int seg, int bus, int dev, int fn, int reg, int len, u
return
(
int
)((
result
&
0xff00
)
>>
8
);
return
(
int
)((
result
&
0xff00
)
>>
8
);
}
}
static
int
pci_bios_write
(
int
seg
,
int
bus
,
int
dev
,
int
fn
,
int
reg
,
int
len
,
u32
value
)
static
int
pci_bios_write
(
int
seg
,
int
bus
,
int
devfn
,
int
reg
,
int
len
,
u32
value
)
{
{
unsigned
long
result
=
0
;
unsigned
long
result
=
0
;
unsigned
long
flags
;
unsigned
long
flags
;
unsigned
long
bx
=
(
(
bus
<<
8
)
|
(
dev
<<
3
)
|
fn
)
;
unsigned
long
bx
=
(
bus
<<
8
)
|
devfn
;
if
((
bus
>
255
)
||
(
dev
>
31
)
||
(
fn
>
7
)
||
(
reg
>
255
))
if
((
bus
>
255
)
||
(
dev
fn
>
255
)
||
(
reg
>
255
))
return
-
EINVAL
;
return
-
EINVAL
;
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
spin_lock_irqsave
(
&
pci_config_lock
,
flags
);
...
...
arch/ia64/pci/pci.c
View file @
d0b8a5c0
...
@@ -53,21 +53,21 @@ struct pci_fixup pcibios_fixups[1];
...
@@ -53,21 +53,21 @@ struct pci_fixup pcibios_fixups[1];
* synchronization mechanism here.
* synchronization mechanism here.
*/
*/
#define PCI_SAL_ADDRESS(seg, bus, dev
,
fn, reg) \
#define PCI_SAL_ADDRESS(seg, bus, devfn, reg) \
((u64)(seg << 24) | (u64)(bus << 16) | \
((u64)(seg << 24) | (u64)(bus << 16) | \
(u64)(dev
<< 11) | (u64)(
fn << 8) | (u64)(reg))
(u64)(devfn << 8) | (u64)(reg))
static
int
static
int
pci_sal_read
(
int
seg
,
int
bus
,
int
dev
,
int
fn
,
int
reg
,
int
len
,
u32
*
value
)
pci_sal_read
(
int
seg
,
int
bus
,
int
devfn
,
int
reg
,
int
len
,
u32
*
value
)
{
{
int
result
=
0
;
int
result
=
0
;
u64
data
=
0
;
u64
data
=
0
;
if
(
!
value
||
(
seg
>
255
)
||
(
bus
>
255
)
||
(
dev
>
31
)
||
(
fn
>
7
)
||
(
reg
>
255
))
if
(
!
value
||
(
seg
>
255
)
||
(
bus
>
255
)
||
(
dev
fn
>
255
)
||
(
reg
>
255
))
return
-
EINVAL
;
return
-
EINVAL
;
result
=
ia64_sal_pci_config_read
(
PCI_SAL_ADDRESS
(
seg
,
bus
,
dev
,
fn
,
reg
),
len
,
&
data
);
result
=
ia64_sal_pci_config_read
(
PCI_SAL_ADDRESS
(
seg
,
bus
,
devfn
,
reg
),
len
,
&
data
);
*
value
=
(
u32
)
data
;
*
value
=
(
u32
)
data
;
...
@@ -75,12 +75,12 @@ pci_sal_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value)
...
@@ -75,12 +75,12 @@ pci_sal_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value)
}
}
static
int
static
int
pci_sal_write
(
int
seg
,
int
bus
,
int
dev
,
int
fn
,
int
reg
,
int
len
,
u32
value
)
pci_sal_write
(
int
seg
,
int
bus
,
int
devfn
,
int
reg
,
int
len
,
u32
value
)
{
{
if
((
seg
>
255
)
||
(
bus
>
255
)
||
(
dev
>
31
)
||
(
fn
>
7
)
||
(
reg
>
255
))
if
((
seg
>
255
)
||
(
bus
>
255
)
||
(
dev
fn
>
255
)
||
(
reg
>
255
))
return
-
EINVAL
;
return
-
EINVAL
;
return
ia64_sal_pci_config_write
(
PCI_SAL_ADDRESS
(
seg
,
bus
,
dev
,
fn
,
reg
),
len
,
value
);
return
ia64_sal_pci_config_write
(
PCI_SAL_ADDRESS
(
seg
,
bus
,
devfn
,
reg
),
len
,
value
);
}
}
struct
pci_raw_ops
pci_sal_ops
=
{
struct
pci_raw_ops
pci_sal_ops
=
{
...
@@ -95,14 +95,14 @@ static int
...
@@ -95,14 +95,14 @@ static int
pci_read
(
struct
pci_bus
*
bus
,
unsigned
int
devfn
,
int
where
,
int
size
,
u32
*
value
)
pci_read
(
struct
pci_bus
*
bus
,
unsigned
int
devfn
,
int
where
,
int
size
,
u32
*
value
)
{
{
return
raw_pci_ops
->
read
(
pci_domain_nr
(
bus
),
bus
->
number
,
return
raw_pci_ops
->
read
(
pci_domain_nr
(
bus
),
bus
->
number
,
PCI_SLOT
(
devfn
),
PCI_FUNC
(
devfn
)
,
where
,
size
,
value
);
devfn
,
where
,
size
,
value
);
}
}
static
int
static
int
pci_write
(
struct
pci_bus
*
bus
,
unsigned
int
devfn
,
int
where
,
int
size
,
u32
value
)
pci_write
(
struct
pci_bus
*
bus
,
unsigned
int
devfn
,
int
where
,
int
size
,
u32
value
)
{
{
return
raw_pci_ops
->
write
(
pci_domain_nr
(
bus
),
bus
->
number
,
return
raw_pci_ops
->
write
(
pci_domain_nr
(
bus
),
bus
->
number
,
PCI_SLOT
(
devfn
),
PCI_FUNC
(
devfn
)
,
where
,
size
,
value
);
devfn
,
where
,
size
,
value
);
}
}
static
struct
pci_ops
pci_root_ops
=
{
static
struct
pci_ops
pci_root_ops
=
{
...
...
drivers/acpi/osl.c
View file @
d0b8a5c0
...
@@ -466,7 +466,8 @@ acpi_os_read_pci_configuration (struct acpi_pci_id *pci_id, u32 reg, void *value
...
@@ -466,7 +466,8 @@ acpi_os_read_pci_configuration (struct acpi_pci_id *pci_id, u32 reg, void *value
}
}
result
=
raw_pci_ops
->
read
(
pci_id
->
segment
,
pci_id
->
bus
,
result
=
raw_pci_ops
->
read
(
pci_id
->
segment
,
pci_id
->
bus
,
pci_id
->
device
,
pci_id
->
function
,
reg
,
size
,
value
);
PCI_DEVFN
(
pci_id
->
device
,
pci_id
->
function
),
reg
,
size
,
value
);
return
(
result
?
AE_ERROR
:
AE_OK
);
return
(
result
?
AE_ERROR
:
AE_OK
);
}
}
...
@@ -491,7 +492,8 @@ acpi_os_write_pci_configuration (struct acpi_pci_id *pci_id, u32 reg, acpi_integ
...
@@ -491,7 +492,8 @@ acpi_os_write_pci_configuration (struct acpi_pci_id *pci_id, u32 reg, acpi_integ
}
}
result
=
raw_pci_ops
->
write
(
pci_id
->
segment
,
pci_id
->
bus
,
result
=
raw_pci_ops
->
write
(
pci_id
->
segment
,
pci_id
->
bus
,
pci_id
->
device
,
pci_id
->
function
,
reg
,
size
,
value
);
PCI_DEVFN
(
pci_id
->
device
,
pci_id
->
function
),
reg
,
size
,
value
);
return
(
result
?
AE_ERROR
:
AE_OK
);
return
(
result
?
AE_ERROR
:
AE_OK
);
}
}
...
...
drivers/pci/Makefile
View file @
d0b8a5c0
...
@@ -3,8 +3,7 @@
...
@@ -3,8 +3,7 @@
#
#
obj-y
+=
access.o bus.o probe.o pci.o pool.o quirks.o
\
obj-y
+=
access.o bus.o probe.o pci.o pool.o quirks.o
\
names.o pci-driver.o search.o hotplug.o
\
names.o pci-driver.o search.o pci-sysfs.o
pci-sysfs.o
obj-$(CONFIG_PM)
+=
power.o
obj-$(CONFIG_PM)
+=
power.o
obj-$(CONFIG_PROC_FS)
+=
proc.o
obj-$(CONFIG_PROC_FS)
+=
proc.o
...
@@ -12,6 +11,8 @@ ifndef CONFIG_SPARC64
...
@@ -12,6 +11,8 @@ ifndef CONFIG_SPARC64
obj-$(CONFIG_PCI)
+=
setup-res.o
obj-$(CONFIG_PCI)
+=
setup-res.o
endif
endif
obj-$(CONFIG_HOTPLUG)
+=
hotplug.o
# Build the PCI Hotplug drivers if we were asked to
# Build the PCI Hotplug drivers if we were asked to
obj-$(CONFIG_HOTPLUG_PCI)
+=
hotplug/
obj-$(CONFIG_HOTPLUG_PCI)
+=
hotplug/
...
...
drivers/pci/hotplug.c
View file @
d0b8a5c0
...
@@ -12,7 +12,6 @@
...
@@ -12,7 +12,6 @@
static
void
pci_free_resources
(
struct
pci_dev
*
dev
);
static
void
pci_free_resources
(
struct
pci_dev
*
dev
);
#ifdef CONFIG_HOTPLUG
int
pci_hotplug
(
struct
device
*
dev
,
char
**
envp
,
int
num_envp
,
int
pci_hotplug
(
struct
device
*
dev
,
char
**
envp
,
int
num_envp
,
char
*
buffer
,
int
buffer_size
)
char
*
buffer
,
int
buffer_size
)
{
{
...
@@ -209,16 +208,6 @@ int pci_remove_device_safe(struct pci_dev *dev)
...
@@ -209,16 +208,6 @@ int pci_remove_device_safe(struct pci_dev *dev)
}
}
EXPORT_SYMBOL
(
pci_remove_device_safe
);
EXPORT_SYMBOL
(
pci_remove_device_safe
);
#else
/* CONFIG_HOTPLUG */
int
pci_hotplug
(
struct
device
*
dev
,
char
**
envp
,
int
num_envp
,
char
*
buffer
,
int
buffer_size
)
{
return
-
ENODEV
;
}
#endif
/* CONFIG_HOTPLUG */
static
void
static
void
pci_free_resources
(
struct
pci_dev
*
dev
)
pci_free_resources
(
struct
pci_dev
*
dev
)
{
{
...
@@ -283,7 +272,5 @@ void pci_remove_behind_bridge(struct pci_dev *dev)
...
@@ -283,7 +272,5 @@ void pci_remove_behind_bridge(struct pci_dev *dev)
}
}
}
}
#ifdef CONFIG_HOTPLUG
EXPORT_SYMBOL
(
pci_remove_bus_device
);
EXPORT_SYMBOL
(
pci_remove_bus_device
);
EXPORT_SYMBOL
(
pci_remove_behind_bridge
);
EXPORT_SYMBOL
(
pci_remove_behind_bridge
);
#endif
drivers/pci/hotplug/cpqphp_pci.c
View file @
d0b8a5c0
...
@@ -198,7 +198,7 @@ static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev
...
@@ -198,7 +198,7 @@ static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev
ctrl
->
pci_bus
->
number
=
bus_num
;
ctrl
->
pci_bus
->
number
=
bus_num
;
for
(
tdevice
=
0
;
tdevice
<
0x
100
;
tdevice
++
)
{
for
(
tdevice
=
0
;
tdevice
<
0x
FF
;
tdevice
++
)
{
//Scan for access first
//Scan for access first
if
(
PCI_RefinedAccessConfig
(
ctrl
->
pci_bus
,
tdevice
,
0x08
,
&
work
)
==
-
1
)
if
(
PCI_RefinedAccessConfig
(
ctrl
->
pci_bus
,
tdevice
,
0x08
,
&
work
)
==
-
1
)
continue
;
continue
;
...
@@ -210,7 +210,7 @@ static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev
...
@@ -210,7 +210,7 @@ static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev
return
0
;
return
0
;
}
}
}
}
for
(
tdevice
=
0
;
tdevice
<
0x
100
;
tdevice
++
)
{
for
(
tdevice
=
0
;
tdevice
<
0x
FF
;
tdevice
++
)
{
//Scan for access first
//Scan for access first
if
(
PCI_RefinedAccessConfig
(
ctrl
->
pci_bus
,
tdevice
,
0x08
,
&
work
)
==
-
1
)
if
(
PCI_RefinedAccessConfig
(
ctrl
->
pci_bus
,
tdevice
,
0x08
,
&
work
)
==
-
1
)
continue
;
continue
;
...
...
drivers/pci/pci-driver.c
View file @
d0b8a5c0
...
@@ -486,6 +486,14 @@ void pci_dev_put(struct pci_dev *dev)
...
@@ -486,6 +486,14 @@ void pci_dev_put(struct pci_dev *dev)
put_device
(
&
dev
->
dev
);
put_device
(
&
dev
->
dev
);
}
}
#ifndef CONFIG_HOTPLUG
int
pci_hotplug
(
struct
device
*
dev
,
char
**
envp
,
int
num_envp
,
char
*
buffer
,
int
buffer_size
)
{
return
-
ENODEV
;
}
#endif
struct
bus_type
pci_bus_type
=
{
struct
bus_type
pci_bus_type
=
{
.
name
=
"pci"
,
.
name
=
"pci"
,
.
match
=
pci_bus_match
,
.
match
=
pci_bus_match
,
...
...
include/asm-alpha/pci.h
View file @
d0b8a5c0
...
@@ -197,7 +197,8 @@ pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
...
@@ -197,7 +197,8 @@ pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
/* Bus number == domain number until we get above 256 busses */
/* Bus number == domain number until we get above 256 busses */
static
inline
int
pci_name_bus
(
char
*
name
,
struct
pci_bus
*
bus
)
static
inline
int
pci_name_bus
(
char
*
name
,
struct
pci_bus
*
bus
)
{
{
int
domain
=
pci_domain_nr
(
bus
)
int
domain
=
pci_domain_nr
(
bus
);
if
(
domain
<
256
)
{
if
(
domain
<
256
)
{
sprintf
(
name
,
"%02x"
,
domain
);
sprintf
(
name
,
"%02x"
,
domain
);
}
else
{
}
else
{
...
...
include/linux/pci.h
View file @
d0b8a5c0
...
@@ -487,8 +487,8 @@ struct pci_ops {
...
@@ -487,8 +487,8 @@ struct pci_ops {
};
};
struct
pci_raw_ops
{
struct
pci_raw_ops
{
int
(
*
read
)(
int
dom
,
int
bus
,
int
dev
,
int
func
,
int
reg
,
int
len
,
u32
*
val
);
int
(
*
read
)(
int
dom
,
int
bus
,
int
dev
fn
,
int
reg
,
int
len
,
u32
*
val
);
int
(
*
write
)(
int
dom
,
int
bus
,
int
dev
,
int
func
,
int
reg
,
int
len
,
u32
val
);
int
(
*
write
)(
int
dom
,
int
bus
,
int
dev
fn
,
int
reg
,
int
len
,
u32
val
);
};
};
extern
struct
pci_raw_ops
*
raw_pci_ops
;
extern
struct
pci_raw_ops
*
raw_pci_ops
;
...
...
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