Commit d4e87444 authored by Jacob Keller's avatar Jacob Keller Committed by Jeff Kirsher

ice: store NVM version info in extracted format

The NVM version and Option ROM version information is stored within the
struct ice_nvm_ver_info structure. The data for the NVM is stored as
a 2byte value with the major and minor versions each using one byte from
the field. The Option ROM is stored as a 4byte value that contains
a major, build, and patch number.

Modify the code to immediately extract the version values and store them
in a new struct ice_orom_info. Remove the now unnecessary
ice_get_nvm_version function.

Update ice_ethtool.c to use the new fields directly from the structured
data.

This reduces complexity of the code that prints these versions in
ice_ethtool.c

Update the macro definitions and variable names to use the term "orom"
instead of "oem" for the Option ROM version. This helps increase the
clarity of the Option ROM version code.
Signed-off-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Reviewed-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent e9450990
...@@ -614,29 +614,6 @@ static void ice_get_itr_intrl_gran(struct ice_hw *hw) ...@@ -614,29 +614,6 @@ static void ice_get_itr_intrl_gran(struct ice_hw *hw)
} }
} }
/**
* ice_get_nvm_version - get cached NVM version data
* @hw: pointer to the hardware structure
* @oem_ver: 8 bit NVM version
* @oem_build: 16 bit NVM build number
* @oem_patch: 8 NVM patch number
* @ver_hi: high 8 bits of the NVM version
* @ver_lo: low 8 bits of the NVM version
*/
void
ice_get_nvm_version(struct ice_hw *hw, u8 *oem_ver, u16 *oem_build,
u8 *oem_patch, u8 *ver_hi, u8 *ver_lo)
{
struct ice_nvm_info *nvm = &hw->nvm;
*oem_ver = (u8)((nvm->oem_ver & ICE_OEM_VER_MASK) >> ICE_OEM_VER_SHIFT);
*oem_patch = (u8)(nvm->oem_ver & ICE_OEM_VER_PATCH_MASK);
*oem_build = (u16)((nvm->oem_ver & ICE_OEM_VER_BUILD_MASK) >>
ICE_OEM_VER_BUILD_SHIFT);
*ver_hi = (nvm->ver & ICE_NVM_VER_HI_MASK) >> ICE_NVM_VER_HI_SHIFT;
*ver_lo = (nvm->ver & ICE_NVM_VER_LO_MASK) >> ICE_NVM_VER_LO_SHIFT;
}
/** /**
* ice_init_hw - main hardware initialization routine * ice_init_hw - main hardware initialization routine
* @hw: pointer to the hardware structure * @hw: pointer to the hardware structure
......
...@@ -153,9 +153,6 @@ ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, ...@@ -153,9 +153,6 @@ ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
void void
ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded, ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
u64 *prev_stat, u64 *cur_stat); u64 *prev_stat, u64 *cur_stat);
void
ice_get_nvm_version(struct ice_hw *hw, u8 *oem_ver, u16 *oem_build,
u8 *oem_patch, u8 *ver_hi, u8 *ver_lo);
enum ice_status enum ice_status
ice_sched_query_elem(struct ice_hw *hw, u32 node_teid, ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_get_elem *buf); struct ice_aqc_get_elem *buf);
......
...@@ -167,11 +167,14 @@ static void ...@@ -167,11 +167,14 @@ static void
ice_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo) ice_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
{ {
struct ice_netdev_priv *np = netdev_priv(netdev); struct ice_netdev_priv *np = netdev_priv(netdev);
u8 oem_ver, oem_patch, nvm_ver_hi, nvm_ver_lo;
struct ice_vsi *vsi = np->vsi; struct ice_vsi *vsi = np->vsi;
struct ice_pf *pf = vsi->back; struct ice_pf *pf = vsi->back;
struct ice_hw *hw = &pf->hw; struct ice_hw *hw = &pf->hw;
u16 oem_build; struct ice_orom_info *orom;
struct ice_nvm_info *nvm;
nvm = &hw->nvm;
orom = &nvm->orom;
strscpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver)); strscpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
strscpy(drvinfo->version, ice_drv_ver, sizeof(drvinfo->version)); strscpy(drvinfo->version, ice_drv_ver, sizeof(drvinfo->version));
...@@ -179,11 +182,9 @@ ice_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo) ...@@ -179,11 +182,9 @@ ice_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
/* Display NVM version (from which the firmware version can be /* Display NVM version (from which the firmware version can be
* determined) which contains more pertinent information. * determined) which contains more pertinent information.
*/ */
ice_get_nvm_version(hw, &oem_ver, &oem_build, &oem_patch,
&nvm_ver_hi, &nvm_ver_lo);
snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
"%x.%02x 0x%x %d.%d.%d", nvm_ver_hi, nvm_ver_lo, "%x.%02x 0x%x %d.%d.%d", nvm->major_ver, nvm->minor_ver,
hw->nvm.eetrack, oem_ver, oem_build, oem_patch); nvm->eetrack, orom->major, orom->build, orom->patch);
strscpy(drvinfo->bus_info, pci_name(pf->pdev), strscpy(drvinfo->bus_info, pci_name(pf->pdev),
sizeof(drvinfo->bus_info)); sizeof(drvinfo->bus_info));
......
...@@ -307,6 +307,62 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data) ...@@ -307,6 +307,62 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
return status; return status;
} }
/**
* ice_get_orom_ver_info - Read Option ROM version information
* @hw: pointer to the HW struct
*
* Read the Combo Image version data from the Boot Configuration TLV and fill
* in the option ROM version data.
*/
static enum ice_status ice_get_orom_ver_info(struct ice_hw *hw)
{
u16 combo_hi, combo_lo, boot_cfg_tlv, boot_cfg_tlv_len;
struct ice_orom_info *orom = &hw->nvm.orom;
enum ice_status status;
u32 combo_ver;
status = ice_get_pfa_module_tlv(hw, &boot_cfg_tlv, &boot_cfg_tlv_len,
ICE_SR_BOOT_CFG_PTR);
if (status) {
ice_debug(hw, ICE_DBG_INIT,
"Failed to read Boot Configuration Block TLV.\n");
return status;
}
/* Boot Configuration Block must have length at least 2 words
* (Combo Image Version High and Combo Image Version Low)
*/
if (boot_cfg_tlv_len < 2) {
ice_debug(hw, ICE_DBG_INIT,
"Invalid Boot Configuration Block TLV size.\n");
return ICE_ERR_INVAL_SIZE;
}
status = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OROM_VER_OFF),
&combo_hi);
if (status) {
ice_debug(hw, ICE_DBG_INIT, "Failed to read OROM_VER hi.\n");
return status;
}
status = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OROM_VER_OFF + 1),
&combo_lo);
if (status) {
ice_debug(hw, ICE_DBG_INIT, "Failed to read OROM_VER lo.\n");
return status;
}
combo_ver = ((u32)combo_hi << 16) | combo_lo;
orom->major = (u8)((combo_ver & ICE_OROM_VER_MASK) >>
ICE_OROM_VER_SHIFT);
orom->patch = (u8)(combo_ver & ICE_OROM_VER_PATCH_MASK);
orom->build = (u16)((combo_ver & ICE_OROM_VER_BUILD_MASK) >>
ICE_OROM_VER_BUILD_SHIFT);
return 0;
}
/** /**
* ice_init_nvm - initializes NVM setting * ice_init_nvm - initializes NVM setting
* @hw: pointer to the HW struct * @hw: pointer to the HW struct
...@@ -316,9 +372,8 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data) ...@@ -316,9 +372,8 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
*/ */
enum ice_status ice_init_nvm(struct ice_hw *hw) enum ice_status ice_init_nvm(struct ice_hw *hw)
{ {
u16 oem_hi, oem_lo, boot_cfg_tlv, boot_cfg_tlv_len;
struct ice_nvm_info *nvm = &hw->nvm; struct ice_nvm_info *nvm = &hw->nvm;
u16 eetrack_lo, eetrack_hi; u16 eetrack_lo, eetrack_hi, ver;
enum ice_status status; enum ice_status status;
u32 fla, gens_stat; u32 fla, gens_stat;
u8 sr_size; u8 sr_size;
...@@ -344,12 +399,14 @@ enum ice_status ice_init_nvm(struct ice_hw *hw) ...@@ -344,12 +399,14 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
return ICE_ERR_NVM_BLANK_MODE; return ICE_ERR_NVM_BLANK_MODE;
} }
status = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &nvm->ver); status = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &ver);
if (status) { if (status) {
ice_debug(hw, ICE_DBG_INIT, ice_debug(hw, ICE_DBG_INIT,
"Failed to read DEV starter version.\n"); "Failed to read DEV starter version.\n");
return status; return status;
} }
nvm->major_ver = (ver & ICE_NVM_VER_HI_MASK) >> ICE_NVM_VER_HI_SHIFT;
nvm->minor_ver = (ver & ICE_NVM_VER_LO_MASK) >> ICE_NVM_VER_LO_SHIFT;
status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo); status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);
if (status) { if (status) {
...@@ -390,39 +447,12 @@ enum ice_status ice_init_nvm(struct ice_hw *hw) ...@@ -390,39 +447,12 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
break; break;
} }
status = ice_get_pfa_module_tlv(hw, &boot_cfg_tlv, &boot_cfg_tlv_len, status = ice_get_orom_ver_info(hw);
ICE_SR_BOOT_CFG_PTR);
if (status) { if (status) {
ice_debug(hw, ICE_DBG_INIT, ice_debug(hw, ICE_DBG_INIT, "Failed to read Option ROM info.\n");
"Failed to read Boot Configuration Block TLV.\n");
return status; return status;
} }
/* Boot Configuration Block must have length at least 2 words
* (Combo Image Version High and Combo Image Version Low)
*/
if (boot_cfg_tlv_len < 2) {
ice_debug(hw, ICE_DBG_INIT,
"Invalid Boot Configuration Block TLV size.\n");
return ICE_ERR_INVAL_SIZE;
}
status = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OEM_VER_OFF),
&oem_hi);
if (status) {
ice_debug(hw, ICE_DBG_INIT, "Failed to read OEM_VER hi.\n");
return status;
}
status = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OEM_VER_OFF + 1),
&oem_lo);
if (status) {
ice_debug(hw, ICE_DBG_INIT, "Failed to read OEM_VER lo.\n");
return status;
}
nvm->oem_ver = ((u32)oem_hi << 16) | oem_lo;
return 0; return 0;
} }
......
...@@ -239,12 +239,20 @@ struct ice_fc_info { ...@@ -239,12 +239,20 @@ struct ice_fc_info {
enum ice_fc_mode req_mode; /* FC mode requested by caller */ enum ice_fc_mode req_mode; /* FC mode requested by caller */
}; };
/* Option ROM version information */
struct ice_orom_info {
u8 major; /* Major version of OROM */
u8 patch; /* Patch version of OROM */
u16 build; /* Build version of OROM */
};
/* NVM Information */ /* NVM Information */
struct ice_nvm_info { struct ice_nvm_info {
struct ice_orom_info orom; /* Option ROM version info */
u32 eetrack; /* NVM data version */ u32 eetrack; /* NVM data version */
u32 oem_ver; /* OEM version info */
u16 sr_words; /* Shadow RAM size in words */ u16 sr_words; /* Shadow RAM size in words */
u16 ver; /* NVM package version */ u8 major_ver; /* major version of NVM package */
u8 minor_ver; /* minor version of dev starter */
u8 blank_nvm_mode; /* is NVM empty (no FW present) */ u8 blank_nvm_mode; /* is NVM empty (no FW present) */
}; };
...@@ -626,7 +634,7 @@ struct ice_hw_port_stats { ...@@ -626,7 +634,7 @@ struct ice_hw_port_stats {
/* Checksum and Shadow RAM pointers */ /* Checksum and Shadow RAM pointers */
#define ICE_SR_BOOT_CFG_PTR 0x132 #define ICE_SR_BOOT_CFG_PTR 0x132
#define ICE_NVM_OEM_VER_OFF 0x02 #define ICE_NVM_OROM_VER_OFF 0x02
#define ICE_SR_NVM_DEV_STARTER_VER 0x18 #define ICE_SR_NVM_DEV_STARTER_VER 0x18
#define ICE_SR_NVM_EETRACK_LO 0x2D #define ICE_SR_NVM_EETRACK_LO 0x2D
#define ICE_SR_NVM_EETRACK_HI 0x2E #define ICE_SR_NVM_EETRACK_HI 0x2E
...@@ -634,12 +642,12 @@ struct ice_hw_port_stats { ...@@ -634,12 +642,12 @@ struct ice_hw_port_stats {
#define ICE_NVM_VER_LO_MASK (0xff << ICE_NVM_VER_LO_SHIFT) #define ICE_NVM_VER_LO_MASK (0xff << ICE_NVM_VER_LO_SHIFT)
#define ICE_NVM_VER_HI_SHIFT 12 #define ICE_NVM_VER_HI_SHIFT 12
#define ICE_NVM_VER_HI_MASK (0xf << ICE_NVM_VER_HI_SHIFT) #define ICE_NVM_VER_HI_MASK (0xf << ICE_NVM_VER_HI_SHIFT)
#define ICE_OEM_VER_PATCH_SHIFT 0 #define ICE_OROM_VER_PATCH_SHIFT 0
#define ICE_OEM_VER_PATCH_MASK (0xff << ICE_OEM_VER_PATCH_SHIFT) #define ICE_OROM_VER_PATCH_MASK (0xff << ICE_OROM_VER_PATCH_SHIFT)
#define ICE_OEM_VER_BUILD_SHIFT 8 #define ICE_OROM_VER_BUILD_SHIFT 8
#define ICE_OEM_VER_BUILD_MASK (0xffff << ICE_OEM_VER_BUILD_SHIFT) #define ICE_OROM_VER_BUILD_MASK (0xffff << ICE_OROM_VER_BUILD_SHIFT)
#define ICE_OEM_VER_SHIFT 24 #define ICE_OROM_VER_SHIFT 24
#define ICE_OEM_VER_MASK (0xff << ICE_OEM_VER_SHIFT) #define ICE_OROM_VER_MASK (0xff << ICE_OROM_VER_SHIFT)
#define ICE_SR_PFA_PTR 0x40 #define ICE_SR_PFA_PTR 0x40
#define ICE_SR_SECTOR_SIZE_IN_WORDS 0x800 #define ICE_SR_SECTOR_SIZE_IN_WORDS 0x800
#define ICE_SR_WORDS_IN_1KB 512 #define ICE_SR_WORDS_IN_1KB 512
......
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