Commit d548c217 authored by Vabhav Sharma's avatar Vabhav Sharma Committed by Shawn Guo

arm64: dts: add QorIQ LX2160A SoC support

LX2160A SoC is based on Layerscape Chassis Generation 3.2 Architecture.

LX2160A features an advanced 16 64-bit ARM v8 CortexA72 processor cores
in 8 cluster, CCN508, GICv3,two 64-bit DDR4 memory controller, 8 I2C
controllers, 3 dspi, 2 esdhc,2 USB 3.0, mmu 500, 3 SATA, 4 PL011 SBSA
UARTs etc.
Signed-off-by: default avatarRamneek Mehresh <ramneek.mehresh@nxp.com>
Signed-off-by: default avatarZhang Ying-22455 <ying.zhang22455@nxp.com>
Signed-off-by: default avatarNipun Gupta <nipun.gupta@nxp.com>
Signed-off-by: default avatarPriyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: default avatarYogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: default avatarSriram Dash <sriram.dash@nxp.com>
Signed-off-by: default avatarVabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: default avatarHoria Geanta <horia.geanta@nxp.com>
Signed-off-by: default avatarRan Wang <ran.wang_1@nxp.com>
Signed-off-by: default avatarYinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: default avatarLi Yang <leoyang.li@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 65102238
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment