Commit d6fced83 authored by Jun Nie's avatar Jun Nie Committed by Ulf Hansson

mmc: dw_mmc: Add fifo watermark alignment property

Data done irq is expected if data length is less than
watermark in PIO mode. But fifo watermark is requested
to be aligned with data length in some SoC so that TX/RX
irq can be generated with data done irq. Add the
watermark alignment to mark this requirement and force
fifo watermark setting accordingly.
Signed-off-by: default avatarJun Nie <jun.nie@linaro.org>
Reviewed-by: default avatarShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: default avatarJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent a0361c1a
...@@ -1112,10 +1112,14 @@ static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) ...@@ -1112,10 +1112,14 @@ static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data)
mci_writel(host, CTRL, temp); mci_writel(host, CTRL, temp);
/* /*
* Use the initial fifoth_val for PIO mode. * Use the initial fifoth_val for PIO mode. If wm_algined
* is set, we set watermark same as data size.
* If next issued data may be transfered by DMA mode, * If next issued data may be transfered by DMA mode,
* prev_blksz should be invalidated. * prev_blksz should be invalidated.
*/ */
if (host->wm_aligned)
dw_mci_adjust_fifoth(host, data);
else
mci_writel(host, FIFOTH, host->fifoth_val); mci_writel(host, FIFOTH, host->fifoth_val);
host->prev_blksz = 0; host->prev_blksz = 0;
} else { } else {
...@@ -2978,6 +2982,9 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) ...@@ -2978,6 +2982,9 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host)
of_property_read_u32(np, "data-addr", &host->data_addr_override); of_property_read_u32(np, "data-addr", &host->data_addr_override);
if (of_get_property(np, "fifo-watermark-aligned", NULL))
host->wm_aligned = true;
if (!of_property_read_u32(np, "clock-frequency", &clock_frequency)) if (!of_property_read_u32(np, "clock-frequency", &clock_frequency))
pdata->bus_hz = clock_frequency; pdata->bus_hz = clock_frequency;
......
...@@ -115,6 +115,8 @@ struct dw_mci_dma_slave { ...@@ -115,6 +115,8 @@ struct dw_mci_dma_slave {
* @slot: Slots sharing this MMC controller. * @slot: Slots sharing this MMC controller.
* @fifo_depth: depth of FIFO. * @fifo_depth: depth of FIFO.
* @data_addr_override: override fifo reg offset with this value. * @data_addr_override: override fifo reg offset with this value.
* @wm_aligned: force fifo watermark equal with data length in PIO mode.
* Set as true if alignment is needed.
* @data_shift: log2 of FIFO item size. * @data_shift: log2 of FIFO item size.
* @part_buf_start: Start index in part_buf. * @part_buf_start: Start index in part_buf.
* @part_buf_count: Bytes of partial data in part_buf. * @part_buf_count: Bytes of partial data in part_buf.
...@@ -163,6 +165,7 @@ struct dw_mci { ...@@ -163,6 +165,7 @@ struct dw_mci {
void __iomem *regs; void __iomem *regs;
void __iomem *fifo_reg; void __iomem *fifo_reg;
u32 data_addr_override; u32 data_addr_override;
bool wm_aligned;
struct scatterlist *sg; struct scatterlist *sg;
struct sg_mapping_iter sg_miter; struct sg_mapping_iter sg_miter;
......
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