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Commit d9270292 authored by Mark Brown's avatar Mark Brown
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PM6125 regulator support 

Merge series from Iskren Chernev <iskren.chernev@gmail.com>:

This patch series adds SPMI and SMD regulator support for the PM6125 found on
SM4250/SM6115 SoCs from QCom.

This code has been tested on:
* OnePlus Nord N100 (oneplus,billie2, SoC sm4250)
* Redmi 9T (redmi,lemon, SoC sm6115)

The main source used for this change is qpnp pm6125 support patch from caf [1]:

[1]: https://source.codeaurora.org/quic/la/kernel/msm-5.4/commit/?h=kernel.lnx.5.4.r1-rel&id=d1220daeffaa440ffff0a8c47322eb0033bf54f5

v3: https://lkml.org/lkml/2022/7/31/303
v2: https://lkml.org/lkml/2022/7/26/885
v1: https://lkml.org/lkml/2021/8/28/144

Changes from v3:
- fix compilation issue reported by kernel test robot
- reorder HFSMPS/LDO+FTSMPS patches
- add new slew-rate computation for HFSMPS
- add proper pull-down support for new regs
- name new regs/vals after HFSMPS instead of FTSMPS
- address indentation/newline issues reported by Krzysztof
- improve commit messages on SPMI/RPM related patches
Changes from v2:
- split spmi new regulator support in 2 patches
- FTS and LDOs now have set_load and set_pull_down ops
- add better commit messages on spmi patches
- fix sob header order
- fix tested device info (Redmi 9T, NOT Xiaomi 9T)
- improve formatting in spmi binding docs
- sort alphabetically in smd binding docs
- sort alphabetically spmi pmics
- sort alphabetically smd pmics
Changes from v1:
- add dt-bindings
- split SPMI patch into new reg types and the new PMIC
- add correct supply mapping

Iskren Chernev (13):
  dt-bindings: regulator: qcom_spmi: Improve formatting of if-then
    blocks
  dt-bindings: regulator: qcom_spmi: Document PM6125 PMIC
  dt-bindings: regulator: qcom_smd: Sort compatibles alphabetically
  dt-bindings: regulator: qcom_smd: Document PM6125 PMIC
  regulator: qcom_spmi: Add support for HFSMPS regulator type
  regulator: qcom_spmi: Add support for LDO_510 and FTSMPS
  regulator: qcom_spmi: Sort pmics alphabetically (part 1)
  regulator: qcom_spmi: Sort pmics alphabetically (part 2)
  regulator: qcom_spmi: Add PM6125 PMIC support
  regulator: qcom_smd: Sort pmics alphabetically (part 1)
  regulator: qcom_smd: Sort pmics alphabetically (part 2)
  regulator: qcom_smd: Sort pmics alphabetically (part 3)
  regulator: qcom_smd: Add PM6125 RPM regulators

 .../regulator/qcom,smd-rpm-regulator.yaml     |  26 +-
 .../regulator/qcom,spmi-regulator.yaml        |  32 ++
 drivers/regulator/qcom_smd-regulator.c        | 400 ++++++++++--------
 drivers/regulator/qcom_spmi-regulator.c       | 378 ++++++++++++-----
 4 files changed, 551 insertions(+), 285 deletions(-)

--
2.37.1
parents 8622817c 95b5f3ef
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Inline Side-by-side
Showing with 551 additions and 285 deletions
Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml
View file @ d9270292
...@@ -24,6 +24,17 @@ description: ...@@ -24,6 +24,17 @@ description:
For mp5496, s2 For mp5496, s2
For pm2250, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22
For pm6125 s1, s2, s3, s4, s5, s6, s7, s8, l1, l2, l3, l5, l6, l7, l8, l9,
l10, l22, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24
For pm660, s1, s2, s3, s4, s5, s6, l1, l2, l3, l5, l6, l7, l8, l9, l10, l22,
l12, l13, l14, l15, l16, l17, l18, l19
For pm660l s1, s2, s3, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, bob
For pm8226, s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, For pm8226, s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10,
l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25,
l26, l27, l28, lvs1 l26, l27, l28, lvs1
...@@ -52,11 +63,6 @@ description: ...@@ -52,11 +63,6 @@ description:
l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19,
l20, l21, l22, l23, l24, l25, l26, l27, l28, lvs1, lvs2 l20, l21, l22, l23, l24, l25, l26, l27, l28, lvs1, lvs2
For pm660, s1, s2, s3, s4, s5, s6, l1, l2, l3, l5, l6, l7, l8, l9, l10, l22,
l12, l13, l14, l15, l16, l17, l18, l19
For pm660l s1, s2, s3, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, bob
For pma8084, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3, For pma8084, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3,
l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19,
l20, l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1 l20, l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1
...@@ -68,9 +74,6 @@ description: ...@@ -68,9 +74,6 @@ description:
For pms405, s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, For pms405, s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
l12, l13 l12, l13
For pm2250, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,
l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22
maintainers: maintainers:
- Andy Gross <agross@kernel.org> - Andy Gross <agross@kernel.org>
- Bjorn Andersson <bjorn.andersson@linaro.org> - Bjorn Andersson <bjorn.andersson@linaro.org>
...@@ -79,6 +82,10 @@ properties: ...@@ -79,6 +82,10 @@ properties:
compatible: compatible:
enum: enum:
- qcom,rpm-mp5496-regulators - qcom,rpm-mp5496-regulators
- qcom,rpm-pm2250-regulators
- qcom,rpm-pm6125-regulators
- qcom,rpm-pm660-regulators
- qcom,rpm-pm660l-regulators
- qcom,rpm-pm8226-regulators - qcom,rpm-pm8226-regulators
- qcom,rpm-pm8841-regulators - qcom,rpm-pm8841-regulators
- qcom,rpm-pm8909-regulators - qcom,rpm-pm8909-regulators
...@@ -88,13 +95,10 @@ properties: ...@@ -88,13 +95,10 @@ properties:
- qcom,rpm-pm8953-regulators - qcom,rpm-pm8953-regulators
- qcom,rpm-pm8994-regulators - qcom,rpm-pm8994-regulators
- qcom,rpm-pm8998-regulators - qcom,rpm-pm8998-regulators
- qcom,rpm-pm660-regulators
- qcom,rpm-pm660l-regulators
- qcom,rpm-pma8084-regulators - qcom,rpm-pma8084-regulators
- qcom,rpm-pmi8994-regulators - qcom,rpm-pmi8994-regulators
- qcom,rpm-pmi8998-regulators - qcom,rpm-pmi8998-regulators
- qcom,rpm-pms405-regulators - qcom,rpm-pms405-regulators
- qcom,rpm-pm2250-regulators
patternProperties: patternProperties:
".*-supply$": ".*-supply$":
......
Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml
View file @ d9270292
...@@ -12,6 +12,7 @@ maintainers: ...@@ -12,6 +12,7 @@ maintainers:
properties: properties:
compatible: compatible:
enum: enum:
- qcom,pm6125-regulators
- qcom,pm660-regulators - qcom,pm660-regulators
- qcom,pm660l-regulators - qcom,pm660l-regulators
- qcom,pm8004-regulators - qcom,pm8004-regulators
...@@ -107,6 +108,25 @@ required: ...@@ -107,6 +108,25 @@ required:
- compatible - compatible
allOf: allOf:
- if:
properties:
compatible:
contains:
enum:
- qcom,pm6125-regulators
then:
properties:
vdd_l1_l7_l17_l18-supply: true
vdd_l2_l3_l4-supply: true
vdd_l5_l15_l19_l20_l21_l22-supply: true
vdd_l6_l8-supply: true
vdd_l9_l11-supply: true
vdd_l10_l13_l14-supply: true
vdd_l12_l16-supply: true
vdd_l23_l24-supply: true
patternProperties:
"^vdd_s[1-8]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -122,6 +142,7 @@ allOf: ...@@ -122,6 +142,7 @@ allOf:
vdd_l8_l9_l10_l11_l12_l13_l14-supply: true vdd_l8_l9_l10_l11_l12_l13_l14-supply: true
patternProperties: patternProperties:
"^vdd_s[1-6]-supply$": true "^vdd_s[1-6]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -136,6 +157,7 @@ allOf: ...@@ -136,6 +157,7 @@ allOf:
vdd_l4_l6-supply: true vdd_l4_l6-supply: true
patternProperties: patternProperties:
"^vdd_s[1-5]-supply$": true "^vdd_s[1-5]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -145,6 +167,7 @@ allOf: ...@@ -145,6 +167,7 @@ allOf:
then: then:
patternProperties: patternProperties:
"^vdd_s[25]-supply$": true "^vdd_s[25]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -154,6 +177,7 @@ allOf: ...@@ -154,6 +177,7 @@ allOf:
then: then:
patternProperties: patternProperties:
"^vdd_s[1-4]-supply$": true "^vdd_s[1-4]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -173,6 +197,7 @@ allOf: ...@@ -173,6 +197,7 @@ allOf:
vdd_lvs1-supply: true vdd_lvs1-supply: true
patternProperties: patternProperties:
"^vdd_s[1-5]-supply$": true "^vdd_s[1-5]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -182,6 +207,7 @@ allOf: ...@@ -182,6 +207,7 @@ allOf:
then: then:
patternProperties: patternProperties:
"^vdd_s[1-8]-supply$": true "^vdd_s[1-8]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -197,6 +223,7 @@ allOf: ...@@ -197,6 +223,7 @@ allOf:
patternProperties: patternProperties:
"^vdd_l[27]-supply$": true "^vdd_l[27]-supply$": true
"^vdd_s[1-4]-supply$": true "^vdd_s[1-4]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -225,6 +252,7 @@ allOf: ...@@ -225,6 +252,7 @@ allOf:
vin_5vs-supply: true vin_5vs-supply: true
patternProperties: patternProperties:
"^vdd_s[1-3]-supply$": true "^vdd_s[1-3]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -243,6 +271,7 @@ allOf: ...@@ -243,6 +271,7 @@ allOf:
vdd_l9_l10_l13_l14_l15_l18-supply: true vdd_l9_l10_l13_l14_l15_l18-supply: true
patternProperties: patternProperties:
"^vdd_s[1-6]-supply$": true "^vdd_s[1-6]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -267,6 +296,7 @@ allOf: ...@@ -267,6 +296,7 @@ allOf:
vdd_lvs_1_2-supply: true vdd_lvs_1_2-supply: true
patternProperties: patternProperties:
"^vdd_s[1-9][0-2]?-supply$": true "^vdd_s[1-9][0-2]?-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -278,6 +308,7 @@ allOf: ...@@ -278,6 +308,7 @@ allOf:
vdd_l1-supply: true vdd_l1-supply: true
patternProperties: patternProperties:
"^vdd_s[1-3]-supply$": true "^vdd_s[1-3]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
...@@ -293,6 +324,7 @@ allOf: ...@@ -293,6 +324,7 @@ allOf:
patternProperties: patternProperties:
"^vdd_l[479]-supply$": true "^vdd_l[479]-supply$": true
"^vdd_s[1-5]-supply$": true "^vdd_s[1-5]-supply$": true
- if: - if:
properties: properties:
compatible: compatible:
......
drivers/regulator/qcom_smd-regulator.c
View file @ d9270292
...@@ -668,6 +668,15 @@ static const struct regulator_desc pm660l_bob = { ...@@ -668,6 +668,15 @@ static const struct regulator_desc pm660l_bob = {
.ops = &rpm_bob_ops, .ops = &rpm_bob_ops,
}; };
static const struct regulator_desc pm6125_ftsmps = {
.linear_ranges = (struct linear_range[]) {
REGULATOR_LINEAR_RANGE(300000, 0, 268, 4000),
},
.n_linear_ranges = 1,
.n_voltages = 269,
.ops = &rpm_smps_ldo_ops,
};
static const struct regulator_desc pms405_hfsmps3 = { static const struct regulator_desc pms405_hfsmps3 = {
.linear_ranges = (struct linear_range[]) { .linear_ranges = (struct linear_range[]) {
REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
...@@ -772,6 +781,158 @@ static const struct rpm_regulator_data rpm_mp5496_regulators[] = { ...@@ -772,6 +781,158 @@ static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
{} {}
}; };
static const struct rpm_regulator_data rpm_pm2250_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" },
{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" },
{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" },
{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{}
};
static const struct rpm_regulator_data rpm_pm6125_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm6125_ftsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm6125_ftsmps, "vdd_s2" },
{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm6125_ftsmps, "vdd_s3" },
{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm6125_ftsmps, "vdd_s4" },
{ "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
{ "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_hfsmps, "vdd_s6" },
{ "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" },
{ "s8", QCOM_SMD_RPM_SMPA, 8, &pm6125_ftsmps, "vdd_s8" },
{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l2_l3_l4" },
{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3_l4" },
{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_nldo660, "vdd_l2_l3_l4" },
{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l6_l8" },
{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l6_l8" },
{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l9_l11" },
{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l9_l11" },
{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l12_l16" },
{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l12_l16" },
{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l23", QCOM_SMD_RPM_LDOA, 23, &pm660_pldo660, "vdd_l23_l24" },
{ "l24", QCOM_SMD_RPM_LDOA, 24, &pm660_pldo660, "vdd_l23_l24" },
{ }
};
static const struct rpm_regulator_data rpm_pm660_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" },
{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" },
{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" },
{ "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" },
{ "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" },
{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" },
{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" },
{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" },
/* l4 is unaccessible on PM660 */
{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" },
{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" },
{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" },
{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
{ }
};
static const struct rpm_regulator_data rpm_pm660l_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" },
{ "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" },
{ "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" },
{ "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" },
{ "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" },
{ "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
{ "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" },
{ "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
{ "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" },
{ "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
{ "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
{ "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
{ "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
{ "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", },
{ }
};
static const struct rpm_regulator_data rpm_pm8226_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" },
{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" },
{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" },
{ "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" },
{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" },
{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" },
{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" },
{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" },
{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" },
{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" },
{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" },
{ "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" },
{ "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" },
{ "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
{ "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" },
{}
};
static const struct rpm_regulator_data rpm_pm8841_regulators[] = { static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" }, { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" }, { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
...@@ -833,44 +994,6 @@ static const struct rpm_regulator_data rpm_pm8916_regulators[] = { ...@@ -833,44 +994,6 @@ static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
{} {}
}; };
static const struct rpm_regulator_data rpm_pm8226_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" },
{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" },
{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" },
{ "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" },
{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" },
{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" },
{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" },
{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" },
{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" },
{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" },
{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" },
{ "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" },
{ "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" },
{ "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
{ "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
{ "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" },
{}
};
static const struct rpm_regulator_data rpm_pm8941_regulators[] = { static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" }, { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" }, { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
...@@ -912,57 +1035,6 @@ static const struct rpm_regulator_data rpm_pm8941_regulators[] = { ...@@ -912,57 +1035,6 @@ static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
{} {}
}; };
static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
{ "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
{ "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
{ "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
{ "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
{ "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
{ "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
{ "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
{ "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
{ "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
{ "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
{ "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
{ "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
{ "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
{ "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
{ "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
{ "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
{ "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
{ "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
{ "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
{ "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
{ "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
{ "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
{ "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
{ "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
{ "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
{ "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
{ "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
{ "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
{ "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
{ "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
{ "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
{ "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
{ "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
{ "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
{ "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
{ "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
{}
};
static const struct rpm_regulator_data rpm_pm8950_regulators[] = { static const struct rpm_regulator_data rpm_pm8950_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" }, { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" }, { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" },
...@@ -1082,14 +1154,6 @@ static const struct rpm_regulator_data rpm_pm8994_regulators[] = { ...@@ -1082,14 +1154,6 @@ static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
{} {}
}; };
static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
{ "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
{ "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
{}
};
static const struct rpm_regulator_data rpm_pm8998_regulators[] = { static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" }, { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" }, { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
...@@ -1137,57 +1201,68 @@ static const struct rpm_regulator_data rpm_pm8998_regulators[] = { ...@@ -1137,57 +1201,68 @@ static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
{} {}
}; };
static const struct rpm_regulator_data rpm_pmi8998_regulators[] = { static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
{ "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" }, { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
{ "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
{ "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
{ "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
{ "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
{ "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
{ "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
{ "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
{ "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
{ "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
{ "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
{ "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
{ "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
{ "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
{ "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
{ "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
{ "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
{ "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
{ "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
{ "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
{ "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
{ "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
{ "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
{ "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
{ "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
{ "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
{ "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
{ "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
{ "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
{ "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
{ "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
{ "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
{ "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
{ "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
{ "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
{ "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
{ "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
{ "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
{} {}
}; };
static const struct rpm_regulator_data rpm_pm660_regulators[] = { static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" }, { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" }, { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" }, { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" }, { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
{ "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" }, {}
{ "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" },
{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" },
{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" },
{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" },
/* l4 is unaccessible on PM660 */
{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" },
{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" },
{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" },
{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
{ }
}; };
static const struct rpm_regulator_data rpm_pm660l_regulators[] = { static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" }, { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
{ "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" }, {}
{ "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" },
{ "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" },
{ "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" },
{ "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" },
{ "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
{ "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" },
{ "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
{ "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" },
{ "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
{ "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
{ "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
{ "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
{ "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", },
{ }
}; };
static const struct rpm_regulator_data rpm_pms405_regulators[] = { static const struct rpm_regulator_data rpm_pms405_regulators[] = {
...@@ -1212,54 +1287,25 @@ static const struct rpm_regulator_data rpm_pms405_regulators[] = { ...@@ -1212,54 +1287,25 @@ static const struct rpm_regulator_data rpm_pms405_regulators[] = {
{} {}
}; };
static const struct rpm_regulator_data rpm_pm2250_regulators[] = {
{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" },
{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" },
{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" },
{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" },
{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
{}
};
static const struct of_device_id rpm_of_match[] = { static const struct of_device_id rpm_of_match[] = {
{ .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators }, { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators },
{ .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators },
{ .compatible = "qcom,rpm-pm6125-regulators", .data = &rpm_pm6125_regulators },
{ .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators },
{ .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators },
{ .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators },
{ .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators }, { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
{ .compatible = "qcom,rpm-pm8909-regulators", .data = &rpm_pm8909_regulators }, { .compatible = "qcom,rpm-pm8909-regulators", .data = &rpm_pm8909_regulators },
{ .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators }, { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
{ .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators },
{ .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators }, { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
{ .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators }, { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators },
{ .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators }, { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators },
{ .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators }, { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
{ .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators }, { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
{ .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators },
{ .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators },
{ .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators }, { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
{ .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators }, { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators },
{ .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators }, { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
{ .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators }, { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
{ .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators },
{} {}
}; };
MODULE_DEVICE_TABLE(of, rpm_of_match); MODULE_DEVICE_TABLE(of, rpm_of_match);
......
drivers/regulator/qcom_spmi-regulator.c
View file @ d9270292
...@@ -99,6 +99,9 @@ enum spmi_regulator_logical_type { ...@@ -99,6 +99,9 @@ enum spmi_regulator_logical_type {
SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO, SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO,
SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426, SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426,
SPMI_REGULATOR_LOGICAL_TYPE_HFS430, SPMI_REGULATOR_LOGICAL_TYPE_HFS430,
SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS3,
SPMI_REGULATOR_LOGICAL_TYPE_LDO_510,
SPMI_REGULATOR_LOGICAL_TYPE_HFSMPS,
}; };
enum spmi_regulator_type { enum spmi_regulator_type {
...@@ -166,6 +169,17 @@ enum spmi_regulator_subtype { ...@@ -166,6 +169,17 @@ enum spmi_regulator_subtype {
SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a, SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a,
SPMI_REGULATOR_SUBTYPE_HT_P150 = 0x35, SPMI_REGULATOR_SUBTYPE_HT_P150 = 0x35,
SPMI_REGULATOR_SUBTYPE_HT_P600 = 0x3d, SPMI_REGULATOR_SUBTYPE_HT_P600 = 0x3d,
SPMI_REGULATOR_SUBTYPE_HFSMPS_510 = 0x0a,
SPMI_REGULATOR_SUBTYPE_FTSMPS_510 = 0x0b,
SPMI_REGULATOR_SUBTYPE_LV_P150_510 = 0x71,
SPMI_REGULATOR_SUBTYPE_LV_P300_510 = 0x72,
SPMI_REGULATOR_SUBTYPE_LV_P600_510 = 0x73,
SPMI_REGULATOR_SUBTYPE_N300_510 = 0x6a,
SPMI_REGULATOR_SUBTYPE_N600_510 = 0x6b,
SPMI_REGULATOR_SUBTYPE_N1200_510 = 0x6c,
SPMI_REGULATOR_SUBTYPE_MV_P50_510 = 0x7a,
SPMI_REGULATOR_SUBTYPE_MV_P150_510 = 0x7b,
SPMI_REGULATOR_SUBTYPE_MV_P600_510 = 0x7d,
}; };
enum spmi_common_regulator_registers { enum spmi_common_regulator_registers {
...@@ -193,6 +207,14 @@ enum spmi_ftsmps426_regulator_registers { ...@@ -193,6 +207,14 @@ enum spmi_ftsmps426_regulator_registers {
SPMI_FTSMPS426_REG_VOLTAGE_ULS_MSB = 0x69, SPMI_FTSMPS426_REG_VOLTAGE_ULS_MSB = 0x69,
}; };
/*
* Third common register layout
*/
enum spmi_hfsmps_regulator_registers {
SPMI_HFSMPS_REG_STEP_CTRL = 0x3c,
SPMI_HFSMPS_REG_PULL_DOWN = 0xa0,
};
enum spmi_vs_registers { enum spmi_vs_registers {
SPMI_VS_REG_OCP = 0x4a, SPMI_VS_REG_OCP = 0x4a,
SPMI_VS_REG_SOFT_START = 0x4c, SPMI_VS_REG_SOFT_START = 0x4c,
...@@ -260,6 +282,15 @@ enum spmi_common_control_register_index { ...@@ -260,6 +282,15 @@ enum spmi_common_control_register_index {
#define SPMI_FTSMPS426_MODE_MASK 0x07 #define SPMI_FTSMPS426_MODE_MASK 0x07
/* Third common regulator mode register values */
#define SPMI_HFSMPS_MODE_BYPASS_MASK 2
#define SPMI_HFSMPS_MODE_RETENTION_MASK 3
#define SPMI_HFSMPS_MODE_LPM_MASK 4
#define SPMI_HFSMPS_MODE_AUTO_MASK 6
#define SPMI_HFSMPS_MODE_HPM_MASK 7
#define SPMI_HFSMPS_MODE_MASK 0x07
/* Common regulator pull down control register layout */ /* Common regulator pull down control register layout */
#define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80 #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80
...@@ -305,6 +336,9 @@ enum spmi_common_control_register_index { ...@@ -305,6 +336,9 @@ enum spmi_common_control_register_index {
#define SPMI_FTSMPS_STEP_MARGIN_NUM 4 #define SPMI_FTSMPS_STEP_MARGIN_NUM 4
#define SPMI_FTSMPS_STEP_MARGIN_DEN 5 #define SPMI_FTSMPS_STEP_MARGIN_DEN 5
/* slew_rate has units of uV/us. */
#define SPMI_HFSMPS_SLEW_RATE_38p4 38400
#define SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK 0x03 #define SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK 0x03
#define SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT 0 #define SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT 0
...@@ -554,6 +588,14 @@ static struct spmi_voltage_range ht_p600_ranges[] = { ...@@ -554,6 +588,14 @@ static struct spmi_voltage_range ht_p600_ranges[] = {
SPMI_VOLTAGE_RANGE(0, 1704000, 1704000, 1896000, 1896000, 8000), SPMI_VOLTAGE_RANGE(0, 1704000, 1704000, 1896000, 1896000, 8000),
}; };
static struct spmi_voltage_range nldo_510_ranges[] = {
SPMI_VOLTAGE_RANGE(0, 320000, 320000, 1304000, 1304000, 8000),
};
static struct spmi_voltage_range ftsmps510_ranges[] = {
SPMI_VOLTAGE_RANGE(0, 300000, 300000, 1372000, 1372000, 4000),
};
static DEFINE_SPMI_SET_POINTS(pldo); static DEFINE_SPMI_SET_POINTS(pldo);
static DEFINE_SPMI_SET_POINTS(nldo1); static DEFINE_SPMI_SET_POINTS(nldo1);
static DEFINE_SPMI_SET_POINTS(nldo2); static DEFINE_SPMI_SET_POINTS(nldo2);
...@@ -576,6 +618,8 @@ static DEFINE_SPMI_SET_POINTS(ht_nldo); ...@@ -576,6 +618,8 @@ static DEFINE_SPMI_SET_POINTS(ht_nldo);
static DEFINE_SPMI_SET_POINTS(hfs430); static DEFINE_SPMI_SET_POINTS(hfs430);
static DEFINE_SPMI_SET_POINTS(ht_p150); static DEFINE_SPMI_SET_POINTS(ht_p150);
static DEFINE_SPMI_SET_POINTS(ht_p600); static DEFINE_SPMI_SET_POINTS(ht_p600);
static DEFINE_SPMI_SET_POINTS(nldo_510);
static DEFINE_SPMI_SET_POINTS(ftsmps510);
static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
int len) int len)
...@@ -1062,6 +1106,23 @@ static unsigned int spmi_regulator_ftsmps426_get_mode(struct regulator_dev *rdev ...@@ -1062,6 +1106,23 @@ static unsigned int spmi_regulator_ftsmps426_get_mode(struct regulator_dev *rdev
} }
} }
static unsigned int spmi_regulator_hfsmps_get_mode(struct regulator_dev *rdev)
{
struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
u8 reg;
spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1);
switch (reg) {
case SPMI_HFSMPS_MODE_HPM_MASK:
return REGULATOR_MODE_NORMAL;
case SPMI_HFSMPS_MODE_AUTO_MASK:
return REGULATOR_MODE_FAST;
default:
return REGULATOR_MODE_IDLE;
}
}
static int static int
spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode) spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode)
{ {
...@@ -1108,6 +1169,33 @@ spmi_regulator_ftsmps426_set_mode(struct regulator_dev *rdev, unsigned int mode) ...@@ -1108,6 +1169,33 @@ spmi_regulator_ftsmps426_set_mode(struct regulator_dev *rdev, unsigned int mode)
return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
} }
static int
spmi_regulator_hfsmps_set_mode(struct regulator_dev *rdev, unsigned int mode)
{
struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
u8 mask = SPMI_HFSMPS_MODE_MASK;
u8 val;
switch (mode) {
case REGULATOR_MODE_NORMAL:
val = SPMI_HFSMPS_MODE_HPM_MASK;
break;
case REGULATOR_MODE_FAST:
val = SPMI_HFSMPS_MODE_AUTO_MASK;
break;
case REGULATOR_MODE_IDLE:
val = vreg->logical_type ==
SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS3 ?
SPMI_HFSMPS_MODE_RETENTION_MASK :
SPMI_HFSMPS_MODE_LPM_MASK;
break;
default:
return -EINVAL;
}
return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
}
static int static int
spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA) spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA)
{ {
...@@ -1131,6 +1219,15 @@ static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev) ...@@ -1131,6 +1219,15 @@ static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev)
mask, mask); mask, mask);
} }
static int spmi_regulator_hfsmps_set_pull_down(struct regulator_dev *rdev)
{
struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK;
return spmi_vreg_update_bits(vreg, SPMI_HFSMPS_REG_PULL_DOWN,
mask, mask);
}
static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev) static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev)
{ {
struct spmi_regulator *vreg = rdev_get_drvdata(rdev); struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
...@@ -1465,6 +1562,21 @@ static const struct regulator_ops spmi_hfs430_ops = { ...@@ -1465,6 +1562,21 @@ static const struct regulator_ops spmi_hfs430_ops = {
.get_mode = spmi_regulator_ftsmps426_get_mode, .get_mode = spmi_regulator_ftsmps426_get_mode,
}; };
static const struct regulator_ops spmi_hfsmps_ops = {
.enable = regulator_enable_regmap,
.disable = regulator_disable_regmap,
.is_enabled = regulator_is_enabled_regmap,
.set_voltage_sel = spmi_regulator_ftsmps426_set_voltage,
.set_voltage_time_sel = spmi_regulator_set_voltage_time_sel,
.get_voltage_sel = spmi_regulator_ftsmps426_get_voltage,
.map_voltage = spmi_regulator_single_map_voltage,
.list_voltage = spmi_regulator_common_list_voltage,
.set_mode = spmi_regulator_hfsmps_set_mode,
.get_mode = spmi_regulator_hfsmps_get_mode,
.set_load = spmi_regulator_common_set_load,
.set_pull_down = spmi_regulator_hfsmps_set_pull_down,
};
/* Maximum possible digital major revision value */ /* Maximum possible digital major revision value */
#define INF 0xFF #define INF 0xFF
...@@ -1473,7 +1585,8 @@ static const struct spmi_regulator_mapping supported_regulators[] = { ...@@ -1473,7 +1585,8 @@ static const struct spmi_regulator_mapping supported_regulators[] = {
SPMI_VREG(LDO, HT_P600, 0, INF, HFS430, hfs430, ht_p600, 10000), SPMI_VREG(LDO, HT_P600, 0, INF, HFS430, hfs430, ht_p600, 10000),
SPMI_VREG(LDO, HT_P150, 0, INF, HFS430, hfs430, ht_p150, 10000), SPMI_VREG(LDO, HT_P150, 0, INF, HFS430, hfs430, ht_p150, 10000),
SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000),
SPMI_VREG(BUCK, HFS430, 0, INF, HFS430, hfs430, hfs430, 10000), SPMI_VREG(BUCK, HFS430, 0, 3, HFS430, hfs430, hfs430, 10000),
SPMI_VREG(BUCK, HFSMPS_510, 4, INF, HFSMPS, hfsmps, hfs430, 100000),
SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000), SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000),
SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000), SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000),
SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000), SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000),
...@@ -1549,6 +1662,16 @@ static const struct spmi_regulator_mapping supported_regulators[] = { ...@@ -1549,6 +1662,16 @@ static const struct spmi_regulator_mapping supported_regulators[] = {
SPMI_VREG(ULT_LDO, P300, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), SPMI_VREG(ULT_LDO, P300, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
SPMI_VREG(ULT_LDO, P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), SPMI_VREG(ULT_LDO, P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
SPMI_VREG(ULT_LDO, P50, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000), SPMI_VREG(ULT_LDO, P50, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000),
SPMI_VREG(LDO, LV_P150_510, 0, INF, LDO_510, hfsmps, ht_lvpldo, 10000),
SPMI_VREG(LDO, LV_P300_510, 0, INF, LDO_510, hfsmps, ht_lvpldo, 10000),
SPMI_VREG(LDO, LV_P600_510, 0, INF, LDO_510, hfsmps, ht_lvpldo, 10000),
SPMI_VREG(LDO, MV_P50_510, 0, INF, LDO_510, hfsmps, pldo660, 10000),
SPMI_VREG(LDO, MV_P150_510, 0, INF, LDO_510, hfsmps, pldo660, 10000),
SPMI_VREG(LDO, MV_P600_510, 0, INF, LDO_510, hfsmps, pldo660, 10000),
SPMI_VREG(LDO, N300_510, 0, INF, LDO_510, hfsmps, nldo_510, 10000),
SPMI_VREG(LDO, N600_510, 0, INF, LDO_510, hfsmps, nldo_510, 10000),
SPMI_VREG(LDO, N1200_510, 0, INF, LDO_510, hfsmps, nldo_510, 10000),
SPMI_VREG(FTS, FTSMPS_510, 0, INF, FTSMPS3, hfsmps, ftsmps510, 100000),
}; };
static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points) static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points)
...@@ -1696,6 +1819,26 @@ static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg, ...@@ -1696,6 +1819,26 @@ static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg,
return ret; return ret;
} }
static int spmi_regulator_init_slew_rate_hfsmps(struct spmi_regulator *vreg)
{
int ret;
u8 reg = 0;
int delay;
ret = spmi_vreg_read(vreg, SPMI_HFSMPS_REG_STEP_CTRL, &reg, 1);
if (ret) {
dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret);
return ret;
}
delay = reg & SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK;
delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT;
vreg->slew_rate = SPMI_HFSMPS_SLEW_RATE_38p4 >> delay;
return ret;
}
static int spmi_regulator_init_registers(struct spmi_regulator *vreg, static int spmi_regulator_init_registers(struct spmi_regulator *vreg,
const struct spmi_regulator_init_data *data) const struct spmi_regulator_init_data *data)
{ {
...@@ -1846,6 +1989,12 @@ static int spmi_regulator_of_parse(struct device_node *node, ...@@ -1846,6 +1989,12 @@ static int spmi_regulator_of_parse(struct device_node *node,
if (ret) if (ret)
return ret; return ret;
break; break;
case SPMI_REGULATOR_LOGICAL_TYPE_HFSMPS:
case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS3:
ret = spmi_regulator_init_slew_rate_hfsmps(vreg);
if (ret)
return ret;
break;
default: default:
break; break;
} }
...@@ -1872,40 +2021,100 @@ static int spmi_regulator_of_parse(struct device_node *node, ...@@ -1872,40 +2021,100 @@ static int spmi_regulator_of_parse(struct device_node *node,
return 0; return 0;
} }
static const struct spmi_regulator_data pm8941_regulators[] = { static const struct spmi_regulator_data pm6125_regulators[] = {
{ "s1", 0x1400, "vdd_s1" },
{ "s2", 0x1700, "vdd_s2" },
{ "s3", 0x1a00, "vdd_s3" },
{ "s4", 0x1d00, "vdd_s4" },
{ "s5", 0x2000, "vdd_s5" },
{ "s6", 0x2300, "vdd_s6" },
{ "s7", 0x2600, "vdd_s7" },
{ "s8", 0x2900, "vdd_s8" },
{ "l1", 0x4000, "vdd_l1_l7_l17_l18" },
{ "l2", 0x4100, "vdd_l2_l3_l4" },
{ "l3", 0x4200, "vdd_l2_l3_l4" },
{ "l4", 0x4300, "vdd_l2_l3_l4" },
{ "l5", 0x4400, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l6", 0x4500, "vdd_l6_l8" },
{ "l7", 0x4600, "vdd_l1_l7_l17_l18" },
{ "l8", 0x4700, "vdd_l6_l8" },
{ "l9", 0x4800, "vdd_l9_l11" },
{ "l10", 0x4900, "vdd_l10_l13_l14" },
{ "l11", 0x4a00, "vdd_l9_l11" },
{ "l12", 0x4b00, "vdd_l12_l16" },
{ "l13", 0x4c00, "vdd_l10_l13_l14" },
{ "l14", 0x4d00, "vdd_l10_l13_l14" },
{ "l15", 0x4e00, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l16", 0x4f00, "vdd_l12_l16" },
{ "l17", 0x5000, "vdd_l1_l7_l17_l18" },
{ "l18", 0x5100, "vdd_l1_l7_l17_l18" },
{ "l19", 0x5200, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l20", 0x5300, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l21", 0x5400, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l22", 0x5500, "vdd_l5_l15_l19_l20_l21_l22" },
{ "l23", 0x5600, "vdd_l23_l24" },
{ "l24", 0x5700, "vdd_l23_l24" },
};
static const struct spmi_regulator_data pm660_regulators[] = {
{ "s1", 0x1400, "vdd_s1", }, { "s1", 0x1400, "vdd_s1", },
{ "s2", 0x1700, "vdd_s2", }, { "s2", 0x1700, "vdd_s2", },
{ "s3", 0x1a00, "vdd_s3", }, { "s3", 0x1a00, "vdd_s3", },
{ "s4", 0xa000, }, { "s4", 0x1d00, "vdd_s3", },
{ "l1", 0x4000, "vdd_l1_l3", }, { "s5", 0x2000, "vdd_s5", },
{ "l2", 0x4100, "vdd_l2_lvs_1_2_3", }, { "s6", 0x2300, "vdd_s6", },
{ "l3", 0x4200, "vdd_l1_l3", }, { "l1", 0x4000, "vdd_l1_l6_l7", },
{ "l4", 0x4300, "vdd_l4_l11", }, { "l2", 0x4100, "vdd_l2_l3", },
{ "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 }, { "l3", 0x4200, "vdd_l2_l3", },
{ "l6", 0x4500, "vdd_l6_l12_l14_l15", }, /* l4 is unaccessible on PM660 */
{ "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 }, { "l5", 0x4400, "vdd_l5", },
{ "l8", 0x4700, "vdd_l8_l16_l18_19", }, { "l6", 0x4500, "vdd_l1_l6_l7", },
{ "l9", 0x4800, "vdd_l9_l10_l17_l22", }, { "l7", 0x4600, "vdd_l1_l6_l7", },
{ "l10", 0x4900, "vdd_l9_l10_l17_l22", }, { "l8", 0x4700, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l11", 0x4a00, "vdd_l4_l11", }, { "l9", 0x4800, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l12", 0x4b00, "vdd_l6_l12_l14_l15", }, { "l10", 0x4900, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l13", 0x4c00, "vdd_l13_l20_l23_l24", }, { "l11", 0x4a00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l14", 0x4d00, "vdd_l6_l12_l14_l15", }, { "l12", 0x4b00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l15", 0x4e00, "vdd_l6_l12_l14_l15", }, { "l13", 0x4c00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l16", 0x4f00, "vdd_l8_l16_l18_19", }, { "l14", 0x4d00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l17", 0x5000, "vdd_l9_l10_l17_l22", }, { "l15", 0x4e00, "vdd_l15_l16_l17_l18_l19", },
{ "l18", 0x5100, "vdd_l8_l16_l18_19", }, { "l16", 0x4f00, "vdd_l15_l16_l17_l18_l19", },
{ "l19", 0x5200, "vdd_l8_l16_l18_19", }, { "l17", 0x5000, "vdd_l15_l16_l17_l18_l19", },
{ "l20", 0x5300, "vdd_l13_l20_l23_l24", }, { "l18", 0x5100, "vdd_l15_l16_l17_l18_l19", },
{ "l21", 0x5400, "vdd_l21", }, { "l19", 0x5200, "vdd_l15_l16_l17_l18_l19", },
{ "l22", 0x5500, "vdd_l9_l10_l17_l22", }, { }
{ "l23", 0x5600, "vdd_l13_l20_l23_l24", }, };
{ "l24", 0x5700, "vdd_l13_l20_l23_l24", },
{ "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", }, static const struct spmi_regulator_data pm660l_regulators[] = {
{ "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", }, { "s1", 0x1400, "vdd_s1", },
{ "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", }, { "s2", 0x1700, "vdd_s2", },
{ "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", }, { "s3", 0x1a00, "vdd_s3", },
{ "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", }, { "s4", 0x1d00, "vdd_s4", },
{ "s5", 0x2000, "vdd_s5", },
{ "l1", 0x4000, "vdd_l1_l9_l10", },
{ "l2", 0x4100, "vdd_l2", },
{ "l3", 0x4200, "vdd_l3_l5_l7_l8", },
{ "l4", 0x4300, "vdd_l4_l6", },
{ "l5", 0x4400, "vdd_l3_l5_l7_l8", },
{ "l6", 0x4500, "vdd_l4_l6", },
{ "l7", 0x4600, "vdd_l3_l5_l7_l8", },
{ "l8", 0x4700, "vdd_l3_l5_l7_l8", },
{ "l9", 0x4800, "vdd_l1_l9_l10", },
{ "l10", 0x4900, "vdd_l1_l9_l10", },
{ }
};
static const struct spmi_regulator_data pm8004_regulators[] = {
{ "s2", 0x1700, "vdd_s2", },
{ "s5", 0x2000, "vdd_s5", },
{ }
};
static const struct spmi_regulator_data pm8005_regulators[] = {
{ "s1", 0x1400, "vdd_s1", },
{ "s2", 0x1700, "vdd_s2", },
{ "s3", 0x1a00, "vdd_s3", },
{ "s4", 0x1d00, "vdd_s4", },
{ } { }
}; };
...@@ -1985,6 +2194,43 @@ static const struct spmi_regulator_data pm8916_regulators[] = { ...@@ -1985,6 +2194,43 @@ static const struct spmi_regulator_data pm8916_regulators[] = {
{ } { }
}; };
static const struct spmi_regulator_data pm8941_regulators[] = {
{ "s1", 0x1400, "vdd_s1", },
{ "s2", 0x1700, "vdd_s2", },
{ "s3", 0x1a00, "vdd_s3", },
{ "s4", 0xa000, },
{ "l1", 0x4000, "vdd_l1_l3", },
{ "l2", 0x4100, "vdd_l2_lvs_1_2_3", },
{ "l3", 0x4200, "vdd_l1_l3", },
{ "l4", 0x4300, "vdd_l4_l11", },
{ "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 },
{ "l6", 0x4500, "vdd_l6_l12_l14_l15", },
{ "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 },
{ "l8", 0x4700, "vdd_l8_l16_l18_19", },
{ "l9", 0x4800, "vdd_l9_l10_l17_l22", },
{ "l10", 0x4900, "vdd_l9_l10_l17_l22", },
{ "l11", 0x4a00, "vdd_l4_l11", },
{ "l12", 0x4b00, "vdd_l6_l12_l14_l15", },
{ "l13", 0x4c00, "vdd_l13_l20_l23_l24", },
{ "l14", 0x4d00, "vdd_l6_l12_l14_l15", },
{ "l15", 0x4e00, "vdd_l6_l12_l14_l15", },
{ "l16", 0x4f00, "vdd_l8_l16_l18_19", },
{ "l17", 0x5000, "vdd_l9_l10_l17_l22", },
{ "l18", 0x5100, "vdd_l8_l16_l18_19", },
{ "l19", 0x5200, "vdd_l8_l16_l18_19", },
{ "l20", 0x5300, "vdd_l13_l20_l23_l24", },
{ "l21", 0x5400, "vdd_l21", },
{ "l22", 0x5500, "vdd_l9_l10_l17_l22", },
{ "l23", 0x5600, "vdd_l13_l20_l23_l24", },
{ "l24", 0x5700, "vdd_l13_l20_l23_l24", },
{ "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", },
{ "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", },
{ "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", },
{ "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", },
{ "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", },
{ }
};
static const struct spmi_regulator_data pm8950_regulators[] = { static const struct spmi_regulator_data pm8950_regulators[] = {
{ "s1", 0x1400, "vdd_s1", }, { "s1", 0x1400, "vdd_s1", },
{ "s2", 0x1700, "vdd_s2", }, { "s2", 0x1700, "vdd_s2", },
...@@ -2076,69 +2322,6 @@ static const struct spmi_regulator_data pmi8994_regulators[] = { ...@@ -2076,69 +2322,6 @@ static const struct spmi_regulator_data pmi8994_regulators[] = {
{ } { }
}; };
static const struct spmi_regulator_data pm660_regulators[] = {
{ "s1", 0x1400, "vdd_s1", },
{ "s2", 0x1700, "vdd_s2", },
{ "s3", 0x1a00, "vdd_s3", },
{ "s4", 0x1d00, "vdd_s3", },
{ "s5", 0x2000, "vdd_s5", },
{ "s6", 0x2300, "vdd_s6", },
{ "l1", 0x4000, "vdd_l1_l6_l7", },
{ "l2", 0x4100, "vdd_l2_l3", },
{ "l3", 0x4200, "vdd_l2_l3", },
/* l4 is unaccessible on PM660 */
{ "l5", 0x4400, "vdd_l5", },
{ "l6", 0x4500, "vdd_l1_l6_l7", },
{ "l7", 0x4600, "vdd_l1_l6_l7", },
{ "l8", 0x4700, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l9", 0x4800, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l10", 0x4900, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l11", 0x4a00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l12", 0x4b00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l13", 0x4c00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l14", 0x4d00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
{ "l15", 0x4e00, "vdd_l15_l16_l17_l18_l19", },
{ "l16", 0x4f00, "vdd_l15_l16_l17_l18_l19", },
{ "l17", 0x5000, "vdd_l15_l16_l17_l18_l19", },
{ "l18", 0x5100, "vdd_l15_l16_l17_l18_l19", },
{ "l19", 0x5200, "vdd_l15_l16_l17_l18_l19", },
{ }
};
static const struct spmi_regulator_data pm660l_regulators[] = {
{ "s1", 0x1400, "vdd_s1", },
{ "s2", 0x1700, "vdd_s2", },
{ "s3", 0x1a00, "vdd_s3", },
{ "s4", 0x1d00, "vdd_s4", },
{ "s5", 0x2000, "vdd_s5", },
{ "l1", 0x4000, "vdd_l1_l9_l10", },
{ "l2", 0x4100, "vdd_l2", },
{ "l3", 0x4200, "vdd_l3_l5_l7_l8", },
{ "l4", 0x4300, "vdd_l4_l6", },
{ "l5", 0x4400, "vdd_l3_l5_l7_l8", },
{ "l6", 0x4500, "vdd_l4_l6", },
{ "l7", 0x4600, "vdd_l3_l5_l7_l8", },
{ "l8", 0x4700, "vdd_l3_l5_l7_l8", },
{ "l9", 0x4800, "vdd_l1_l9_l10", },
{ "l10", 0x4900, "vdd_l1_l9_l10", },
{ }
};
static const struct spmi_regulator_data pm8004_regulators[] = {
{ "s2", 0x1700, "vdd_s2", },
{ "s5", 0x2000, "vdd_s5", },
{ }
};
static const struct spmi_regulator_data pm8005_regulators[] = {
{ "s1", 0x1400, "vdd_s1", },
{ "s2", 0x1700, "vdd_s2", },
{ "s3", 0x1a00, "vdd_s3", },
{ "s4", 0x1d00, "vdd_s4", },
{ }
};
static const struct spmi_regulator_data pmp8074_regulators[] = { static const struct spmi_regulator_data pmp8074_regulators[] = {
{ "s1", 0x1400, "vdd_s1"}, { "s1", 0x1400, "vdd_s1"},
{ "s2", 0x1700, "vdd_s2"}, { "s2", 0x1700, "vdd_s2"},
...@@ -2167,6 +2350,9 @@ static const struct spmi_regulator_data pms405_regulators[] = { ...@@ -2167,6 +2350,9 @@ static const struct spmi_regulator_data pms405_regulators[] = {
}; };
static const struct of_device_id qcom_spmi_regulator_match[] = { static const struct of_device_id qcom_spmi_regulator_match[] = {
{ .compatible = "qcom,pm6125-regulators", .data = &pm6125_regulators },
{ .compatible = "qcom,pm660-regulators", .data = &pm660_regulators },
{ .compatible = "qcom,pm660l-regulators", .data = &pm660l_regulators },
{ .compatible = "qcom,pm8004-regulators", .data = &pm8004_regulators }, { .compatible = "qcom,pm8004-regulators", .data = &pm8004_regulators },
{ .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators }, { .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators },
{ .compatible = "qcom,pm8226-regulators", .data = &pm8226_regulators }, { .compatible = "qcom,pm8226-regulators", .data = &pm8226_regulators },
...@@ -2176,8 +2362,6 @@ static const struct of_device_id qcom_spmi_regulator_match[] = { ...@@ -2176,8 +2362,6 @@ static const struct of_device_id qcom_spmi_regulator_match[] = {
{ .compatible = "qcom,pm8950-regulators", .data = &pm8950_regulators }, { .compatible = "qcom,pm8950-regulators", .data = &pm8950_regulators },
{ .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators }, { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators },
{ .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators }, { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators },
{ .compatible = "qcom,pm660-regulators", .data = &pm660_regulators },
{ .compatible = "qcom,pm660l-regulators", .data = &pm660l_regulators },
{ .compatible = "qcom,pmp8074-regulators", .data = &pmp8074_regulators }, { .compatible = "qcom,pmp8074-regulators", .data = &pmp8074_regulators },
{ .compatible = "qcom,pms405-regulators", .data = &pms405_regulators }, { .compatible = "qcom,pms405-regulators", .data = &pms405_regulators },
{ } { }
......
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