Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk

into home.osdl.org:/home/torvalds/v2.5/linux

arch/arm/Kconfig

@@ -616,6 +616,8 @@ source "drivers/ide/Kconfig"
 
 source "drivers/scsi/Kconfig"
 
+source "drivers/message/fusion/Kconfig"
+
 source "drivers/ieee1394/Kconfig"
 
 source "drivers/message/i2o/Kconfig"
@@ -629,6 +631,10 @@ source "drivers/input/Kconfig"
 
 source "drivers/char/Kconfig"
 
+source "drivers/i2c/Kconfig"
+
+source "drivers/l3/Kconfig"
+
 source "drivers/media/Kconfig"
 
 source "fs/Kconfig"

arch/arm/common/amba.c

@@ -12,6 +12,7 @@
 #include <linux/device.h>
 
 #include <asm/io.h>
+#include <asm/irq.h>
 #include <asm/hardware/amba.h>
 #include <asm/sizes.h>
 
@@ -41,6 +42,23 @@ static int amba_match(struct device *dev, struct device_driver *drv)
 	return amba_lookup(pcdrv->id_table, pcdev) != NULL;
 }
 
+#ifdef CONFIG_HOTPLUG
+static int amba_hotplug(struct device *dev, char **envp, int nr_env, char *buf, int bufsz)
+{
+	struct amba_device *pcdev = to_amba_device(dev);
+
+	if (nr_env < 2)
+		return -ENOMEM;
+
+	snprintf(buf, bufsz, "AMBA_ID=%08lx", pcdev->periphid);
+	*envp++ = buf;
+	*envp++ = NULL;
+	return 0;
+}
+#else
+#define amba_hotplug NULL
+#endif
+
 static int amba_suspend(struct device *dev, u32 state)
 {
 	struct amba_driver *drv = to_amba_driver(dev->driver);
@@ -68,6 +86,7 @@ static int amba_resume(struct device *dev)
 static struct bus_type amba_bustype = {
 	.name		= "amba",
 	.match		= amba_match,
+	.hotplug	= amba_hotplug,
 	.suspend	= amba_suspend,
 	.resume		= amba_resume,
 };
@@ -149,27 +168,19 @@ static void amba_device_release(struct device *dev)
 	kfree(d);
 }
 
-static ssize_t show_id(struct device *_dev, char *buf)
-{
-	struct amba_device *dev = to_amba_device(_dev);
-	return sprintf(buf, "%08x\n", dev->periphid);
-}
-static DEVICE_ATTR(id, S_IRUGO, show_id, NULL);
-
-static ssize_t show_irq(struct device *_dev, char *buf)
-{
-	struct amba_device *dev = to_amba_device(_dev);
-	return sprintf(buf, "%u\n", dev->irq);
-}
-static DEVICE_ATTR(irq, S_IRUGO, show_irq, NULL);
-
-static ssize_t show_res(struct device *_dev, char *buf)
-{
-	struct amba_device *dev = to_amba_device(_dev);
-	return sprintf(buf, "\t%08lx\t%08lx\t%08lx\n",
+#define amba_attr(name,fmt,arg...)				\
+static ssize_t show_##name(struct device *_dev, char *buf)	\
+{								\
+	struct amba_device *dev = to_amba_device(_dev);		\
+	return sprintf(buf, fmt, arg);				\
+}								\
+static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL)
+
+amba_attr(id, "%08x\n", dev->periphid);
+amba_attr(irq0, "%u\n", dev->irq[0]);
+amba_attr(irq1, "%u\n", dev->irq[1]);
+amba_attr(resource, "\t%08lx\t%08lx\t%08lx\n",
 	  dev->res.start, dev->res.end, dev->res.flags);
-}
-static DEVICE_ATTR(resource, S_IRUGO, show_res, NULL);
 
 /**
  *	amba_device_register - register an AMBA device
@@ -208,10 +219,17 @@ int amba_device_register(struct amba_device *dev, struct resource *parent)
 		if (cid == 0xb105f00d)
 			dev->periphid = pid;
 
+		if (dev->periphid)
 			ret = device_register(&dev->dev);
+		else
+			ret = -ENODEV;
+
 		if (ret == 0) {
 			device_create_file(&dev->dev, &dev_attr_id);
-			device_create_file(&dev->dev, &dev_attr_irq);
+			if (dev->irq[0] != NO_IRQ)
+				device_create_file(&dev->dev, &dev_attr_irq0);
+			if (dev->irq[1] != NO_IRQ)
+				device_create_file(&dev->dev, &dev_attr_irq1);
 			device_create_file(&dev->dev, &dev_attr_resource);
 		} else {
  out:
@@ -237,7 +255,85 @@ void amba_device_unregister(struct amba_device *dev)
 	device_unregister(&dev->dev);
 }
 
+
+struct find_data {
+	struct amba_device *dev;
+	struct device *parent;
+	const char *busid;
+	unsigned int id;
+	unsigned int mask;
+};
+
+static int amba_find_match(struct device *dev, void *data)
+{
+	struct find_data *d = data;
+	struct amba_device *pcdev = to_amba_device(dev);
+	int r;
+
+	r = (pcdev->periphid & d->mask) == d->id;
+	if (d->parent)
+		r &= d->parent == dev->parent;
+	if (d->busid)
+		r &= strcmp(dev->bus_id, d->busid) == 0;
+
+	if (r) {
+		get_device(dev);
+		d->dev = pcdev;
+	}
+
+	return r;
+}
+
+/**
+ *	amba_find_device - locate an AMBA device given a bus id
+ *	@busid: bus id for device (or NULL)
+ *	@parent: parent device (or NULL)
+ *	@id: peripheral ID (or 0)
+ *	@mask: peripheral ID mask (or 0)
+ *
+ *	Return the AMBA device corresponding to the supplied parameters.
+ *	If no device matches, returns NULL.
+ *
+ *	NOTE: When a valid device is found, its refcount is
+ *	incremented, and must be decremented before the returned
+ *	reference.
+ */
+struct amba_device *
+amba_find_device(const char *busid, struct device *parent, unsigned int id,
+		 unsigned int mask)
+{
+	struct find_data data;
+
+	data.dev = NULL;
+	data.parent = parent;
+	data.busid = busid;
+	data.id = id;
+	data.mask = mask;
+
+	bus_for_each_dev(&amba_bustype, NULL, &data, amba_find_match);
+
+	return data.dev;
+}
+
+int amba_request_regions(struct amba_device *dev, const char *name)
+{
+	int ret = 0;
+
+	if (!request_mem_region(dev->res.start, SZ_4K, name))
+		ret = -EBUSY;
+
+	return ret;
+}
+
+void amba_release_regions(struct amba_device *dev)
+{
+	release_mem_region(dev->res.start, SZ_4K);
+}
+
 EXPORT_SYMBOL(amba_driver_register);
 EXPORT_SYMBOL(amba_driver_unregister);
 EXPORT_SYMBOL(amba_device_register);
 EXPORT_SYMBOL(amba_device_unregister);
+EXPORT_SYMBOL(amba_find_device);
+EXPORT_SYMBOL(amba_request_regions);
+EXPORT_SYMBOL(amba_release_regions);

arch/arm/kernel/calls.S

@@ -285,6 +285,9 @@ __syscall_start:
 		.long	sys_tgkill
 		.long	sys_utimes
 /* 270 */	.long	sys_fadvise64_64
+		.long	sys_pciconfig_iobase
+		.long	sys_pciconfig_read
+		.long	sys_pciconfig_write
 __syscall_end:
 
 		.rept	NR_syscalls - (__syscall_end - __syscall_start) / 4

arch/arm/kernel/vmlinux.lds.S

@@ -102,6 +102,12 @@ SECTIONS
 		 */
 		*(.init.task)
 
+		. = ALIGN(4096);
+		__nosave_begin = .;
+		*(.data.nosave)
+		. = ALIGN(4096);
+		__nosave_end = .;
+
 		/*
 		 * then the cacheline aligned data
 		 */

arch/arm/mach-integrator/Kconfig

@@ -7,6 +7,15 @@ config ARCH_INTEGRATOR_AP
 	  Include support for the ARM(R) Integrator/AP and
 	  Integrator/PP2 platforms.
 
+config ARCH_INTEGRATOR_CP
+	bool "Support Integrator/CP platform"
+	select ARCH_CINTEGRATOR
+	help
+	  Include support for the ARM(R) Integrator CP platform.
+
+config ARCH_CINTEGRATOR
+	bool
+
 config INTEGRATOR_IMPD1
 	tristate "Include support for Integrator/IM-PD1"
 	depends on ARCH_INTEGRATOR_AP

arch/arm/mach-integrator/Makefile

@@ -6,6 +6,7 @@
 
 obj-y					:= core.o lm.o time.o
 obj-$(CONFIG_ARCH_INTEGRATOR_AP)	+= integrator_ap.o
+obj-$(CONFIG_ARCH_INTEGRATOR_CP)	+= integrator_cp.o
 
 obj-$(CONFIG_LEDS)			+= leds.o
 obj-$(CONFIG_PCI)			+= pci_v3.o pci.o

arch/arm/mach-integrator/core.c

@@ -11,10 +11,13 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/device.h>
+#include <linux/spinlock.h>
 
 #include <asm/hardware.h>
 #include <asm/irq.h>
+#include <asm/io.h>
 #include <asm/hardware/amba.h>
+#include <asm/arch/cm.h>
 
 static struct amba_device rtc_device = {
 	.dev		= {
@@ -25,7 +28,7 @@ static struct amba_device rtc_device = {
 		.end	= INTEGRATOR_RTC_BASE + SZ_4K - 1,
 		.flags	= IORESOURCE_MEM,
 	},
-	.irq		= IRQ_RTCINT,
+	.irq		= { IRQ_RTCINT, NO_IRQ },
 	.periphid	= 0x00041030,
 };
 
@@ -38,7 +41,7 @@ static struct amba_device uart0_device = {
 		.end	= INTEGRATOR_UART0_BASE + SZ_4K - 1,
 		.flags	= IORESOURCE_MEM,
 	},
-	.irq		= IRQ_UARTINT0,
+	.irq		= { IRQ_UARTINT0, NO_IRQ },
 	.periphid	= 0x0041010,
 };
 
@@ -51,7 +54,7 @@ static struct amba_device uart1_device = {
 		.end	= INTEGRATOR_UART1_BASE + SZ_4K - 1,
 		.flags	= IORESOURCE_MEM,
 	},
-	.irq		= IRQ_UARTINT1,
+	.irq		= { IRQ_UARTINT1, NO_IRQ },
 	.periphid	= 0x0041010,
 };
 
@@ -64,7 +67,7 @@ static struct amba_device kmi0_device = {
 		.end	= KMI0_BASE + SZ_4K - 1,
 		.flags	= IORESOURCE_MEM,
 	},
-	.irq		= IRQ_KMIINT0,
+	.irq		= { IRQ_KMIINT0, NO_IRQ },
 	.periphid	= 0x00041050,
 };
 
@@ -77,7 +80,7 @@ static struct amba_device kmi1_device = {
 		.end	= KMI1_BASE + SZ_4K - 1,
 		.flags	= IORESOURCE_MEM,
 	},
-	.irq		= IRQ_KMIINT1,
+	.irq		= { IRQ_KMIINT1, NO_IRQ },
 	.periphid	= 0x00041050,
 };
 
@@ -102,3 +105,25 @@ static int __init integrator_init(void)
 }
 
 arch_initcall(integrator_init);
+
+#define CM_CTRL	IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET
+
+static spinlock_t cm_lock;
+
+/**
+ * cm_control - update the CM_CTRL register.
+ * @mask: bits to change
+ * @set: bits to set
+ */
+void cm_control(u32 mask, u32 set)
+{
+	unsigned long flags;
+	u32 val;
+
+	spin_lock_irqsave(&cm_lock, flags);
+	val = readl(CM_CTRL) & ~mask;
+	writel(val | set, CM_CTRL);
+	spin_unlock_irqrestore(&cm_lock, flags);
+}
+
+EXPORT_SYMBOL(cm_control);

arch/arm/mach-integrator/cpu.c

@@ -22,6 +22,7 @@
 
 #include <asm/hardware.h>
 #include <asm/io.h>
+#include <asm/mach-types.h>
 #include <asm/hardware/icst525.h>
 
 static struct cpufreq_driver integrator_driver;
@@ -98,7 +99,12 @@ static int integrator_set_target(struct cpufreq_policy *policy,
 
 	/* get current setting */
 	cm_osc = __raw_readl(CM_OSC);
+
+	if (machine_is_integrator()) {
 		vco.s = (cm_osc >> 8) & 7;
+	} else if (machine_is_cintegrator()) {
+		vco.s = 1;
+	}
 	vco.v = cm_osc & 255;
 	vco.r = 22;
 	freqs.old = icst525_khz(&cclk_params, vco);
@@ -107,7 +113,7 @@ static int integrator_set_target(struct cpufreq_policy *policy,
 	 * larger freq in case of CPUFREQ_RELATION_L.
 	 */
 	if (relation == CPUFREQ_RELATION_L)
-		target_freq += 1999;
+		target_freq += 999;
 	if (target_freq > policy->max)
 		target_freq = policy->max;
 	vco = icst525_khz_to_vco(&cclk_params, target_freq);
@@ -123,8 +129,14 @@ static int integrator_set_target(struct cpufreq_policy *policy,
 	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 
 	cm_osc = __raw_readl(CM_OSC);
+
+	if (machine_is_integrator()) {
 		cm_osc &= 0xfffff800;
-	cm_osc |= vco.v | vco.s << 8;
+		cm_osc |= vco.s << 8;
+	} else if (machine_is_cintegrator()) {
+		cm_osc &= 0xffffff00;
+	}
+	cm_osc |= vco.v;
 
 	__raw_writel(0xa05f, CM_LOCK);
 	__raw_writel(cm_osc, CM_OSC);
@@ -144,7 +156,7 @@ static int integrator_cpufreq_init(struct cpufreq_policy *policy)
 {
 	unsigned long cpus_allowed;
 	unsigned int cpu = policy->cpu;
-	u_int cm_osc, cm_stat, mem_freq_khz;
+	u_int cm_osc;
 	struct icst525_vco vco;
 
 	cpus_allowed = current->cpus_allowed;
@@ -153,18 +165,13 @@ static int integrator_cpufreq_init(struct cpufreq_policy *policy)
 	BUG_ON(cpu != smp_processor_id());
 
 	/* detect memory etc. */
-	cm_stat = __raw_readl(CM_STAT);
 	cm_osc = __raw_readl(CM_OSC);
-	vco.s = (cm_osc >> 20) & 7;
-	vco.v = (cm_osc >> 12) & 255;
-	vco.r = 22;
-	mem_freq_khz = icst525_khz(&lclk_params, vco) / 2;
-
-	printk(KERN_INFO "CPU%d: Module id: %d\n", cpu, cm_stat & 255);
-	printk(KERN_INFO "CPU%d: Memory clock = %d.%03d MHz\n",
-	       cpu, mem_freq_khz / 1000, mem_freq_khz % 1000);
 
+	if (machine_is_integrator()) {
 		vco.s = (cm_osc >> 8) & 7;
+	} else if (machine_is_cintegrator()) {
+		vco.s = 1;
+	}
 	vco.v = cm_osc & 255;
 	vco.r = 22;
 

arch/arm/mach-integrator/impd1.c

@@ -188,7 +188,8 @@ static int impd1_probe(struct lm_device *dev)
 		d->res.start	= dev->resource.start + idev->offset;
 		d->res.end	= d->res.start + SZ_4K - 1;
 		d->res.flags	= IORESOURCE_MEM;
-		d->irq		= dev->irq;
+		d->irq[0]	= dev->irq;
+		d->irq[1]	= dev->irq;
 		d->periphid	= idev->id;
 
 		ret = amba_device_register(d, &dev->resource);

arch/arm/mach-integrator/integrator_ap.c

@@ -251,7 +251,7 @@ static struct platform_device cfi_flash_device = {
 	.resource	= &cfi_flash_resource,
 };
 
-static int __init ap_init(void)
+static void __init ap_init(void)
 {
 	unsigned long sc_dec;
 	int i;
@@ -279,16 +279,13 @@ static int __init ap_init(void)
 
 		lm_device_register(lmdev);
 	}
-
-	return 0;
 }
 
-arch_initcall(ap_init);
-
 MACHINE_START(INTEGRATOR, "ARM-Integrator")
 	MAINTAINER("ARM Ltd/Deep Blue Solutions Ltd")
 	BOOT_MEM(0x00000000, 0x16000000, 0xf1600000)
 	BOOT_PARAMS(0x00000100)
 	MAPIO(ap_map_io)
 	INITIRQ(ap_init_irq)
+	INIT_MACHINE(ap_init)
 MACHINE_END

arch/arm/mach-integrator/integrator_cp.c

+/*
+ *  linux/arch/arm/mach-integrator/integrator_cp.c
+ *
+ *  Copyright (C) 2003 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/device.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/sysdev.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/amba.h>
+#include <asm/hardware/amba_kmi.h>
+
+#include <asm/arch/lm.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/flash.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/mmc.h>
+#include <asm/mach/map.h>
+
+#define INTCP_PA_MMC_BASE		0x1c000000
+#define INTCP_PA_AACI_BASE		0x1d000000
+
+#define INTCP_PA_FLASH_BASE		0x24000000
+#define INTCP_FLASH_SIZE		SZ_32M
+
+#define INTCP_VA_CIC_BASE		0xf1000040
+#define INTCP_VA_PIC_BASE		0xf1400000
+#define INTCP_VA_SIC_BASE		0xfca00000
+
+#define INTCP_PA_ETH_BASE		0xc8000000
+#define INTCP_ETH_SIZE			0x10
+
+#define INTCP_VA_CTRL_BASE		0xfcb00000
+#define INTCP_FLASHPROG			0x04
+#define CINTEGRATOR_FLASHPROG_FLVPPEN	(1 << 0)
+#define CINTEGRATOR_FLASHPROG_FLWREN	(1 << 1)
+
+/*
+ * Logical      Physical
+ * f1000000	10000000	Core module registers
+ * f1100000	11000000	System controller registers
+ * f1200000	12000000	EBI registers
+ * f1300000	13000000	Counter/Timer
+ * f1400000	14000000	Interrupt controller
+ * f1600000	16000000	UART 0
+ * f1700000	17000000	UART 1
+ * f1a00000	1a000000	Debug LEDs
+ * f1b00000	1b000000	GPIO
+ */
+
+static struct map_desc intcp_io_desc[] __initdata = {
+ { IO_ADDRESS(INTEGRATOR_HDR_BASE),   INTEGRATOR_HDR_BASE,   SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(INTEGRATOR_SC_BASE),    INTEGRATOR_SC_BASE,    SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(INTEGRATOR_EBI_BASE),   INTEGRATOR_EBI_BASE,   SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(INTEGRATOR_CT_BASE),    INTEGRATOR_CT_BASE,    SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(INTEGRATOR_IC_BASE),    INTEGRATOR_IC_BASE,    SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(INTEGRATOR_DBG_BASE),   INTEGRATOR_DBG_BASE,   SZ_4K,  MT_DEVICE },
+ { IO_ADDRESS(INTEGRATOR_GPIO_BASE),  INTEGRATOR_GPIO_BASE,  SZ_4K,  MT_DEVICE },
+ { 0xfc900000, 0xc9000000, SZ_4K, MT_DEVICE },
+ { 0xfca00000, 0xca000000, SZ_4K, MT_DEVICE },
+ { 0xfcb00000, 0xcb000000, SZ_4K, MT_DEVICE },
+};
+
+static void __init intcp_map_io(void)
+{
+	iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));
+}
+
+#define cic_writel	__raw_writel
+#define cic_readl	__raw_readl
+#define pic_writel	__raw_writel
+#define pic_readl	__raw_readl
+#define sic_writel	__raw_writel
+#define sic_readl	__raw_readl
+
+static void cic_mask_irq(unsigned int irq)
+{
+	irq -= IRQ_CIC_START;
+	cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
+}
+
+static void cic_unmask_irq(unsigned int irq)
+{
+	irq -= IRQ_CIC_START;
+	cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET);
+}
+
+static struct irqchip cic_chip = {
+	.ack	= cic_mask_irq,
+	.mask	= cic_mask_irq,
+	.unmask	= cic_unmask_irq,
+};
+
+static void pic_mask_irq(unsigned int irq)
+{
+	irq -= IRQ_PIC_START;
+	pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
+}
+
+static void pic_unmask_irq(unsigned int irq)
+{
+	irq -= IRQ_PIC_START;
+	pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET);
+}
+
+static struct irqchip pic_chip = {
+	.ack	= pic_mask_irq,
+	.mask	= pic_mask_irq,
+	.unmask = pic_unmask_irq,
+};
+
+static void sic_mask_irq(unsigned int irq)
+{
+	irq -= IRQ_SIC_START;
+	sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
+}
+
+static void sic_unmask_irq(unsigned int irq)
+{
+	irq -= IRQ_SIC_START;
+	sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET);
+}
+
+static struct irqchip sic_chip = {
+	.ack	= sic_mask_irq,
+	.mask	= sic_mask_irq,
+	.unmask	= sic_unmask_irq,
+};
+
+static void
+sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
+{
+	unsigned long status = sic_readl(INTCP_VA_SIC_BASE + IRQ_STATUS);
+
+	if (status == 0) {
+		do_bad_IRQ(irq, desc, regs);
+		return;
+	}
+
+	do {
+		irq = ffs(status) - 1;
+		status &= ~(1 << irq);
+
+		irq += IRQ_SIC_START;
+
+		desc = irq_desc + irq;
+		desc->handle(irq, desc, regs);
+	} while (status);
+}
+
+static void __init intcp_init_irq(void)
+{
+	unsigned int i;
+
+	/*
+	 * Disable all interrupt sources
+	 */
+	pic_writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
+	pic_writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR);
+
+	for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) {
+		if (i == 11)
+			i = 22;
+		if (i == IRQ_CP_CPPLDINT)
+			i++;
+		if (i == 29)
+			break;
+		set_irq_chip(i, &pic_chip);
+		set_irq_handler(i, do_level_IRQ);
+		set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+	}
+
+	cic_writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
+	cic_writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
+
+	for (i = IRQ_CIC_START; i <= IRQ_CIC_END; i++) {
+		set_irq_chip(i, &cic_chip);
+		set_irq_handler(i, do_level_IRQ);
+		set_irq_flags(i, IRQF_VALID);
+	}
+
+	sic_writel(0x00000fff, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
+	sic_writel(0x00000fff, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
+
+	for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) {
+		set_irq_chip(i, &sic_chip);
+		set_irq_handler(i, do_level_IRQ);
+		set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+	}
+
+	set_irq_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
+	pic_unmask_irq(IRQ_CP_CPPLDINT);
+}
+
+/*
+ * Flash handling.
+ */
+static int intcp_flash_init(void)
+{
+	u32 val;
+
+	val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+	val |= CINTEGRATOR_FLASHPROG_FLWREN;
+	writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+
+	return 0;
+}
+
+static void intcp_flash_exit(void)
+{
+	u32 val;
+
+	val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+	val &= ~(CINTEGRATOR_FLASHPROG_FLVPPEN|CINTEGRATOR_FLASHPROG_FLWREN);
+	writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+}
+
+static void intcp_flash_set_vpp(int on)
+{
+	u32 val;
+
+	val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+	if (on)
+		val |= CINTEGRATOR_FLASHPROG_FLVPPEN;
+	else
+		val &= ~CINTEGRATOR_FLASHPROG_FLVPPEN;
+	writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+}
+
+static struct flash_platform_data intcp_flash_data = {
+	.map_name	= "cfi_probe",
+	.width		= 4,
+	.init		= intcp_flash_init,
+	.exit		= intcp_flash_exit,
+	.set_vpp	= intcp_flash_set_vpp,
+};
+
+static struct resource intcp_flash_resource = {
+	.start		= INTCP_PA_FLASH_BASE,
+	.end		= INTCP_PA_FLASH_BASE + INTCP_FLASH_SIZE - 1,
+	.flags		= IORESOURCE_MEM,
+};
+
+static struct platform_device intcp_flash_device = {
+	.name		= "armflash",
+	.id		= 0,
+	.dev		= {
+		.platform_data	= &intcp_flash_data,
+	},
+	.num_resources	= 1,
+	.resource	= &intcp_flash_resource,
+};
+
+static struct resource smc91x_resources[] = {
+	[0] = {
+		.start	= INTCP_PA_ETH_BASE,
+		.end	= INTCP_PA_ETH_BASE + INTCP_ETH_SIZE - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_CP_ETHINT,
+		.end	= IRQ_CP_ETHINT,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device smc91x_device = {
+	.name		= "smc91x",
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(smc91x_resources),
+	.resource	= smc91x_resources,
+};
+
+static struct platform_device *intcp_devs[] __initdata = {
+	&intcp_flash_device,
+	&smc91x_device,
+};
+
+/*
+ * It seems that the card insertion interrupt remains active after
+ * we've acknowledged it.  We therefore ignore the interrupt, and
+ * rely on reading it from the SIC.  This also means that we must
+ * clear the latched interrupt.
+ */
+static unsigned int mmc_status(struct device *dev)
+{
+	unsigned int status = readl(0xfca00004);
+	writel(8, 0xfcb00008);
+
+	return status & 8;
+}
+
+static struct mmc_platform_data mmc_data = {
+	.mclk		= 33000000,
+	.ocr_mask	= MMC_VDD_32_33|MMC_VDD_33_34,
+	.status		= mmc_status,
+};
+
+static struct amba_device mmc_device = {
+	.dev		= {
+		.bus_id	= "mb:1c",
+		.platform_data = &mmc_data,
+	},
+	.res		= {
+		.start	= INTCP_PA_MMC_BASE,
+		.end	= INTCP_PA_MMC_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	.irq		= { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 },
+	.periphid	= 0,
+};
+
+static struct amba_device aaci_device = {
+	.dev		= {
+		.bus_id	= "mb:1d",
+	},
+	.res		= {
+		.start	= INTCP_PA_AACI_BASE,
+		.end	= INTCP_PA_AACI_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	.irq		= { IRQ_CP_AACIINT, NO_IRQ },
+	.periphid	= 0,
+};
+
+static struct amba_device *amba_devs[] __initdata = {
+	&mmc_device,
+	&aaci_device,
+};
+
+static void __init intcp_init(void)
+{
+	int i;
+
+	platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
+
+	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+		struct amba_device *d = amba_devs[i];
+		amba_device_register(d, &iomem_resource);
+	}
+}
+
+MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
+	MAINTAINER("ARM Ltd/Deep Blue Solutions Ltd")
+	BOOT_MEM(0x00000000, 0x16000000, 0xf1600000)
+	BOOT_PARAMS(0x00000100)
+	MAPIO(intcp_map_io)
+	INITIRQ(intcp_init_irq)
+	INIT_MACHINE(intcp_init)
+MACHINE_END

arch/arm/mach-integrator/leds.c

 /*
  *  linux/arch/arm/mach-integrator/leds.c
  *
- *  Integrator LED control routines
+ *  Integrator/AP and Integrator/CP LED control routines
  *
  *  Copyright (C) 1999 ARM Limited
  *  Copyright (C) 2000 Deep Blue Solutions Ltd
@@ -28,6 +28,7 @@
 #include <asm/leds.h>
 #include <asm/system.h>
 #include <asm/mach-types.h>
+#include <asm/arch/cm.h>
 
 static int saved_leds;
 
@@ -35,9 +36,6 @@ static void integrator_leds_event(led_event_t ledevt)
 {
 	unsigned long flags;
 	const unsigned int dbg_base = IO_ADDRESS(INTEGRATOR_DBG_BASE);
-	const unsigned int hdr_ctrl = IO_ADDRESS(INTEGRATOR_HDR_BASE) +
-					INTEGRATOR_HDR_CTRL_OFFSET;
-	unsigned int ctrl;
 	unsigned int update_alpha_leds;
 	
 	// yup, change the LEDs
@@ -46,15 +44,11 @@ static void integrator_leds_event(led_event_t ledevt)
 
 	switch(ledevt) {
 	case led_idle_start:
-		ctrl = __raw_readl(hdr_ctrl);
-		ctrl &= ~INTEGRATOR_HDR_CTRL_LED;
-		__raw_writel(ctrl, hdr_ctrl);
+		cm_control(CM_CTRL_LED, 0);
 		break;
 
 	case led_idle_end:
-		ctrl = __raw_readl(hdr_ctrl);
-		ctrl |= INTEGRATOR_HDR_CTRL_LED;
-		__raw_writel(ctrl, hdr_ctrl);
+		cm_control(CM_CTRL_LED, CM_CTRL_LED);
 		break;
 
 	case led_timer:
@@ -85,7 +79,7 @@ static void integrator_leds_event(led_event_t ledevt)
 
 static int __init leds_init(void)
 {
-	if (machine_is_integrator())
+	if (machine_is_integrator() || machine_is_cintegrator())
 		leds_event = integrator_leds_event;
 
 	return 0;

arch/arm/mach-pxa/lubbock.c

@@ -119,8 +119,34 @@ static struct platform_device sa1111_device = {
 	.resource	= sa1111_resources,
 };
 
+static struct resource smc91x_resources[] = {
+	[0] = {
+		.start	= 0x0c000000,
+		.end	= 0x0c0fffff,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= LUBBOCK_ETH_IRQ,
+		.end	= LUBBOCK_ETH_IRQ,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[2] = {
+		.start	= 0x0e000000,
+		.end	= 0x0e0fffff,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device smc91x_device = {
+	.name		= "smc91x",
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(smc91x_resources),
+	.resource	= smc91x_resources,
+};
+
 static struct platform_device *devices[] __initdata = {
 	&sa1111_device,
+	&smc91x_device,
 };
 
 static void __init lubbock_init(void)

arch/arm/mach-sa1100/assabet.c

@@ -92,11 +92,8 @@ static void assabet_lcd_power(int on)
 		ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
 }
 
-static int __init assabet_init(void)
+static void __init assabet_init(void)
 {
-	if (!machine_is_assabet())
-		return -EINVAL;
-
 	/*
 	 * Ensure that the power supply is in "high power" mode.
 	 */
@@ -139,13 +136,8 @@ static int __init assabet_init(void)
 			"hasn't been configured in the kernel\n" );
 #endif
 	}
-
-	return 0;
 }
 
-arch_initcall(assabet_init);
-
-
 /*
  * On Assabet, we must probe for the Neponset board _before_
  * paging_init() has occurred to actually determine the amount
@@ -332,4 +324,5 @@ MACHINE_START(ASSABET, "Intel-Assabet")
 	FIXUP(fixup_assabet)
 	MAPIO(assabet_map_io)
 	INITIRQ(sa1100_init_irq)
+	INIT_MACHINE(assabet_init)
 MACHINE_END

arch/arm/mach-sa1100/neponset.c

@@ -256,9 +256,35 @@ static struct platform_device sa1111_device = {
 	.resource	= sa1111_resources,
 };
 
+static struct resource smc91x_resources[] = {
+	[0] = {
+		.start	= SA1100_CS3_PHYS,
+		.end	= SA1100_CS3_PHYS + 0x01ffffff,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_NEPONSET_SMC9196,
+		.end	= IRQ_NEPONSET_SMC9196,
+		.flags	= IORESOURCE_IRQ,
+	},
+	[2] = {
+		.start	= SA1100_CS3_PHYS + 0x02000000,
+		.end	= SA1100_CS3_PHYS + 0x03ffffff,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device smc91x_device = {
+	.name		= "smc91x",
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(smc91x_resources),
+	.resource	= smc91x_resources,
+};
+
 static struct platform_device *devices[] __initdata = {
 	&neponset_device,
 	&sa1111_device,
+	&smc91x_device,
 };
 
 static int __init neponset_init(void)

include/asm-arm/arch-integrator/cm.h

+/*
+ * update the core module control register.
+ */
+void cm_control(u32, u32);
+
+#define CM_CTRL_LED			(1 << 0)
+#define CM_CTRL_nMBDET			(1 << 1)
+#define CM_CTRL_REMAP			(1 << 2)
+#define CM_CTRL_RESET			(1 << 3)
+
+/*
+ * Integrator/AP,PP2 specific
+ */
+#define CM_CTRL_HIGHVECTORS		(1 << 4)
+#define CM_CTRL_BIGENDIAN		(1 << 5)
+#define CM_CTRL_FASTBUS			(1 << 6)
+#define CM_CTRL_SYNC			(1 << 7)
+
+/*
+ * ARM926/946/966 Integrator/CP specific
+ */
+#define CM_CTRL_LCDBIASEN		(1 << 8)
+#define CM_CTRL_LCDBIASUP		(1 << 9)
+#define CM_CTRL_LCDBIASDN		(1 << 10)
+#define CM_CTRL_LCDMUXSEL_MASK		(7 << 11)
+#define CM_CTRL_LCDMUXSEL_GENLCD	(1 << 11)
+#define CM_CTRL_LCDMUXSEL_SHARPLCD1	(3 << 11)
+#define CM_CTRL_LCDMUXSEL_SHARPLCD2	(4 << 11)
+#define CM_CTRL_LCDMUXSEL_VGA		(7 << 11)
+#define CM_CTRL_LCDEN0			(1 << 14)
+#define CM_CTRL_LCDEN1			(1 << 15)
+#define CM_CTRL_STATIC1			(1 << 16)
+#define CM_CTRL_STATIC2			(1 << 17)
+#define CM_CTRL_STATIC			(1 << 18)
+#define CM_CTRL_n24BITEN		(1 << 19)
+#define CM_CTRL_EBIWP			(1 << 20)

include/asm-arm/arch-integrator/irqs.h

@@ -45,6 +45,13 @@
 #define IRQ_AP_CPINT1			19
 #define IRQ_AP_LBUSTIMEOUT 		20
 #define IRQ_AP_APCINT			21
+#define IRQ_CP_CLCDCINT			22
+#define IRQ_CP_MMCIINT0			23
+#define IRQ_CP_MMCIINT1			24
+#define IRQ_CP_AACIINT			25
+#define IRQ_CP_CPPLDINT			26
+#define IRQ_CP_ETHINT			27
+#define IRQ_CP_TSPENINT			28
 #define IRQ_PIC_END			31
 
 #define IRQ_CIC_START			32
@@ -53,5 +60,23 @@
 #define IRQ_CM_COMMTX			34
 #define IRQ_CIC_END			34
 
+/*
+ * IntegratorCP only
+ */
+#define IRQ_SIC_START			35
+#define IRQ_SIC_CP_SOFTINT		35
+#define IRQ_SIC_CP_RI0			36
+#define IRQ_SIC_CP_RI1			37
+#define IRQ_SIC_CP_CARDIN		38
+#define IRQ_SIC_CP_LMINT0		39
+#define IRQ_SIC_CP_LMINT1		40
+#define IRQ_SIC_CP_LMINT2		41
+#define IRQ_SIC_CP_LMINT3		42
+#define IRQ_SIC_CP_LMINT4		43
+#define IRQ_SIC_CP_LMINT5		44
+#define IRQ_SIC_CP_LMINT6		45
+#define IRQ_SIC_CP_LMINT7		46
+#define IRQ_SIC_END			46
+
 #define NR_IRQS                         47
 

include/asm-arm/arch-integrator/system.h

@@ -21,7 +21,7 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <asm/arch/platform.h>
+#include <asm/arch/cm.h>
 
 static inline void arch_idle(void)
 {
@@ -34,16 +34,11 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode)
 {
-	unsigned int hdr_ctrl =	(IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET);
-	unsigned int val;
-
 	/*
 	 * To reset, we hit the on-board reset register
 	 * in the system FPGA
 	 */
-	val = __raw_readl(hdr_ctrl);
-	val |= INTEGRATOR_HDR_CTRL_RESET;
-	__raw_writel(val, hdr_ctrl);
+	cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
 }
 
 #endif

include/asm-arm/arch-integrator/time.h

@@ -17,6 +17,7 @@
  */
 #include <asm/system.h>
 #include <asm/leds.h>
+#include <asm/mach-types.h>
 
 /*
  * Where is the timer (VA)?
@@ -31,19 +32,15 @@
  */
 #define TIMER_INTERVAL	(TICKS_PER_uSEC * mSEC_10)
 #if TIMER_INTERVAL >= 0x100000
-#define TIMER_RELOAD	(TIMER_INTERVAL >> 8)		/* Divide by 256 */
-#define TIMER_CTRL	0x88				/* Enable, Clock / 256 */
 #define TICKS2USECS(x)	(256 * (x) / TICKS_PER_uSEC)
 #elif TIMER_INTERVAL >= 0x10000
-#define TIMER_RELOAD	(TIMER_INTERVAL >> 4)		/* Divide by 16 */
-#define TIMER_CTRL	0x84				/* Enable, Clock / 16 */
 #define TICKS2USECS(x)	(16 * (x) / TICKS_PER_uSEC)
 #else
-#define TIMER_RELOAD	(TIMER_INTERVAL)
-#define TIMER_CTRL	0x80				/* Enable */
 #define TICKS2USECS(x)	((x) / TICKS_PER_uSEC)
 #endif
 
+#define TIMER_CTRL_IE	(1 << 5)			/* Interrupt Enable */
+
 /*
  * What does it look like?
  */
@@ -56,6 +53,8 @@ typedef struct TimerStruct {
 
 extern unsigned long (*gettimeoffset)(void);
 
+static unsigned long timer_reload;
+
 /*
  * Returns number of ms since last clock interrupt.  Note that interrupts
  * will have been disabled by do_gettimeoffset()
@@ -81,13 +80,13 @@ static unsigned long integrator_gettimeoffset(void)
 	/*
 	 * Number of ticks since last interrupt.
 	 */
-	ticks1 = TIMER_RELOAD - ticks2;
+	ticks1 = timer_reload - ticks2;
 
 	/*
 	 * Interrupt pending?  If so, we've reloaded once already.
 	 */
 	if (status & (1 << IRQ_TIMERINT1))
-		ticks1 += TIMER_RELOAD;
+		ticks1 += timer_reload;
 
 	/*
 	 * Convert the ticks to usecs
@@ -121,8 +120,21 @@ void __init time_init(void)
 	volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE;
 	volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE;
 	volatile TimerStruct_t *timer2 = (volatile TimerStruct_t *)TIMER2_VA_BASE;
-
-	timer_irq.handler = integrator_timer_interrupt;
+	unsigned int timer_ctrl = 0x80 | 0x40;	/* periodic */
+
+	if (machine_is_integrator()) {
+		timer_reload = 1000000 * TICKS_PER_uSEC / HZ;
+	} else if (machine_is_cintegrator()) {
+		timer_reload = 1000000 / HZ;
+		timer_ctrl |= TIMER_CTRL_IE;
+	}
+	if (timer_reload > 0x100000) {
+		timer_reload >>= 8;
+		timer_ctrl |= 0x08; /* /256 */
+	} else if (timer_reload > 0x010000) {
+		timer_reload >>= 4;
+		timer_ctrl |= 0x04; /* /16 */
+	}
 
 	/*
 	 * Initialise to a known state (all timers off)
@@ -131,12 +143,14 @@ void __init time_init(void)
 	timer1->TimerControl = 0;
 	timer2->TimerControl = 0;
 
-	timer1->TimerLoad    = TIMER_RELOAD;
-	timer1->TimerControl = TIMER_CTRL | 0x40;	/* periodic */
+	timer1->TimerLoad    = timer_reload;
+	timer1->TimerValue   = timer_reload;
+	timer1->TimerControl = timer_ctrl;
 
 	/* 
 	 * Make irqs happen for the system timer
 	 */
+	timer_irq.handler = integrator_timer_interrupt;
 	setup_irq(IRQ_TIMERINT1, &timer_irq);
 	gettimeoffset = integrator_gettimeoffset;
 }

include/asm-arm/hardware/amba.h

@@ -10,11 +10,13 @@
 #ifndef ASMARM_AMBA_H
 #define ASMARM_AMBA_H
 
+#define AMBA_NR_IRQS	2
+
 struct amba_device {
 	struct device		dev;
 	struct resource		res;
-	unsigned int		irq;
 	unsigned int		periphid;
+	unsigned int		irq[AMBA_NR_IRQS];
 };
 
 struct amba_id {
@@ -40,5 +42,13 @@ int amba_driver_register(struct amba_driver *);
 void amba_driver_unregister(struct amba_driver *);
 int amba_device_register(struct amba_device *, struct resource *);
 void amba_device_unregister(struct amba_device *);
+struct amba_device *amba_find_device(const char *, struct device *, unsigned int, unsigned int);
+int amba_request_regions(struct amba_device *, const char *);
+void amba_release_regions(struct amba_device *);
+
+#define amba_config(d)	(((d)->periphid >> 24) & 0xff)
+#define amba_rev(d)	(((d)->periphid >> 20) & 0x0f)
+#define amba_manf(d)	(((d)->periphid >> 12) & 0xff)
+#define amba_part(d)	((d)->periphid & 0xfff)
 
 #endif

include/asm-arm/hardware/sa1111.h

@@ -219,8 +219,6 @@
 #define _SAITR          _SA1111( 0x065c )
 #define _SADR           _SA1111( 0x0680 )
 
-#if LANGUAGE == C
-
 #define SACR0		__CCREG(0x0600)
 #define SACR1		__CCREG(0x0604)
 #define SACR2		__CCREG(0x0608)
@@ -246,8 +244,6 @@
 #define SAITR		__CCREG(0x065c)
 #define SADR		__CCREG(0x0680)
 
-#endif  /* LANGUAGE == C */
-
 #define SACR0_ENB	(1<<0)
 #define SACR0_BCKD	(1<<2)
 #define SACR0_RST	(1<<3)
@@ -368,8 +364,6 @@
 #define _PC_SDR		_SA1111( 0x1028 )
 #define _PC_SSR		_SA1111( 0x102c )
 
-#if LANGUAGE == C
-
 #define PA_DDR		__CCREG(0x1000)
 #define PA_DRR		__CCREG(0x1004)
 #define PA_DWR		__CCREG(0x1004)
@@ -386,8 +380,6 @@
 #define PC_SDR		__CCREG(0x1028)
 #define PC_SSR		__CCREG(0x102c)
 
-#endif  /* LANGUAGE == C */
-
 /*
  * Interrupt Controller
  *

include/asm-arm/pci.h

@@ -75,7 +75,7 @@ pci_unmap_single(struct pci_dev *hwdev, dma_addr_t handle, size_t size, int dir)
 		return;
 	}
 
-	return dma_unmap_single(hwdev ? &hwdev->dev : NULL, handle, size, dir);
+	dma_unmap_single(hwdev ? &hwdev->dev : NULL, handle, size, dir);
 }
 
 static inline int

include/asm-arm/semaphore.h

@@ -16,12 +16,12 @@ struct semaphore {
 	atomic_t count;
 	int sleepers;
 	wait_queue_head_t wait;
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	long __magic;
 #endif
 };
 
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 # define __SEM_DEBUG_INIT(name)	.__magic = (long)&(name).__magic
 #else
 # define __SEM_DEBUG_INIT(name)
@@ -46,7 +46,7 @@ static inline void sema_init(struct semaphore *sem, int val)
 	atomic_set(&sem->count, val);
 	sem->sleepers = 0;
 	init_waitqueue_head(&sem->wait);
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	sem->__magic = (long)&sem->__magic;
 #endif
 }
@@ -85,7 +85,7 @@ extern void __up(struct semaphore * sem);
  */
 static inline void down(struct semaphore * sem)
 {
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	CHECK_MAGIC(sem->__magic);
 #endif
 	might_sleep();
@@ -98,7 +98,7 @@ static inline void down(struct semaphore * sem)
  */
 static inline int down_interruptible (struct semaphore * sem)
 {
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	CHECK_MAGIC(sem->__magic);
 #endif
 	might_sleep();
@@ -107,7 +107,7 @@ static inline int down_interruptible (struct semaphore * sem)
 
 static inline int down_trylock(struct semaphore *sem)
 {
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	CHECK_MAGIC(sem->__magic);
 #endif
 
@@ -122,7 +122,7 @@ static inline int down_trylock(struct semaphore *sem)
  */
 static inline void up(struct semaphore * sem)
 {
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	CHECK_MAGIC(sem->__magic);
 #endif
 

include/asm-arm/unistd.h

@@ -296,6 +296,9 @@
 #define __NR_tgkill			(__NR_SYSCALL_BASE+268)
 #define __NR_utimes			(__NR_SYSCALL_BASE+269)
 #define __NR_fadvise64_64		(__NR_SYSCALL_BASE+270)
+#define __NR_pciconfig_iobase		(__NR_SYSCALL_BASE+271)
+#define __NR_pciconfig_read		(__NR_SYSCALL_BASE+272)
+#define __NR_pciconfig_write		(__NR_SYSCALL_BASE+273)
 
 /*
  * The following SWIs are ARM private.