Commit dc073430 authored by Diogo Ivo's avatar Diogo Ivo Committed by Paolo Abeni

dt-bindings: net: Add support for AM65x SR1.0 in ICSSG

Silicon Revision 1.0 of the AM65x came with a slightly different ICSSG
support: Only 2 PRUs per slice are available and instead 2 additional
DMA channels are used for management purposes. We have no restrictions
on specified PRUs, but the DMA channels need to be adjusted.
Co-developed-by: default avatarJan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: default avatarJan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: default avatarDiogo Ivo <diogo.ivo@siemens.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarRoger Quadros <rogerq@kernel.org>
Reviewed-by: default avatarMD Danish Anwar <danishanwar@ti.com>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 87c33315
......@@ -13,14 +13,12 @@ description:
Ethernet based on the Programmable Real-Time Unit and Industrial
Communication Subsystem.
allOf:
- $ref: /schemas/remoteproc/ti,pru-consumer.yaml#
properties:
compatible:
enum:
- ti,am642-icssg-prueth # for AM64x SoC family
- ti,am654-icssg-prueth # for AM65x SoC family
- ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
sram:
$ref: /schemas/types.yaml#/definitions/phandle
......@@ -28,9 +26,11 @@ properties:
phandle to MSMC SRAM node
dmas:
maxItems: 10
minItems: 10
maxItems: 12
dma-names:
minItems: 10
items:
- const: tx0-0
- const: tx0-1
......@@ -42,6 +42,8 @@ properties:
- const: tx1-3
- const: rx0
- const: rx1
- const: rxmgm0
- const: rxmgm1
ti,mii-g-rt:
$ref: /schemas/types.yaml#/definitions/phandle
......@@ -132,6 +134,27 @@ required:
- interrupts
- interrupt-names
allOf:
- $ref: /schemas/remoteproc/ti,pru-consumer.yaml#
- if:
properties:
compatible:
contains:
const: ti,am654-sr1-icssg-prueth
then:
properties:
dmas:
minItems: 12
dma-names:
minItems: 12
else:
properties:
dmas:
maxItems: 10
dma-names:
maxItems: 10
unevaluatedProperties: false
examples:
......
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