Commit dc89bb86 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Manasi Navare

drm/i915: Rename VRR_CTL reg fields

Give the pipeline full line count bits more descriptive names
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarManasi Navare <manasi.d.navare@intel.com>
Reviewed-by: default avatarManasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210122232647.22688-9-manasi.d.navare@intel.com
parent ac4acaed
...@@ -4350,9 +4350,9 @@ enum { ...@@ -4350,9 +4350,9 @@ enum {
#define VRR_CTL_VRR_ENABLE REG_BIT(31) #define VRR_CTL_VRR_ENABLE REG_BIT(31)
#define VRR_CTL_IGN_MAX_SHIFT REG_BIT(30) #define VRR_CTL_IGN_MAX_SHIFT REG_BIT(30)
#define VRR_CTL_FLIP_LINE_EN REG_BIT(29) #define VRR_CTL_FLIP_LINE_EN REG_BIT(29)
#define VRR_CTL_LINE_COUNT_MASK REG_GENMASK(10, 3) #define VRR_CTL_PIPELINE_FULL_MASK REG_GENMASK(10, 3)
#define VRR_CTL_LINE_COUNT(x) REG_FIELD_PREP(VRR_CTL_LINE_COUNT_MASK, (x)) #define VRR_CTL_PIPELINE_FULL(x) REG_FIELD_PREP(VRR_CTL_PIPELINE_FULL_MASK, (x))
#define VRR_CTL_SW_FULLLINE_COUNT REG_BIT(0) #define VRR_CTL_PIPELINE_FULL_OVERRIDE REG_BIT(0)
#define _TRANS_VRR_VMAX_A 0x60424 #define _TRANS_VRR_VMAX_A 0x60424
#define _TRANS_VRR_VMAX_B 0x61424 #define _TRANS_VRR_VMAX_B 0x61424
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment